1 /**************************************************************************//**
2 * @file psio.h
3 * @version V3.00
4 * @brief M460 series PSIO driver header file
5 *
6 * @copyright SPDX-License-Identifier: Apache-2.0
7 * @copyright Copyright (C) 2021 Nuvoton Technology Corp. All rights reserved.
8 *****************************************************************************/
9
10
11 #ifndef __PSIO_H__
12 #define __PSIO_H__
13
14 #ifdef __cplusplus
15 extern "C"
16 {
17 #endif
18
19
20 /** @addtogroup Standard_Driver Standard Driver
21 @{
22 */
23
24 /** @addtogroup PSIO_Driver PSIO Driver
25 @{
26 */
27
28 /** @addtogroup PSIO_EXPORTED_CONSTANTS PSIO Exported Constants
29 @{
30 */
31
32 /*---------------------------------------------------------------------------------------------------------*/
33 /* Operation Mode Constant Definitions */
34 /*---------------------------------------------------------------------------------------------------------*/
35 #define PSIO_SC0 0x00000000UL /*!<PSIO Slot Controller 0 \hideinitializer */
36 #define PSIO_SC1 0x00000001UL /*!<PSIO Slot Controller 1 \hideinitializer */
37 #define PSIO_SC2 0x00000002UL /*!<PSIO Slot Controller 2 \hideinitializer */
38 #define PSIO_SC3 0x00000003UL /*!<PSIO Slot Controller 3 \hideinitializer */
39
40 #define PSIO_INT0 0x00000000UL /*!<PSIO Interrupt 0 \hideinitializer */
41 #define PSIO_INT1 0x00000001UL /*!<PSIO Interrupt 1 \hideinitializer */
42
43 #define PSIO_SLOT_DISABLE 0x00000000UL /*!<PSIO Slot disable \hideinitializer */
44 #define PSIO_SLOT0 0x00000001UL /*!<PSIO Slot 0 \hideinitializer */
45 #define PSIO_SLOT1 0x00000002UL /*!<PSIO Slot 1 \hideinitializer */
46 #define PSIO_SLOT2 0x00000003UL /*!<PSIO Slot 2 \hideinitializer */
47 #define PSIO_SLOT3 0x00000004UL /*!<PSIO Slot 3 \hideinitializer */
48 #define PSIO_SLOT4 0x00000005UL /*!<PSIO Slot 4 \hideinitializer */
49 #define PSIO_SLOT5 0x00000006UL /*!<PSIO Slot 5 \hideinitializer */
50 #define PSIO_SLOT6 0x00000007UL /*!<PSIO Slot 6 \hideinitializer */
51 #define PSIO_SLOT7 0x00000008UL /*!<PSIO Slot 7 \hideinitializer */
52
53 #define PSIO_PIN0 0x00000000UL /*!<PSIO Pin 0 \hideinitializer */
54 #define PSIO_PIN1 0x00000001UL /*!<PSIO Pin 1 \hideinitializer */
55 #define PSIO_PIN2 0x00000002UL /*!<PSIO Pin 2 \hideinitializer */
56 #define PSIO_PIN3 0x00000003UL /*!<PSIO Pin 3 \hideinitializer */
57 #define PSIO_PIN4 0x00000004UL /*!<PSIO Pin 4 \hideinitializer */
58 #define PSIO_PIN5 0x00000005UL /*!<PSIO Pin 5 \hideinitializer */
59 #define PSIO_PIN6 0x00000006UL /*!<PSIO Pin 6 \hideinitializer */
60 #define PSIO_PIN7 0x00000007UL /*!<PSIO Pin 7 \hideinitializer */
61
62 #define PSIO_CP0 0x00000000UL /*!<PSIO Check Point 0 \hideinitializer */
63 #define PSIO_CP1 0x00000001UL /*!<PSIO Check Point 1 \hideinitializer */
64 #define PSIO_CP2 0x00000002UL /*!<PSIO Check Point 2 \hideinitializer */
65 #define PSIO_CP3 0x00000003UL /*!<PSIO Check Point 3 \hideinitializer */
66 #define PSIO_CP4 0x00000004UL /*!<PSIO Check Point 4 \hideinitializer */
67 #define PSIO_CP5 0x00000005UL /*!<PSIO Check Point 5 \hideinitializer */
68 #define PSIO_CP6 0x00000006UL /*!<PSIO Check Point 6 \hideinitializer */
69 #define PSIO_CP7 0x00000007UL /*!<PSIO Check Point 7 \hideinitializer */
70
71 #define PSIO_PIN_ENABLE 0x00000001UL /*!<PSIO Pin Enable \hideinitializer */
72 #define PSIO_PIN_DISABLE 0x00000000UL /*!<PSIO Pin Disable \hideinitializer */
73
74 #define PSIO_SW_TRIGGER (0x0UL<<PSIO_SCCT_SCCTL_TRIGSRC_Pos) /*!<PSIO Software Trigger \hideinitializer */
75 #define PSIO_FALLING_TRIGGER (0x1UL<<PSIO_SCCT_SCCTL_TRIGSRC_Pos) /*!<PSIO Falling Edge Trigger \hideinitializer */
76 #define PSIO_RISING_TRIGGER (0x2UL<<PSIO_SCCT_SCCTL_TRIGSRC_Pos) /*!<PSIO Rising Edge Trigger \hideinitializer */
77 #define PSIO_BOTH_EDGE_TRIGGER (0x3UL<<PSIO_SCCT_SCCTL_TRIGSRC_Pos) /*!<PSIO Both Edge Trigger \hideinitializer */
78
79 #define PSIO_REPEAT_ENABLE 0x00000001UL /*!<PSIO Repeat Mode Enable \hideinitializer */
80 #define PSIO_REPEAT_DISABLE 0x00000000UL /*!<PSIO Repeat Mode Disable \hideinitializer */
81
82 #define PSIO_INPUT_MODE 0x00000000UL /*!<PSIO Input Mode \hideinitializer */
83 #define PSIO_OUTPUT_MODE 0x00000001UL /*!<PSIO Output Mode \hideinitializer */
84 #define PSIO_OPENDRAIN_MODE 0x00000002UL /*!<PSIO Open-drain Mode \hideinitializer */
85 #define PSIO_QUASI_MODE 0x00000003UL /*!<PSIO Quasi Mode \hideinitializer */
86
87 #define PSIO_LOW_LEVEL 0x00000000UL /*!<PSIO Low Level \hideinitializer */
88 #define PSIO_HIGH_LEVEL 0x00000001UL /*!<PSIO High Level \hideinitializer */
89 #define PSIO_LAST_OUTPUT 0x00000002UL /*!<PSIO Last Output \hideinitializer */
90 #define PSIO_Toggle 0x00000003UL /*!<PSIO Toggle \hideinitializer */
91
92 #define PSIO_SWITCH_P0 0x00000000UL /*!<PSIO Switch Point 0 \hideinitializer */
93 #define PSIO_SWITCH_P1 0x00000001UL /*!<PSIO Switch Point 1 \hideinitializer */
94
95 #define PSIO_LSB (0x0UL<<PSIO_GNCT_DATCTL_ORDER_Pos) /*!<PSIO Data LSB \hideinitializer */
96 #define PSIO_MSB (0x1UL<<PSIO_GNCT_DATCTL_ORDER_Pos) /*!<PSIO Data MSB \hideinitializer */
97
98 #define PSIO_DEPTH1 0x00000000UL /*!<PSIO Data Depth 1 \hideinitializer */
99 #define PSIO_DEPTH2 0x00000001UL /*!<PSIO Data Depth 2 \hideinitializer */
100 #define PSIO_DEPTH3 0x00000002UL /*!<PSIO Data Depth 3 \hideinitializer */
101 #define PSIO_DEPTH4 0x00000003UL /*!<PSIO Data Depth 4 \hideinitializer */
102
103 #define PSIO_NO_ACTION 0x00000000UL /*!<PSIO no action \hideinitializer */
104 #define PSIO_OUT_LOW 0x00000000UL /*!<PSIO Output Low \hideinitializer */
105 #define PSIO_OUT_HIGH 0x00000001UL /*!<PSIO Output High \hideinitializer */
106 #define PSIO_OUT_BUFFER 0x00000002UL /*!<PSIO Output form Buffer \hideinitializer */
107 #define PSIO_OUT_TOGGLE 0x00000003UL /*!<PSIO Output Toggle \hideinitializer */
108 #define PSIO_IN_BUFFER 0x00000004UL /*!<PSIO Input to Buffer \hideinitializer */
109 #define PSIO_IN_STATUS 0x00000005UL /*!<PSIO Input to Status \hideinitializer */
110 #define PSIO_IN_STATUS_UPDATE 0x00000006UL /*!<PSIO Input to Status and Update \hideinitializer */
111
112 /*@}*/ /* end of group PSIO_EXPORTED_CONSTANTS */
113
114 /** @addtogroup PSIO_EXPORTED_STRUCTS PSIO Exported Structs
115 @{
116 */
117 /**
118 * @brief A structure holds psio configuration
119 */
120 typedef struct
121 {
122 unsigned CKPT0SLT: 4; ///< Link check point and slot controller slot. \ref PSIO_SLOT_DISABLE, \ref PSIO_SLOT0, \ref PSIO_SLOT1, \ref PSIO_SLOT2, \ref PSIO_SLOT3, \ref PSIO_SLOT4, \ref PSIO_SLOT5, \ref PSIO_SLOT6, \ref PSIO_SLOT7
123 unsigned CKPT1SLT: 4; ///< Link check point and slot controller slot. Reference to \ref S_PSIO_CP_CONFIG::CKPT0SLT
124 unsigned CKPT2SLT: 4; ///< Link check point and slot controller slot. Reference to \ref S_PSIO_CP_CONFIG::CKPT0SLT
125 unsigned CKPT3SLT: 4; ///< Link check point and slot controller slot. Reference to \ref S_PSIO_CP_CONFIG::CKPT0SLT
126 unsigned CKPT4SLT: 4; ///< Link check point and slot controller slot. Reference to \ref S_PSIO_CP_CONFIG::CKPT0SLT
127 unsigned CKPT5SLT: 4; ///< Link check point and slot controller slot. Reference to \ref S_PSIO_CP_CONFIG::CKPT0SLT
128 unsigned CKPT6SLT: 4; ///< Link check point and slot controller slot. Reference to \ref S_PSIO_CP_CONFIG::CKPT0SLT
129 unsigned CKPT7SLT: 4; ///< Link check point and slot controller slot. Reference to \ref S_PSIO_CP_CONFIG::CKPT0SLT
130 unsigned CKPT0ACT: 4; ///< Select action at check point0. \ref PSIO_NO_ACTION, \ref PSIO_OUT_LOW, \ref PSIO_OUT_HIGH, \ref PSIO_OUT_BUFFER, \ref PSIO_OUT_TOGGLE, \ref PSIO_IN_BUFFER, \ref PSIO_IN_STATUS, \ref PSIO_IN_STATUS_UPDATE
131 unsigned CKPT1ACT: 4; ///< Select action at check point1. Reference to \ref S_PSIO_CP_CONFIG::CKPT0ACT
132 unsigned CKPT2ACT: 4; ///< Select action at check point2. Reference to \ref S_PSIO_CP_CONFIG::CKPT0ACT
133 unsigned CKPT3ACT: 4; ///< Select action at check point3. Reference to \ref S_PSIO_CP_CONFIG::CKPT0ACT
134 unsigned CKPT4ACT: 4; ///< Select action at check point4. Reference to \ref S_PSIO_CP_CONFIG::CKPT0ACT
135 unsigned CKPT5ACT: 4; ///< Select action at check point5. Reference to \ref S_PSIO_CP_CONFIG::CKPT0ACT
136 unsigned CKPT6ACT: 4; ///< Select action at check point6. Reference to \ref S_PSIO_CP_CONFIG::CKPT0ACT
137 unsigned CKPT7ACT: 4; ///< Select action at check point7. Reference to \ref S_PSIO_CP_CONFIG::CKPT0ACT
138 } S_PSIO_CP_CONFIG;
139 /*@}*/ /* end of group PSIO_EXPORTED_STRUCTS */
140
141 /** @addtogroup PSIO_EXPORTED_FUNCTIONS PSIO Exported Functions
142 @{
143 */
144
145 /**
146 * @brief Enable specified PSIO interrupt
147 *
148 * @param[in] psio The pointer of the specified PSIO module
149 * @param[in] u32IntSel Interrupt type select
150 * - \ref PSIO_INTEN_CON0IE_Msk
151 * - \ref PSIO_INTEN_CON1IE_Msk
152 * - \ref PSIO_INTEN_MISMATIE_Msk
153 * - \ref PSIO_INTEN_TERRIE_Msk
154 * - \ref PSIO_INTEN_SC0IE_Msk
155 * - \ref PSIO_INTEN_SC1IE_Msk
156 * - \ref PSIO_INTEN_SC2IE_Msk
157 * - \ref PSIO_INTEN_SC3IE_Msk
158 *
159 * @return None
160 *
161 * @details This macro enable specified PSIO interrupt.
162 * \hideinitializer
163 */
164 #define PSIO_ENABLE_INT(psio, u32IntSel) ((psio)->INTEN |= (u32IntSel))
165
166 /**
167 * @brief Disable specified PSIO interrupt
168 *
169 * @param[in] psio The pointer of the specified PSIO module
170 * @param[in] u32IntSel Interrupt type select
171 * - \ref PSIO_INTEN_CON0IE_Msk
172 * - \ref PSIO_INTEN_CON1IE_Msk
173 * - \ref PSIO_INTEN_MISMATIE_Msk
174 * - \ref PSIO_INTEN_TERRIE_Msk
175 * - \ref PSIO_INTEN_SC0IE_Msk
176 * - \ref PSIO_INTEN_SC1IE_Msk
177 * - \ref PSIO_INTEN_SC2IE_Msk
178 * - \ref PSIO_INTEN_SC3IE_Msk
179 *
180 * @return None
181 *
182 * @details This macro disable specified PSIO interrupt.
183 * \hideinitializer
184 */
185 #define PSIO_DISABLE_INT(psio, u32IntSel) ((psio)->INTEN &= ~(u32IntSel))
186
187 /**
188 * @brief Get specified interrupt flag/status
189 *
190 * @param[in] psio The pointer of the specified PSIO module
191 * @param[in] u32IntTypeFlag Interrupt Type Flag, Valid values are
192 * - \ref PSIO_INTSTS_CON0IF_Msk
193 * - \ref PSIO_INTSTS_CON1IF_Msk
194 * - \ref PSIO_INTSTS_MISMATIF_Msk
195 * - \ref PSIO_INTSTS_TERRIF_Msk
196 * - \ref PSIO_INTSTS_SC0IF_Msk
197 * - \ref PSIO_INTSTS_SC1IF_Msk
198 * - \ref PSIO_INTSTS_SC2IF_Msk
199 * - \ref PSIO_INTSTS_SC3IF_Msk
200 *
201 * @return 0 The specified interrupt is not happened.
202 * 1 The specified interrupt is happened.
203 *
204 * @details This macro get specified interrupt flag or interrupt indicator status.
205 * \hideinitializer
206 */
207 #define PSIO_GET_INT_FLAG(psio, u32IntTypeFlag) (((psio)->INTSTS & (u32IntTypeFlag))?1:0)
208
209 /**
210 * @brief Clear specified interrupt flag/status
211 *
212 * @param[in] psio The pointer of the specified PSIO module
213 * @param[in] u32IntTypeFlag Interrupt Type Flag, Valid values are
214 * - \ref PSIO_INTSTS_CON0IF_Msk
215 * - \ref PSIO_INTSTS_CON1IF_Msk
216 * - \ref PSIO_INTSTS_MISMATIF_Msk
217 * - \ref PSIO_INTSTS_TERRIF_Msk
218 * - \ref PSIO_INTSTS_SC0IF_Msk
219 * - \ref PSIO_INTSTS_SC1IF_Msk
220 * - \ref PSIO_INTSTS_SC2IF_Msk
221 * - \ref PSIO_INTSTS_SC3IF_Msk
222 *
223 * @return None
224 *
225 * @details This macro clear specified interrupt flag or interrupt indicator status.
226 * \hideinitializer
227 */
228 #define PSIO_CLEAR_INT_FLAG(psio, u32IntTypeFlag) ((psio)->INTSTS = u32IntTypeFlag)
229
230 /**
231 * @brief Get specified transfer status
232 *
233 * @param[in] psio The pointer of the specified PSIO module
234 * @param[in] u32Status Transfer status, Valid values are
235 * - \ref PSIO_TRANSTS_INFULL0_Msk
236 * - \ref PSIO_TRANSTS_INOVER0_Msk
237 * - \ref PSIO_TRANSTS_OUTEPY0_Msk
238 * - \ref PSIO_TRANSTS_OUTUF0_Msk
239 * - \ref PSIO_TRANSTS_INFULL1_Msk
240 * - \ref PSIO_TRANSTS_INOVER1_Msk
241 * - \ref PSIO_TRANSTS_OUTEPY1_Msk
242 * - \ref PSIO_TRANSTS_OUTUF1_Msk
243 * - \ref PSIO_TRANSTS_INFULL2_Msk
244 * - \ref PSIO_TRANSTS_INOVER2_Msk
245 * - \ref PSIO_TRANSTS_OUTEPY2_Msk
246 * - \ref PSIO_TRANSTS_OUTUF2_Msk
247 * - \ref PSIO_TRANSTS_INFULL3_Msk
248 * - \ref PSIO_TRANSTS_INOVER3_Msk
249 * - \ref PSIO_TRANSTS_OUTEPY3_Msk
250 * - \ref PSIO_TRANSTS_OUTUF3_Msk
251 * - \ref PSIO_TRANSTS_INFULL4_Msk
252 * - \ref PSIO_TRANSTS_INOVER4_Msk
253 * - \ref PSIO_TRANSTS_OUTEPY4_Msk
254 * - \ref PSIO_TRANSTS_OUTUF4_Msk
255 * - \ref PSIO_TRANSTS_INFULL5_Msk
256 * - \ref PSIO_TRANSTS_INOVER5_Msk
257 * - \ref PSIO_TRANSTS_OUTEPY5_Msk
258 * - \ref PSIO_TRANSTS_OUTUF5_Msk
259 * - \ref PSIO_TRANSTS_INFULL6_Msk
260 * - \ref PSIO_TRANSTS_INOVER6_Msk
261 * - \ref PSIO_TRANSTS_OUTEPY6_Msk
262 * - \ref PSIO_TRANSTS_OUTUF6_Msk
263 * - \ref PSIO_TRANSTS_INFULL7_Msk
264 * - \ref PSIO_TRANSTS_INOVER7_Msk
265 * - \ref PSIO_TRANSTS_OUTEPY7_Msk
266 * - \ref PSIO_TRANSTS_OUTUF7_Msk
267 *
268 * @return 0 The specified status is not happened.
269 * 1 The specified status is happened.
270 *
271 * @details This macro get specified transfer status.
272 * \hideinitializer
273 */
274 #define PSIO_GET_TRANSFER_STATUS(psio, u32Status) (((psio)->TRANSTS & (u32Status))?1:0)
275
276 /**
277 * @brief Clear specified transfer status
278 *
279 * @param[in] psio The pointer of the specified PSIO module
280 * @param[in] u32Status Transfer status, Valid values are
281 * - \ref PSIO_TRANSTS_INOVER0_Msk
282 * - \ref PSIO_TRANSTS_OUTUF0_Msk
283 * - \ref PSIO_TRANSTS_INOVER1_Msk
284 * - \ref PSIO_TRANSTS_OUTUF1_Msk
285 * - \ref PSIO_TRANSTS_INOVER2_Msk
286 * - \ref PSIO_TRANSTS_OUTUF2_Msk
287 * - \ref PSIO_TRANSTS_INOVER3_Msk
288 * - \ref PSIO_TRANSTS_OUTUF3_Msk
289 * - \ref PSIO_TRANSTS_INOVER4_Msk
290 * - \ref PSIO_TRANSTS_OUTUF4_Msk
291 * - \ref PSIO_TRANSTS_INOVER5_Msk
292 * - \ref PSIO_TRANSTS_OUTUF5_Msk
293 * - \ref PSIO_TRANSTS_INOVER6_Msk
294 * - \ref PSIO_TRANSTS_OUTUF6_Msk
295 * - \ref PSIO_TRANSTS_INOVER7_Msk
296 * - \ref PSIO_TRANSTS_OUTUF7_Msk
297 *
298 * @return None
299 *
300 * @details This macro clear specified transfer status.
301 * \hideinitializer
302 */
303 #define PSIO_CLEAR_TRANSFER_STATUS(psio, u32Status) ((psio)->TRANSTS = u32Status)
304
305 /**
306 * @brief Get specified input status state
307 *
308 * @param[in] psio The pointer of the specified PSIO module
309 * @param[in] u32Status Transfer input status state, Valid values are
310 * - \ref PSIO_ISSTS_VALID0_Msk
311 * - \ref PSIO_ISSTS_INSTSOV0_Msk
312 * - \ref PSIO_ISSTS_VALID1_Msk
313 * - \ref PSIO_ISSTS_INSTSOV1_Msk
314 * - \ref PSIO_ISSTS_VALID2_Msk
315 * - \ref PSIO_ISSTS_INSTSOV2_Msk
316 * - \ref PSIO_ISSTS_VALID3_Msk
317 * - \ref PSIO_ISSTS_INSTSOV3_Msk
318 * - \ref PSIO_ISSTS_VALID4_Msk
319 * - \ref PSIO_ISSTS_INSTSOV4_Msk
320 * - \ref PSIO_ISSTS_VALID5_Msk
321 * - \ref PSIO_ISSTS_INSTSOV5_Msk
322 * - \ref PSIO_ISSTS_VALID6_Msk
323 * - \ref PSIO_ISSTS_INSTSOV6_Msk
324 * - \ref PSIO_ISSTS_VALID7_Msk
325 * - \ref PSIO_ISSTS_INSTSOV7_Msk
326 *
327 * @return 0 The specified status is not happened.
328 * 1 The specified status is happened.
329 *
330 * @details This macro get input status state.
331 * \hideinitializer
332 */
333 #define PSIO_GET_INPUT_STATUS_STATE(psio, u32Status) (((psio)->ISSTS & (u32Status))?1:0)
334
335 /**
336 * @brief Clear specified input status state
337 *
338 * @param[in] psio The pointer of the specified PSIO module
339 * @param[in] u32Status Transfer input status state, Valid values are
340 * - \ref PSIO_ISSTS_INSTSOV0_Msk
341 * - \ref PSIO_ISSTS_INSTSOV1_Msk
342 * - \ref PSIO_ISSTS_INSTSOV2_Msk
343 * - \ref PSIO_ISSTS_INSTSOV3_Msk
344 * - \ref PSIO_ISSTS_INSTSOV4_Msk
345 * - \ref PSIO_ISSTS_INSTSOV5_Msk
346 * - \ref PSIO_ISSTS_INSTSOV6_Msk
347 * - \ref PSIO_ISSTS_INSTSOV7_Msk
348 *
349 * @return None
350 *
351 * @details This macro clear input status state.
352 * \hideinitializer
353 */
354 #define PSIO_CLEAR_INPUT_STATUS_STATE(psio, u32Status) ((psio)->ISSTS = u32Status)
355
356 /**
357 * @brief Set PSIO PDMA control input
358 *
359 * @param[in] psio The pointer of the specified PSIO module
360 * @param[in] u32SC The selected slot controller. Valid values are
361 * - \ref PSIO_SC0
362 * - \ref PSIO_SC1
363 * - \ref PSIO_SC2
364 * - \ref PSIO_SC3
365 * @param[in] u32InPin The selected input pin
366 * - \ref PSIO_PDMACTL_IPIN0EN_Msk
367 * - \ref PSIO_PDMACTL_IPIN1EN_Msk
368 * - \ref PSIO_PDMACTL_IPIN2EN_Msk
369 * - \ref PSIO_PDMACTL_IPIN3EN_Msk
370 * - \ref PSIO_PDMACTL_IPIN4EN_Msk
371 * - \ref PSIO_PDMACTL_IPIN5EN_Msk
372 * - \ref PSIO_PDMACTL_IPIN6EN_Msk
373 * - \ref PSIO_PDMACTL_IPIN7EN_Msk
374 *
375 * @return None
376 *
377 * @details This macro set PSIO input with PDMA.
378 * \hideinitializer
379 */
380 #define PSIO_SET_PDMA_INPUT(psio, u32SC, u32InPin) ((psio)->PDMACTL = ((psio)->PDMACTL & ~PSIO_PDMACTL_INSCSEL_Msk) \
381 |((u32SC)<<PSIO_PDMACTL_INSCSEL_Pos)|(u32InPin))
382
383 /**
384 * @brief Clear PSIO PDMA control input
385 *
386 * @param[in] psio The pointer of the specified PSIO module
387 * @param[in] u32InPin The selected input pin
388 * - \ref PSIO_PDMACTL_IPIN0EN_Msk
389 * - \ref PSIO_PDMACTL_IPIN1EN_Msk
390 * - \ref PSIO_PDMACTL_IPIN2EN_Msk
391 * - \ref PSIO_PDMACTL_IPIN3EN_Msk
392 * - \ref PSIO_PDMACTL_IPIN4EN_Msk
393 * - \ref PSIO_PDMACTL_IPIN5EN_Msk
394 * - \ref PSIO_PDMACTL_IPIN6EN_Msk
395 * - \ref PSIO_PDMACTL_IPIN7EN_Msk
396 *
397 * @return None
398 *
399 * @details This macro clear PSIO input with PDMA.
400 * \hideinitializer
401 */
402 #define PSIO_CLEAR_PDMA_INPUT(psio, u32InPin) ((psio)->PDMACTL = (psio)->PDMACTL & ~PSIO_PDMACTL_INSCSEL_Msk & ~(u32InPin))
403
404 /**
405 * @brief Set PSIO PDMA control output
406 *
407 * @param[in] psio The pointer of the specified PSIO module
408 * @param[in] u32SC The selected slot controller. Valid values are
409 * - \ref PSIO_SC0
410 * - \ref PSIO_SC1
411 * - \ref PSIO_SC2
412 * - \ref PSIO_SC3
413 * @param[in] u32OutPin The selected output pin
414 * - \ref PSIO_PDMACTL_OPIN0EN_Msk
415 * - \ref PSIO_PDMACTL_OPIN1EN_Msk
416 * - \ref PSIO_PDMACTL_OPIN2EN_Msk
417 * - \ref PSIO_PDMACTL_OPIN3EN_Msk
418 * - \ref PSIO_PDMACTL_OPIN4EN_Msk
419 * - \ref PSIO_PDMACTL_OPIN5EN_Msk
420 * - \ref PSIO_PDMACTL_OPIN6EN_Msk
421 * - \ref PSIO_PDMACTL_OPIN7EN_Msk
422 *
423 * @return None
424 *
425 * @details This macro set PSIO output with PDMA.
426 * \hideinitializer
427 */
428 #define PSIO_SET_PDMA_OUTPUT(psio, u32SC, u32OutPin) ((psio)->PDMACTL = ((psio)->PDMACTL & ~PSIO_PDMACTL_OUTSCSEL_Msk) \
429 |((u32SC)<<PSIO_PDMACTL_OUTSCSEL_Pos)|(u32OutPin))
430
431 /**
432 * @brief Clear PSIO PDMA control output
433 *
434 * @param[in] psio The pointer of the specified PSIO module
435 * @param[in] u32OutPin The selected output pin
436 * - \ref PSIO_PDMACTL_OPIN0EN_Msk
437 * - \ref PSIO_PDMACTL_OPIN1EN_Msk
438 * - \ref PSIO_PDMACTL_OPIN2EN_Msk
439 * - \ref PSIO_PDMACTL_OPIN3EN_Msk
440 * - \ref PSIO_PDMACTL_OPIN4EN_Msk
441 * - \ref PSIO_PDMACTL_OPIN5EN_Msk
442 * - \ref PSIO_PDMACTL_OPIN6EN_Msk
443 * - \ref PSIO_PDMACTL_OPIN7EN_Msk
444 *
445 * @return None
446 *
447 * @details This macro clear PSIO output with PDMA.
448 * \hideinitializer
449 */
450 #define PSIO_CLEAR_PDMA_OUTPUT(psio, u32OutPin) ((psio)->PDMACTL = (psio)->PDMACTL & ~PSIO_PDMACTL_OUTSCSEL_Msk & ~(u32OutPin))
451
452 /**
453 * @brief Set slot controller trigger source
454 *
455 * @param[in] psio The pointer of the specified PSIO module
456 * @param[in] u32SC The selected slot controller. Valid values are
457 * - \ref PSIO_SC0
458 * - \ref PSIO_SC1
459 * - \ref PSIO_SC2
460 * - \ref PSIO_SC3
461 * @param[in] u32SrcType The selected trigger source type
462 * - \ref PSIO_SW_TRIGGER
463 * - \ref PSIO_FALLING_TRIGGER
464 * - \ref PSIO_RISING_TRIGGER
465 * - \ref PSIO_BOTH_EDGE_TRIGGER
466 *
467 * @return None
468 *
469 * @details This macro set slot controller trigger source.
470 * \hideinitializer
471 */
472 #define PSIO_SET_TRIGSRC(psio, u32SC, u32SrcType) ((psio)->SCCT[(u32SC)].SCCTL=((psio)->SCCT[(u32SC)].SCCTL & ~PSIO_SCCT_SCCTL_TRIGSRC_Msk)|(u32SrcType))
473
474 /**
475 * @brief Start PSIO slot controller
476 *
477 * @param[in] psio The pointer of the specified PSIO module
478 * @param[in] u32SC The selected slot controller. Valid values are
479 * - \ref PSIO_SC0
480 * - \ref PSIO_SC1
481 * - \ref PSIO_SC2
482 * - \ref PSIO_SC3
483 *
484 * @return None
485 *
486 * @details This macro start PSIO slot controller.
487 * \hideinitializer
488 */
489 #define PSIO_START_SC(psio, u32SC) ((psio)->SCCT[(u32SC)].SCCTL |= PSIO_SCCT_SCCTL_START_Msk)
490
491 /**
492 * @brief Stop PSIO slot controller
493 *
494 * @param[in] psio The pointer of the specified PSIO module
495 * @param[in] u32SC The selected slot controller. Valid values are
496 * - \ref PSIO_SC0
497 * - \ref PSIO_SC1
498 * - \ref PSIO_SC2
499 * - \ref PSIO_SC3
500 *
501 * @return None
502 *
503 * @details This macro stop PSIO slot controller.
504 * \hideinitializer
505 */
506 #define PSIO_STOP_SC(psio, u32SC) ((psio)->SCCT[(u32SC)].SCCTL |= PSIO_SCCT_SCCTL_STOP_Msk)
507
508 /**
509 * @brief Get PSIO busy flag
510 *
511 * @param[in] psio The pointer of the specified PSIO module
512 * @param[in] u32SC The selected slot controller. Valid values are
513 * - \ref PSIO_SC0
514 * - \ref PSIO_SC1
515 * - \ref PSIO_SC2
516 * - \ref PSIO_SC3
517 *
518 * @return 0 The busy flag is not happened.
519 * 1 The busy flag is happened.
520 *
521 * @details This macro get PSIO busy flag.
522 * \hideinitializer
523 */
524 #define PSIO_GET_BUSY_FLAG(psio, u32SC) (((psio)->SCCT[(u32SC)].SCCTL & PSIO_SCCT_SCCTL_BUSY_Msk)?1:0)
525
526 /**
527 * @brief Get PSIO idle flag
528 *
529 * @param[in] psio The pointer of the specified PSIO module
530 * @param[in] u32SC The selected slot controller. Valid values are
531 * - \ref PSIO_SC0
532 * - \ref PSIO_SC1
533 * - \ref PSIO_SC2
534 * - \ref PSIO_SC3
535 *
536 * @return 0 The idle flag is not happened.
537 * 1 The idle flag is happened.
538 *
539 * @details This macro get PSIO idle flag.
540 * \hideinitializer
541 */
542 #define PSIO_GET_IDLE_FLAG(psio, u32SC) (((psio)->SCCT[(u32SC)].SCCTL & PSIO_SCCT_SCCTL_IDLE_Msk)?1:0)
543
544 /**
545 * @brief Clear PSIO idle flag
546 *
547 * @param[in] psio The pointer of the specified PSIO module
548 * @param[in] u32SC The selected slot controller. Valid values are
549 * - \ref PSIO_SC0
550 * - \ref PSIO_SC1
551 * - \ref PSIO_SC2
552 * - \ref PSIO_SC3
553 *
554 * @return None
555 *
556 * @details This macro clear PSIO idle flag.
557 * \hideinitializer
558 */
559 #define PSIO_SET_IDLE_FLAG(psio, u32SC) ((psio)->SCCT[(u32SC)].SCCTL |= PSIO_SCCT_SCCTL_IDLE_Msk)
560
561 /**
562 * @brief Set PSIO slot tick count
563 *
564 * @param[in] psio The pointer of the specified PSIO module
565 * @param[in] u32SC The selected slot controller. Valid values are
566 * - \ref PSIO_SC0
567 * - \ref PSIO_SC1
568 * - \ref PSIO_SC2
569 * - \ref PSIO_SC3
570 * @param[in] u32Slot The selected slot. Valid values are
571 * - \ref PSIO_SLOT0
572 * - \ref PSIO_SLOT1
573 * - \ref PSIO_SLOT2
574 * - \ref PSIO_SLOT3
575 * - \ref PSIO_SLOT4
576 * - \ref PSIO_SLOT5
577 * - \ref PSIO_SLOT6
578 * - \ref PSIO_SLOT7
579 * @param[in] u32Cnt The slot tick count. Valid values are 0x0~0xF
580 *
581 * @return None
582 *
583 * @details This macro set PSIO slot tick count.
584 * \hideinitializer
585 */
586 #define PSIO_SCSLOT_SET_SLOT(psio, u32SC, u32Slot, u32Cnt) ((psio)->SCCT[(u32SC)].SCSLOT= \
587 ((psio)->SCCT[(u32SC)].SCSLOT & ~(PSIO_SCCT_SCSLOT_SLOT0CNT_Msk<<((u32Slot-1)*PSIO_SCCT_SCSLOT_SLOT1CNT_Pos)))|((u32Cnt&0xF)<<((u32Slot-1)*PSIO_SCCT_SCSLOT_SLOT1CNT_Pos)))
588
589 /**
590 * @brief Set PSIO all slot tick count
591 *
592 * @param[in] psio The pointer of the specified PSIO module
593 * @param[in] u32SC The selected slot controller. Valid values are
594 * - \ref PSIO_SC0
595 * - \ref PSIO_SC1
596 * - \ref PSIO_SC2
597 * - \ref PSIO_SC3
598 * @param[in] u32Cnt The slot tick count. Valid values are 0x0~0xF
599 *
600 * @return None
601 *
602 * @details This macro set PSIO all slot tick count.
603 * \hideinitializer
604 */
605 #define PSIO_SCSLOT_SET_ALL_SLOT(psio, u32SC, u32Cnt) ((psio)->SCCT[(u32SC)].SCSLOT= \
606 ((u32Cnt&0xF)<<PSIO_SCCT_SCSLOT_SLOT0CNT_Pos)|((u32Cnt&0xF)<<PSIO_SCCT_SCSLOT_SLOT1CNT_Pos)\
607 |((u32Cnt&0xF)<<PSIO_SCCT_SCSLOT_SLOT2CNT_Pos)|((u32Cnt&0xF)<<PSIO_SCCT_SCSLOT_SLOT3CNT_Pos)\
608 |((u32Cnt&0xF)<<PSIO_SCCT_SCSLOT_SLOT4CNT_Pos)|((u32Cnt&0xF)<<PSIO_SCCT_SCSLOT_SLOT5CNT_Pos)\
609 |((u32Cnt&0xF)<<PSIO_SCCT_SCSLOT_SLOT6CNT_Pos)|((u32Cnt&0xF)<<PSIO_SCCT_SCSLOT_SLOT7CNT_Pos))
610
611 /**
612 * @brief Enable Pin function
613 *
614 * @param[in] psio The pointer of the specified PSIO module
615 * @param[in] u32Pin The selected Pin. Valid values are
616 * - \ref PSIO_PIN0
617 * - \ref PSIO_PIN1
618 * - \ref PSIO_PIN2
619 * - \ref PSIO_PIN3
620 * - \ref PSIO_PIN4
621 * - \ref PSIO_PIN5
622 * - \ref PSIO_PIN6
623 * - \ref PSIO_PIN7
624 *
625 * @return None
626 *
627 * @details This function is used to Enable this Pin.
628 * \hideinitializer
629 */
630 #define PSIO_ENABLE_PIN(psio, u32Pin) ((psio)->GNCT[(u32Pin)].GENCTL = \
631 ((psio)->GNCT[(u32Pin)].GENCTL & ~PSIO_GNCT_GENCTL_PINEN_Msk)|PSIO_GNCT_GENCTL_PINEN_Msk)
632
633 /**
634 * @brief Disable Pin function
635 *
636 * @param[in] psio The pointer of the specified PSIO module
637 * @param[in] u32Pin The selected Pin. Valid values are
638 * - \ref PSIO_PIN0
639 * - \ref PSIO_PIN1
640 * - \ref PSIO_PIN2
641 * - \ref PSIO_PIN3
642 * - \ref PSIO_PIN4
643 * - \ref PSIO_PIN5
644 * - \ref PSIO_PIN6
645 * - \ref PSIO_PIN7
646 *
647 * @return None
648 *
649 * @details This function is used to disable this Pin.
650 * \hideinitializer
651 */
652 #define PSIO_DISABLE_PIN(psio, u32Pin) ((psio)->GNCT[(u32Pin)].GENCTL = \
653 ((psio)->GNCT[(u32Pin)].GENCTL & ~PSIO_GNCT_GENCTL_PINEN_Msk))
654
655 /**
656 * @brief Set specified pin data width
657 *
658 * @param[in] psio The pointer of the specified PSIO module
659 * @param[in] u32Pin The selected Pin. Valid values are
660 * - \ref PSIO_PIN0
661 * - \ref PSIO_PIN1
662 * - \ref PSIO_PIN2
663 * - \ref PSIO_PIN3
664 * - \ref PSIO_PIN4
665 * - \ref PSIO_PIN5
666 * - \ref PSIO_PIN6
667 * - \ref PSIO_PIN7
668 * @param[in] u32InWidth The input data width. Valid values are 0~32
669 * @param[in] u32OutWidth The output data width. Valid values are 0~32
670 *
671 * @return None
672 *
673 * @details This macro set in/out data width.
674 * \hideinitializer
675 */
676 #define PSIO_SET_WIDTH(psio, u32Pin, u32InWidth, u32OutWidth) (((psio)->GNCT[(u32Pin)].DATCTL)= \
677 ((psio)->GNCT[(u32Pin)].DATCTL & ~PSIO_GNCT_DATCTL_INDATWD_Msk & ~PSIO_GNCT_DATCTL_OUTDATWD_Msk) \
678 |((u32InWidth==0?0:(u32InWidth-1))<<PSIO_GNCT_DATCTL_INDATWD_Pos)|((u32OutWidth==0?0:(u32OutWidth-1))<<PSIO_GNCT_DATCTL_OUTDATWD_Pos))
679
680 /**
681 * @brief Set specified pin data order
682 *
683 * @param[in] psio The pointer of the specified PSIO module
684 * @param[in] u32Pin The selected Pin. Valid values are
685 * - \ref PSIO_PIN0
686 * - \ref PSIO_PIN1
687 * - \ref PSIO_PIN2
688 * - \ref PSIO_PIN3
689 * - \ref PSIO_PIN4
690 * - \ref PSIO_PIN5
691 * - \ref PSIO_PIN6
692 * - \ref PSIO_PIN7
693 * @param[in] u32Order The data order. Valid values are
694 * - \ref PSIO_LSB
695 * - \ref PSIO_MSB
696 *
697 * @return None
698 *
699 * @details This macro set data order.
700 * \hideinitializer
701 */
702 #define PSIO_SET_ORDER(psio, u32Pin, u32Order) (((psio)->GNCT[(u32Pin)].DATCTL)= \
703 (PSIO->GNCT[(u32Pin)].DATCTL & ~PSIO_GNCT_DATCTL_ORDER_Msk)|(u32Order))
704
705 /**
706 * @brief Set specified pin output data depth
707 *
708 * @param[in] psio The pointer of the specified PSIO module
709 * @param[in] u32Pin The selected Pin. Valid values are
710 * - \ref PSIO_PIN0
711 * - \ref PSIO_PIN1
712 * - \ref PSIO_PIN2
713 * - \ref PSIO_PIN3
714 * - \ref PSIO_PIN4
715 * - \ref PSIO_PIN5
716 * - \ref PSIO_PIN6
717 * - \ref PSIO_PIN7
718 * @param[in] u32Depth The data depth. Valid values are
719 * - \ref PSIO_DEPTH1
720 * - \ref PSIO_DEPTH2
721 * - \ref PSIO_DEPTH3
722 * - \ref PSIO_DEPTH4
723 *
724 * @return None
725 *
726 * @details This macro set output data order.
727 * \hideinitializer
728 */
729 #define PSIO_SET_OUTPUT_DEPTH(psio, u32Pin, u32Depth) ((psio)->GNCT[(u32Pin)].DATCTL= \
730 (PSIO->GNCT[(u32Pin)].DATCTL & ~PSIO_GNCT_DATCTL_OUTDEPTH_Msk)|((u32Depth)<<PSIO_GNCT_DATCTL_OUTDEPTH_Pos))
731
732 /**
733 * @brief Set specified pin input data depth
734 *
735 * @param[in] psio The pointer of the specified PSIO module
736 * @param[in] u32Pin The selected Pin. Valid values are
737 * - \ref PSIO_PIN0
738 * - \ref PSIO_PIN1
739 * - \ref PSIO_PIN2
740 * - \ref PSIO_PIN3
741 * - \ref PSIO_PIN4
742 * - \ref PSIO_PIN5
743 * - \ref PSIO_PIN6
744 * - \ref PSIO_PIN7
745 * @param[in] u32Depth The data depth. Valid values are
746 * - \ref PSIO_DEPTH1
747 * - \ref PSIO_DEPTH2
748 * - \ref PSIO_DEPTH3
749 * - \ref PSIO_DEPTH4
750 *
751 * @return None
752 *
753 * @details This macro set input data order.
754 * \hideinitializer
755 */
756 #define PSIO_SET_INPUT_DEPTH(psio, u32Pin, u32Depth) ((psio)->GNCT[(u32Pin)].DATCTL= \
757 (PSIO->GNCT[(u32Pin)].DATCTL & ~PSIO_GNCT_DATCTL_INDEPTH_Msk)|((u32Depth)<<PSIO_GNCT_DATCTL_INDEPTH_Pos))
758
759 /**
760 * @brief Get specified pin input status
761 *
762 * @param[in] psio The pointer of the specified PSIO module
763 * @param[in] u32Pin The selected Pin. Valid values are
764 * - \ref PSIO_PIN0
765 * - \ref PSIO_PIN1
766 * - \ref PSIO_PIN2
767 * - \ref PSIO_PIN3
768 * - \ref PSIO_PIN4
769 * - \ref PSIO_PIN5
770 * - \ref PSIO_PIN6
771 * - \ref PSIO_PIN7
772 *
773 * @return The specified pin input status
774 *
775 * @details This macro get specified pin input status.
776 * \hideinitializer
777 */
778 #define PSIO_GET_INPUT_STATUS(psio, u32Pin) (psio->GNCT[u32Pin].INSTS&0xFF)
779
780 /**
781 * @brief Get specified pin input data
782 *
783 * @param[in] psio The pointer of the specified PSIO module
784 * @param[in] u32Pin The selected Pin. Valid values are
785 * - \ref PSIO_PIN0
786 * - \ref PSIO_PIN1
787 * - \ref PSIO_PIN2
788 * - \ref PSIO_PIN3
789 * - \ref PSIO_PIN4
790 * - \ref PSIO_PIN5
791 * - \ref PSIO_PIN6
792 * - \ref PSIO_PIN7
793 *
794 * @return The specified pin input data
795 *
796 * @details This macro get specified pin input data.
797 * \hideinitializer
798 */
799 #define PSIO_GET_INPUT_DATA(psio, u32Pin) (psio->GNCT[u32Pin].INDAT)
800
801 /**
802 * @brief Set specified pin output data
803 *
804 * @param[in] psio The pointer of the specified PSIO module
805 * @param[in] u32Pin The selected Pin. Valid values are
806 * - \ref PSIO_PIN0
807 * - \ref PSIO_PIN1
808 * - \ref PSIO_PIN2
809 * - \ref PSIO_PIN3
810 * - \ref PSIO_PIN4
811 * - \ref PSIO_PIN5
812 * - \ref PSIO_PIN6
813 * - \ref PSIO_PIN7
814 * @param[in] u32Data The output data
815 *
816 * @return None
817 *
818 * @details This macro set specified pin output data.
819 * \hideinitializer
820 */
821 #define PSIO_SET_OUTPUT_DATA(psio, u32Pin, u32Data) (psio->GNCT[u32Pin].OUTDAT = (u32Data))
822
823 /**
824 * @brief Set specified pin check point and slot link
825 *
826 * @param[in] psio The pointer of the specified PSIO module
827 * @param[in] u32Pin The selected Pin. Valid values are
828 * - \ref PSIO_PIN0
829 * - \ref PSIO_PIN1
830 * - \ref PSIO_PIN2
831 * - \ref PSIO_PIN3
832 * - \ref PSIO_PIN4
833 * - \ref PSIO_PIN5
834 * - \ref PSIO_PIN6
835 * - \ref PSIO_PIN7
836 * @param[in] u32CheckPoint The selected check point. Valid values are
837 * - \ref PSIO_CP0
838 * - \ref PSIO_CP1
839 * - \ref PSIO_CP2
840 * - \ref PSIO_CP3
841 * - \ref PSIO_CP4
842 * - \ref PSIO_CP5
843 * - \ref PSIO_CP6
844 * - \ref PSIO_CP7
845 * @param[in] u32Slot The selected slot. Valid values are
846 * - \ref PSIO_SLOT0
847 * - \ref PSIO_SLOT1
848 * - \ref PSIO_SLOT2
849 * - \ref PSIO_SLOT3
850 * - \ref PSIO_SLOT4
851 * - \ref PSIO_SLOT5
852 * - \ref PSIO_SLOT6
853 * - \ref PSIO_SLOT7
854 *
855 * @return None
856 *
857 * @details This macro used to link check point and slot.
858 * \hideinitializer
859 */
860 #define PSIO_SET_CHECKPOINT(psio, u32Pin, u32CheckPoint, u32Slot) (psio->GNCT[(u32Pin)].CPCTL0= \
861 (psio->GNCT[(u32Pin)].CPCTL0 & ~(PSIO_GNCT_CPCTL0_CKPT0_Msk<<((u32CheckPoint)*PSIO_GNCT_CPCTL0_CKPT1_Pos))) \
862 |((u32Slot)<<((u32CheckPoint)*PSIO_GNCT_CPCTL0_CKPT1_Pos)))
863
864 /**
865 * @brief Clear specified pin check point and slot link
866 *
867 * @param[in] psio The pointer of the specified PSIO module
868 * @param[in] u32Pin The selected Pin. Valid values are
869 * - \ref PSIO_PIN0
870 * - \ref PSIO_PIN1
871 * - \ref PSIO_PIN2
872 * - \ref PSIO_PIN3
873 * - \ref PSIO_PIN4
874 * - \ref PSIO_PIN5
875 * - \ref PSIO_PIN6
876 * - \ref PSIO_PIN7
877 * @param[in] u32CheckPoint The selected check point. Valid values are
878 * - \ref PSIO_CP0
879 * - \ref PSIO_CP1
880 * - \ref PSIO_CP2
881 * - \ref PSIO_CP3
882 * - \ref PSIO_CP4
883 * - \ref PSIO_CP5
884 * - \ref PSIO_CP6
885 * - \ref PSIO_CP7
886 *
887 * @return None
888 *
889 * @details This macro used to clear the link of check point and slot.
890 * \hideinitializer
891 */
892 #define PSIO_CLEAR_CHECKPOINT(psio, u32Pin, u32CheckPoint) (psio->GNCT[(u32Pin)].CPCTL0= \
893 psio->GNCT[(u32Pin)].CPCTL0 & ~(PSIO_GNCT_CPCTL0_CKPT0_Msk<<((u32CheckPoint)*PSIO_GNCT_CPCTL0_CKPT1_Pos)))
894
895 /**
896 * @brief Set specified pin action of check point
897 *
898 * @param[in] psio The pointer of the specified PSIO module
899 * @param[in] u32Pin The selected Pin. Valid values are
900 * - \ref PSIO_PIN0
901 * - \ref PSIO_PIN1
902 * - \ref PSIO_PIN2
903 * - \ref PSIO_PIN3
904 * - \ref PSIO_PIN4
905 * - \ref PSIO_PIN5
906 * - \ref PSIO_PIN6
907 * - \ref PSIO_PIN7
908 * @param[in] u32CheckPoint The selected check point. Valid values are
909 * - \ref PSIO_CP0
910 * - \ref PSIO_CP1
911 * - \ref PSIO_CP2
912 * - \ref PSIO_CP3
913 * - \ref PSIO_CP4
914 * - \ref PSIO_CP5
915 * - \ref PSIO_CP6
916 * - \ref PSIO_CP7
917 * @param[in] u32Action The selected action. Valid values are
918 * - \ref PSIO_OUT_LOW
919 * - \ref PSIO_OUT_HIGH
920 * - \ref PSIO_OUT_BUFFER
921 * - \ref PSIO_OUT_TOGGLE
922 * - \ref PSIO_IN_BUFFER
923 * - \ref PSIO_IN_STATUS
924 * - \ref PSIO_IN_STATUS_UPDATE
925 *
926 * @return None
927 *
928 * @details This macro used to set specified pin action of check point.
929 * \hideinitializer
930 */
931 #define PSIO_SET_ACTION(psio, u32Pin, u32CheckPoint, u32Action) (psio->GNCT[(u32Pin)].CPCTL1= \
932 (psio->GNCT[(u32Pin)].CPCTL1 & ~(PSIO_GNCT_CPCTL1_CKPT0ACT_Msk<<((u32CheckPoint)*PSIO_GNCT_CPCTL1_CKPT1ACT_Pos))) \
933 |((u32Action)<<((u32CheckPoint)*PSIO_GNCT_CPCTL1_CKPT1ACT_Pos)))
934
935 /*---------------------------------------------------------------------------------------------------------*/
936 /* inline functions */
937 /*---------------------------------------------------------------------------------------------------------*/
938 /**
939 * @brief Set interrupt control
940 *
941 * @param[in] psio The pointer of the specified PSIO module
942 * @param[in] u32SC The selected slot controller
943 * @param[in] u32Int The interrupt type. Valid values are
944 * - \ref PSIO_INT0
945 * - \ref PSIO_INT1
946 * @param[in] u32Slot The selected slot. Valid values are
947 * - \ref PSIO_SLOT0
948 * - \ref PSIO_SLOT1
949 * - \ref PSIO_SLOT2
950 * - \ref PSIO_SLOT3
951 * - \ref PSIO_SLOT4
952 * - \ref PSIO_SLOT5
953 * - \ref PSIO_SLOT6
954 * - \ref PSIO_SLOT7
955 *
956 * @return None
957 *
958 * @details This function is used to set the selected slot controller, interrupt type and slot.
959 * \hideinitializer
960 */
PSIO_SET_INTCTL(PSIO_T * psio,uint32_t u32SC,uint32_t u32Int,uint32_t u32Slot)961 __STATIC_INLINE void PSIO_SET_INTCTL(PSIO_T *psio, uint32_t u32SC, uint32_t u32Int, uint32_t u32Slot)
962 {
963 if (u32Int == PSIO_INT0)
964 {
965 (psio)->INTCTL = (((psio)->INTCTL & ~PSIO_INTCTL_CONI0SS_Msk & ~PSIO_INTCTL_CONI0SCS_Msk)
966 | ((u32SC) << PSIO_INTCTL_CONI0SCS_Pos)
967 | ((u32Slot) << PSIO_INTCTL_CONI0SS_Pos));
968 }
969 else if (u32Int == PSIO_INT1)
970 {
971 (psio)->INTCTL = (((psio)->INTCTL & ~PSIO_INTCTL_CONI1SS_Msk & ~PSIO_INTCTL_CONI1SCS_Msk)
972 | ((u32SC) << PSIO_INTCTL_CONI1SCS_Pos)
973 | ((u32Slot) << PSIO_INTCTL_CONI1SS_Pos));
974 }
975 }
976
977 /**
978 * @brief Clear interrupt control setting
979 *
980 * @param[in] psio The pointer of the specified PSIO module
981 * @param[in] u32Int The interrupt type. Valid values are
982 * - \ref PSIO_INT0
983 * - \ref PSIO_INT1
984 *
985 * @return None
986 *
987 * @details This function is used to clear the selected slot controller, interrupt type and slot.
988 * \hideinitializer
989 */
PSIO_CLEAR_INTCTL(PSIO_T * psio,uint32_t u32Int)990 __STATIC_INLINE void PSIO_CLEAR_INTCTL(PSIO_T *psio, uint32_t u32Int)
991 {
992 if (u32Int == PSIO_INT0)
993 {
994 (psio)->INTCTL = ((psio)->INTCTL & ~PSIO_INTCTL_CONI0SS_Msk & ~PSIO_INTCTL_CONI0SCS_Msk);
995 }
996 else if (u32Int == PSIO_INT1)
997 {
998 (psio)->INTCTL = ((psio)->INTCTL & ~PSIO_INTCTL_CONI1SS_Msk & ~PSIO_INTCTL_CONI1SCS_Msk);
999 }
1000 }
1001
1002 /**
1003 * @brief Set Slot controller control
1004 *
1005 * @param[in] psio The pointer of the specified PSIO module
1006 * @param[in] u32SC The selected slot controller
1007 * @param[in] u32InitSlot The selected initial slot of the repeat period. Valid values are
1008 * - \ref PSIO_SLOT0
1009 * - \ref PSIO_SLOT1
1010 * - \ref PSIO_SLOT2
1011 * - \ref PSIO_SLOT3
1012 * - \ref PSIO_SLOT4
1013 * - \ref PSIO_SLOT5
1014 * - \ref PSIO_SLOT6
1015 * - \ref PSIO_SLOT7
1016 * @param[in] u32EndSlot The selected end slot of the repeat period. Valid values are
1017 * - \ref PSIO_SLOT0
1018 * - \ref PSIO_SLOT1
1019 * - \ref PSIO_SLOT2
1020 * - \ref PSIO_SLOT3
1021 * - \ref PSIO_SLOT4
1022 * - \ref PSIO_SLOT5
1023 * - \ref PSIO_SLOT6
1024 * - \ref PSIO_SLOT7
1025 * @param[in] u32LoopCnt The slot period loop count. Valid values are
1026 * - 0x0 : Disable
1027 * - 0x1~0x3E : Repeat slot 0x2~0x3F times
1028 * - 0x3F : Loop until stop PSIO slot controller
1029 * @param[in] u32Repeat Repeat mode Enable/Disable. Valid values are
1030 * - \ref PSIO_REPEAT_ENABLE
1031 * - \ref PSIO_REPEAT_DISABLE
1032 *
1033 * @return None
1034 *
1035 * @details This function is used to set the slot controller loop and repeat configuration.
1036 * \hideinitializer
1037 */
PSIO_SET_SCCTL(PSIO_T * psio,uint32_t u32SC,uint32_t u32InitSlot,uint32_t u32EndSlot,uint32_t u32LoopCnt,uint32_t u32Repeat)1038 __STATIC_INLINE void PSIO_SET_SCCTL(PSIO_T *psio, uint32_t u32SC, uint32_t u32InitSlot, uint32_t u32EndSlot, uint32_t u32LoopCnt, uint32_t u32Repeat)
1039 {
1040 (psio)->SCCT[u32SC].SCCTL = ((psio)->SCCT[u32SC].SCCTL & ~PSIO_SCCT_SCCTL_INISLOT_Msk & ~PSIO_SCCT_SCCTL_ENDSLOT_Msk & ~PSIO_SCCT_SCCTL_SPLCNT_Msk)
1041 | ((u32InitSlot) << PSIO_SCCT_SCCTL_INISLOT_Pos)
1042 | ((u32EndSlot) << PSIO_SCCT_SCCTL_ENDSLOT_Pos)
1043 | ((u32LoopCnt & 0x3F) << PSIO_SCCT_SCCTL_SPLCNT_Pos);
1044
1045 if (u32Repeat == PSIO_REPEAT_ENABLE)
1046 (psio)->SCCT[u32SC].SCCTL |= PSIO_SCCT_SCCTL_REPEAT_Msk;
1047 else if (u32Repeat == PSIO_REPEAT_DISABLE)
1048 (psio)->SCCT[u32SC].SCCTL &= ~PSIO_SCCT_SCCTL_REPEAT_Msk;
1049 }
1050
1051 /**
1052 * @brief Set Pin general control
1053 *
1054 * @param[in] psio The pointer of the specified PSIO module
1055 * @param[in] u32Pin The selected Pin. Valid values are
1056 * - \ref PSIO_PIN0
1057 * - \ref PSIO_PIN1
1058 * - \ref PSIO_PIN2
1059 * - \ref PSIO_PIN3
1060 * - \ref PSIO_PIN4
1061 * - \ref PSIO_PIN5
1062 * - \ref PSIO_PIN6
1063 * - \ref PSIO_PIN7
1064 * @param[in] u32PinEn The selected Pin enable/disable. Valid values are
1065 * - \ref PSIO_PIN_ENABLE
1066 * - \ref PSIO_PIN_DISABLE
1067 * @param[in] u32SC The selected slot controller for check point. Valid values are
1068 * - \ref PSIO_SC0
1069 * - \ref PSIO_SC1
1070 * - \ref PSIO_SC2
1071 * - \ref PSIO_SC3
1072 * @param[in] u32IOMode The pin I/O mode. Valid values are
1073 * - \ref PSIO_INPUT_MODE
1074 * - \ref PSIO_OUTPUT_MODE
1075 * - \ref PSIO_OPENDRAIN_MODE
1076 * - \ref PSIO_QUASI_MODE
1077 * @param[in] u32PinInit The pin initial status. Valid values are
1078 * - \ref PSIO_LOW_LEVEL
1079 * - \ref PSIO_HIGH_LEVEL
1080 * - \ref PSIO_LAST_OUTPUT
1081 * - \ref PSIO_Toggle
1082 * @param[in] u32PinInterval The pin interval status. Valid values are
1083 * - \ref PSIO_LOW_LEVEL
1084 * - \ref PSIO_HIGH_LEVEL
1085 * - \ref PSIO_LAST_OUTPUT
1086 * - \ref PSIO_Toggle
1087 *
1088 * @return None
1089 *
1090 * @details This function is used to set the general control.
1091 * \hideinitializer
1092 */
PSIO_SET_GENCTL(PSIO_T * psio,uint32_t u32Pin,uint32_t u32PinEn,uint32_t u32SC,uint32_t u32IOMode,uint32_t u32PinInit,uint32_t u32PinInterval)1093 __STATIC_INLINE void PSIO_SET_GENCTL(PSIO_T *psio, uint32_t u32Pin, uint32_t u32PinEn, uint32_t u32SC, uint32_t u32IOMode, uint32_t u32PinInit, uint32_t u32PinInterval)
1094 {
1095 (psio)->GNCT[u32Pin].GENCTL = ((psio)->GNCT[u32Pin].GENCTL & ~PSIO_GNCT_GENCTL_SCSEL_Msk & ~PSIO_GNCT_GENCTL_IOMODE_Msk
1096 & ~PSIO_GNCT_GENCTL_INITIAL_Msk & ~PSIO_GNCT_GENCTL_INTERVAL_Msk)
1097 | ((u32SC) << PSIO_GNCT_GENCTL_SCSEL_Pos) | ((u32IOMode) << PSIO_GNCT_GENCTL_IOMODE_Pos)
1098 | ((u32PinInit) << PSIO_GNCT_GENCTL_INITIAL_Pos) | ((u32PinInterval) << PSIO_GNCT_GENCTL_INTERVAL_Pos);
1099
1100 if (u32PinEn == PSIO_PIN_ENABLE)
1101 (psio)->GNCT[u32Pin].GENCTL |= PSIO_GNCT_GENCTL_PINEN_Msk;
1102 else if (u32PinEn == PSIO_PIN_DISABLE)
1103 (psio)->GNCT[u32Pin].GENCTL &= ~PSIO_GNCT_GENCTL_PINEN_Msk;
1104 }
1105
1106 /**
1107 * @brief Set Pin mode switch
1108 *
1109 * @param[in] psio The pointer of the specified PSIO module
1110 * @param[in] u32Pin The selected Pin. Valid values are
1111 * - \ref PSIO_PIN0
1112 * - \ref PSIO_PIN1
1113 * - \ref PSIO_PIN2
1114 * - \ref PSIO_PIN3
1115 * - \ref PSIO_PIN4
1116 * - \ref PSIO_PIN5
1117 * - \ref PSIO_PIN6
1118 * - \ref PSIO_PIN7
1119 * @param[in] u32SwPoint The switch point. Valid values are
1120 * - \ref PSIO_SWITCH_P0
1121 * - \ref PSIO_SWITCH_P1
1122 * @param[in] u32SwMode The switch mode. Valid values are
1123 * - \ref PSIO_INPUT_MODE
1124 * - \ref PSIO_OUTPUT_MODE
1125 * - \ref PSIO_OPENDRAIN_MODE
1126 * - \ref PSIO_QUASI_MODE
1127 * @param[in] u32SwCP The switch I/O mode at which point. Valid values are
1128 * - \ref PSIO_CP0
1129 * - \ref PSIO_CP1
1130 * - \ref PSIO_CP2
1131 * - \ref PSIO_CP3
1132 * - \ref PSIO_CP4
1133 * - \ref PSIO_CP5
1134 * - \ref PSIO_CP6
1135 * - \ref PSIO_CP7
1136 * @return None
1137 *
1138 * @details This function is used to set the pin mode switch.
1139 * \hideinitializer
1140 */
PSIO_SWITCH_MODE(PSIO_T * psio,uint32_t u32Pin,uint32_t u32SwPoint,uint32_t u32SwMode,uint32_t u32SwCP)1141 __STATIC_INLINE void PSIO_SWITCH_MODE(PSIO_T *psio, uint32_t u32Pin, uint32_t u32SwPoint, uint32_t u32SwMode, uint32_t u32SwCP)
1142 {
1143 if (u32SwPoint == PSIO_SWITCH_P0)
1144 {
1145 (psio)->GNCT[u32Pin].GENCTL = ((psio)->GNCT[u32Pin].GENCTL & ~PSIO_GNCT_GENCTL_MODESW0_Msk & ~PSIO_GNCT_GENCTL_SW0CP_Msk)
1146 | ((u32SwMode) << PSIO_GNCT_GENCTL_MODESW0_Pos) | ((u32SwCP + 1) << PSIO_GNCT_GENCTL_SW0CP_Pos);
1147 }
1148 else if (u32SwPoint == PSIO_SWITCH_P1)
1149 {
1150 (psio)->GNCT[u32Pin].GENCTL = ((psio)->GNCT[u32Pin].GENCTL & ~PSIO_GNCT_GENCTL_MODESW1_Msk & ~PSIO_GNCT_GENCTL_SW1CP_Msk)
1151 | ((u32SwMode) << PSIO_GNCT_GENCTL_MODESW1_Pos) | ((u32SwCP + 1) << PSIO_GNCT_GENCTL_SW1CP_Pos);
1152 }
1153 }
1154
1155 /**
1156 * @brief Set specified pin check point and slot link, and pin action of check point
1157 *
1158 * @param[in] psio The pointer of the specified PSIO module
1159 * @param[in] u32Pin The selected Pin. Valid values are
1160 * - \ref PSIO_PIN0
1161 * - \ref PSIO_PIN1
1162 * - \ref PSIO_PIN2
1163 * - \ref PSIO_PIN3
1164 * - \ref PSIO_PIN4
1165 * - \ref PSIO_PIN5
1166 * - \ref PSIO_PIN6
1167 * - \ref PSIO_PIN7
1168 * @param[in] sConfig The selected check point configurations.
1169 *
1170 * @return None
1171 *
1172 * @details This macro used to link check point and slot, and set pin action of check point.
1173 * \hideinitializer
1174 */
PSIO_SET_CP_CONFIG(PSIO_T * psio,uint32_t u32Pin,const S_PSIO_CP_CONFIG * sConfig)1175 __STATIC_INLINE void PSIO_SET_CP_CONFIG(PSIO_T *psio, uint32_t u32Pin, const S_PSIO_CP_CONFIG *sConfig)
1176 {
1177 psio->GNCT[u32Pin].CPCTL0 = *(uint32_t *)sConfig;
1178 psio->GNCT[u32Pin].CPCTL1 = *((uint32_t *)sConfig + 1);
1179 }
1180
1181 /*@}*/ /* end of group PSIO_EXPORTED_FUNCTIONS */
1182
1183 /*@}*/ /* end of group PSIO_Driver */
1184
1185 /*@}*/ /* end of group Standard_Driver */
1186
1187 #ifdef __cplusplus
1188 }
1189 #endif
1190
1191 #endif /* __PSIO_H__ */
1192
