1 /*
2 * Copyright (c) 2023 - 2025, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRFX_RRAMC_H__
35 #define NRFX_RRAMC_H__
36
37 #include <nrfx.h>
38 #include <haly/nrfy_rramc.h>
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /**
45 * @defgroup nrfx_rramc RRAMC driver
46 * @{
47 * @ingroup nrf_rramc
48 * @brief Resistive Random Access Memory Controller (RRAMC) peripheral driver.
49 */
50
51 /** @brief Configuration structure of the RRAMC driver instance. */
52 typedef struct
53 {
54 bool mode_write; ///< True if write mode is to be enabled, false otherwise.
55 uint8_t write_buff_size; ///< Size of write buffer. If set to 0, buffering is disabled.
56 uint16_t preload_timeout; ///< Preload value expressed in clock cycles.
57 bool preload_timeout_enable; ///< True if writing to RRAM is to be triggered on the next timeout, false otherwise.
58 uint16_t access_timeout; ///< Access timeout used either for going into standby power mode or to remain active on wake up, expressed in clock cycles.
59 bool abort_on_pof; ///< True if the current RRAM write operation is to be aborted on the power failure, false otherwise.
60 uint8_t irq_priority; ///< Interrupt priority.
61 } nrfx_rramc_config_t;
62
63 /**
64 * @brief RRAMC driver default configuration.
65 *
66 * This configuration sets up RRAMC with the following options:
67 * - Write mode disabled
68 * - Preload timeout value: 0x80
69 * - Write to the RRAM on the next timeout enabled
70 * - Access timeout: 0x100
71 * - Write operation is to be aborted on the power failure
72 *
73 * @param[in] _write_buff_size Size of write buffer.
74 */
75 #define NRFX_RRAMC_DEFAULT_CONFIG(_write_buff_size) \
76 { \
77 .mode_write = false, \
78 .write_buff_size = _write_buff_size, \
79 .preload_timeout = 0x80, \
80 .preload_timeout_enable = true, \
81 .access_timeout = 0x100, \
82 .abort_on_pof = true, \
83 .irq_priority = NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY, \
84 }
85
86 /**
87 * @brief RRAMC driver event handler type.
88 *
89 * @param[in] event_type RRAMC event.
90 */
91 typedef void (* nrfx_rramc_evt_handler_t)(nrf_rramc_event_t const event_type);
92
93 /**
94 * @brief Function for erasing the whole RRAM memory.
95 *
96 * @note All user code and UICR will be erased.
97 */
98 void nrfx_rramc_all_erase(void);
99
100 /**
101 * @brief Function for writing a single byte to RRAM.
102 *
103 * To determine if the last RRAM write operation has been completed,
104 * use @ref nrfx_rramc_ready_check(). The status is not updated during writes to write-buffer.
105 *
106 * @note Depending on the source of the code being executed,
107 * the CPU may be halted during the operation.
108 * Refer to the Product Specification for more information.
109 *
110 * @param[in] address Address to where data is to be written.
111 * @param[in] value Value to be written.
112 */
113 void nrfx_rramc_byte_write(uint32_t address, uint8_t value);
114
115 /**
116 * @brief Function for writing consecutive bytes to RRAM.
117 *
118 * To determine if the last RRAM write operation has been completed,
119 * use @ref nrfx_rramc_ready_check(). The status is not updated during writes to write-buffer.
120 *
121 * @note Depending on the source of the code being executed,
122 * the CPU may be halted during the operation.
123 * Refer to the Product Specification for more information.
124 *
125 * @param[in] address Address to where data is to be written.
126 * @param[in] src Pointer to data to be copied.
127 * @param[in] num_bytes Number of bytes to be written.
128 */
129 void nrfx_rramc_bytes_write(uint32_t address, void const * src, uint32_t num_bytes);
130
131 /**
132 * @brief Function for writing a 32-bit word to RRAM.
133 *
134 * To determine if the last RRAM write operation has been completed,
135 * use @ref nrfx_rramc_ready_check(). The status is not updated during writes to write-buffer.
136 *
137 * @note Depending on the source of the code being executed,
138 * the CPU may be halted during the operation.
139 * Refer to the Product Specification for more information.
140 *
141 * @param[in] address Address to where data is to be written. Must be word-aligned.
142 * @param[in] value Value to be written.
143 */
144 void nrfx_rramc_word_write(uint32_t address, uint32_t value);
145
146 /**
147 * @brief Function for writing consecutive 32-bit words to RRAM.
148 *
149 * To determine if the last RRAM write operation has been completed,
150 * use @ref nrfx_rramc_ready_check(). The status is not updated during writes to write-buffer.
151 *
152 * @note Depending on the source of the code being executed,
153 * the CPU may be halted during the operation.
154 * Refer to the Product Specification for more information.
155 *
156 * @param[in] address Address to where data is to be written. Must be word-aligned.
157 * @param[in] src Pointer to data to be copied. Must be word-aligned.
158 * @param[in] num_words Number of words to be written.
159 */
160 void nrfx_rramc_words_write(uint32_t address, void const * src, uint32_t num_words);
161
162 /**
163 * @brief Function for enabling write mode and setting size of write buffer.
164 *
165 * @param[in] enable True if write mode is to be enabled, false otherwise.
166 * @param[in] write_buff_size Size of write buffer. If set to 0, buffering is disabled.
167 */
168 void nrfx_rramc_write_enable_set(bool enable, uint32_t write_buff_size);
169
170 /**
171 * @brief Function for checking if write mode is enabled.
172 *
173 * @return True if write mode is enabled, false otherwise.
174 */
175 bool nrfx_rramc_write_enable_check(void);
176
177 /**
178 * @brief Function for initializing the RRAMC driver instance.
179 *
180 * @param[in] p_config Pointer to the structure containing configuration.
181 * @param[in] handler Event handler provided by the user.
182 *
183 * @retval NRFX_SUCCESS Initialization was successful.
184 * @retval NRFX_ERROR_ALREADY The driver has already been initialized.
185 */
186 nrfx_err_t nrfx_rramc_init(nrfx_rramc_config_t const * p_config,
187 nrfx_rramc_evt_handler_t handler);
188
189 /**
190 * @brief Function for reconfiguring the RRAMC driver instance.
191 *
192 * @param[in] p_config Pointer to the structure containing configuration.
193 *
194 * @retval NRFX_SUCCESS Reconfiguration was successful.
195 * @retval NRFX_ERROR_INVALID_STATE The driver is uninitialized.
196 */
197 nrfx_err_t nrfx_rramc_reconfigure(nrfx_rramc_config_t const * p_config);
198
199 /** @brief Function for uninitializing the RRAMC driver instance. */
200 void nrfx_rramc_uninit(void);
201
202 /**
203 * @brief Function for getting the total RRAM size in bytes.
204 *
205 * @note The function will return @p FICR_INFO_RRAM_RRAM_Unspecified value
206 * if the total RRAM size cannot be determined based on the FICR data.
207 *
208 * @return RRAM total size in bytes.
209 */
210 uint32_t nrfx_rramc_memory_size_get(void);
211
212 /**
213 * @brief Function for reading a word from the OTP in UICR.
214 *
215 * OTP is a region of the UICR present in some chips. This function must be used
216 * to read word data from this region since unaligned accesses are not
217 * available on the OTP RRAM area.
218 *
219 * @param[in] index Address (index) in OTP table from which a word is to be read.
220 *
221 * @retval The contents at @p index.
222 */
223 NRFX_STATIC_INLINE uint32_t nrfx_rramc_otp_word_read(uint32_t index);
224
225 /**
226 * @brief Function for writing a 32-bit word at index position to OTP region in UICR.
227 *
228 * The OTP is only able to write '0' to bits in the UICR that are erased (set to '1').
229 * It cannot rewrite a bit back to '1'. This function checks if the value currently
230 * residing at the specified index can be transformed to the desired value
231 * without any '0' to '1' transitions. If yes, then perform the write operation.
232 *
233 * @param[in] index Address (index) in OTP table to which a word it to be written.
234 * @param[in] value Value to be written.
235 *
236 * @retval true Word can be written into the specified OTP index address.
237 * @retval false Word cannot be written into the specified OTP index address.
238 * Erase UICR or change index address.
239 */
240 NRFX_STATIC_INLINE bool nrfx_rramc_otp_word_write(uint32_t index, uint32_t value);
241
242 /**
243 * @brief Function for reading a byte from the RRAM.
244 *
245 * Use this function in case accessing the RRAM gives the possibility
246 * to run the code in an environment where the flash is simulated.
247 *
248 * @param[in] address Address of the byte to be read.
249 *
250 * @return Value read from RRAM.
251 */
252 NRFX_STATIC_INLINE uint8_t nrfx_rramc_byte_read(uint32_t address);
253
254 /**
255 * @brief Function for reading a 32-bit word from the RRAM.
256 *
257 * Use this function in case accessing the RRAM gives the possibility
258 * to run the code in an environment where the flash is simulated.
259 *
260 * @param[in] address Address of the word to be read.
261 *
262 * @return Value read from RRAM.
263 */
264 NRFX_STATIC_INLINE uint32_t nrfx_rramc_word_read(uint32_t address);
265
266 /**
267 * @brief Function for reading a given number of bytes from the RRAM into the specified buffer.
268 *
269 * @param[out] dst Pointer to the buffer to store the data.
270 * @param[in] address Address of the first byte to be read.
271 * @param[in] num_bytes Number of bytes to be read.
272 *
273 */
274 NRFX_STATIC_INLINE void nrfx_rramc_buffer_read(void * dst, uint32_t address, uint32_t num_bytes);
275
276 /**
277 * @brief Function for checking current RRAMC operation status.
278 *
279 * The status is updated for all RRAMC operations except during read and writes to write-buffer.
280 *
281 * @retval true Current operation is completed, and RRAMC is ready.
282 * @retval false RRAMC is busy.
283 */
284 NRFX_STATIC_INLINE bool nrfx_rramc_ready_check(void);
285
286 #ifndef NRFX_DECLARE_ONLY
287
nrfx_rramc_otp_word_read(uint32_t index)288 NRFX_STATIC_INLINE uint32_t nrfx_rramc_otp_word_read(uint32_t index)
289 {
290 return nrfy_rramc_otp_word_read(index);
291 }
292
nrfx_rramc_otp_word_write(uint32_t index,uint32_t value)293 NRFX_STATIC_INLINE bool nrfx_rramc_otp_word_write(uint32_t index, uint32_t value)
294 {
295 return nrfy_rramc_otp_word_write(NRF_RRAMC, index, value);
296 }
297
nrfx_rramc_byte_read(uint32_t address)298 NRFX_STATIC_INLINE uint8_t nrfx_rramc_byte_read(uint32_t address)
299 {
300 return nrfy_rramc_byte_read(address);
301 }
302
nrfx_rramc_word_read(uint32_t address)303 NRFX_STATIC_INLINE uint32_t nrfx_rramc_word_read(uint32_t address)
304 {
305 return nrfy_rramc_word_read(address);
306 }
307
nrfx_rramc_buffer_read(void * dst,uint32_t address,uint32_t num_bytes)308 NRFX_STATIC_INLINE void nrfx_rramc_buffer_read(void * dst, uint32_t address, uint32_t num_bytes)
309 {
310 nrfy_rramc_buffer_read(dst, address, num_bytes);
311 }
312
nrfx_rramc_ready_check(void)313 NRFX_STATIC_INLINE bool nrfx_rramc_ready_check(void)
314 {
315 return nrfy_rramc_ready_check(NRF_RRAMC);
316 }
317
318 #endif // NRFX_DECLARE_ONLY
319
320 /** @} */
321
322 void nrfx_rramc_irq_handler(void);
323
324 #ifdef __cplusplus
325 }
326 #endif
327
328 #endif // NRFX_RRAMC_H__
329