1 /* 2 3 Copyright (c) 2010 - 2024, Nordic Semiconductor ASA All rights reserved. 4 5 SPDX-License-Identifier: BSD-3-Clause 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, this 11 list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of Nordic Semiconductor ASA nor the names of its 18 contributors may be used to endorse or promote products derived from this 19 software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 */ 34 35 #ifndef NRF9230_ENGA_PPR_H 36 #define NRF9230_ENGA_PPR_H 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 43 #ifdef NRF_PPR /*!< Processor information is domain local. */ 44 45 46 /* =========================================================================================================================== */ 47 /* ================ Interrupt Number Definition ================ */ 48 /* =========================================================================================================================== */ 49 50 typedef enum { 51 /* ===================================================== Core Interrupts ===================================================== */ 52 /* ============================================== Processor Specific Interrupts ============================================== */ 53 VPRCLIC_0_IRQn = 0, /*!< 0 VPRCLIC_0 */ 54 VPRCLIC_1_IRQn = 1, /*!< 1 VPRCLIC_1 */ 55 VPRCLIC_2_IRQn = 2, /*!< 2 VPRCLIC_2 */ 56 VPRCLIC_3_IRQn = 3, /*!< 3 VPRCLIC_3 */ 57 VPRCLIC_4_IRQn = 4, /*!< 4 VPRCLIC_4 */ 58 VPRCLIC_5_IRQn = 5, /*!< 5 VPRCLIC_5 */ 59 VPRCLIC_6_IRQn = 6, /*!< 6 VPRCLIC_6 */ 60 VPRCLIC_7_IRQn = 7, /*!< 7 VPRCLIC_7 */ 61 VPRCLIC_8_IRQn = 8, /*!< 8 VPRCLIC_8 */ 62 VPRCLIC_9_IRQn = 9, /*!< 9 VPRCLIC_9 */ 63 VPRCLIC_10_IRQn = 10, /*!< 10 VPRCLIC_10 */ 64 VPRCLIC_11_IRQn = 11, /*!< 11 VPRCLIC_11 */ 65 VPRCLIC_12_IRQn = 12, /*!< 12 VPRCLIC_12 */ 66 VPRCLIC_13_IRQn = 13, /*!< 13 VPRCLIC_13 */ 67 VPRCLIC_14_IRQn = 14, /*!< 14 VPRCLIC_14 */ 68 VPRCLIC_15_IRQn = 15, /*!< 15 VPRCLIC_15 */ 69 VPRTIM_IRQn = 16, /*!< 16 VPRTIM */ 70 GPIOTE130_0_IRQn = 104, /*!< 104 GPIOTE130_0 */ 71 GPIOTE130_1_IRQn = 105, /*!< 105 GPIOTE130_1 */ 72 GPIOTE131_0_IRQn = 106, /*!< 106 GPIOTE131_0 */ 73 GPIOTE131_1_IRQn = 107, /*!< 107 GPIOTE131_1 */ 74 GRTC_0_IRQn = 108, /*!< 108 GRTC_0 */ 75 GRTC_1_IRQn = 109, /*!< 109 GRTC_1 */ 76 GRTC_2_IRQn = 110, /*!< 110 GRTC_2 */ 77 TBM_IRQn = 127, /*!< 127 TBM */ 78 USBHS_IRQn = 134, /*!< 134 USBHS */ 79 EXMIF_IRQn = 149, /*!< 149 EXMIF */ 80 IPCT120_0_IRQn = 209, /*!< 209 IPCT120_0 */ 81 I3C120_IRQn = 211, /*!< 211 I3C120 */ 82 VPR121_IRQn = 212, /*!< 212 VPR121 */ 83 CAN120_IRQn = 216, /*!< 216 CAN120 */ 84 MVDMA120_IRQn = 217, /*!< 217 MVDMA120 */ 85 CAN121_IRQn = 219, /*!< 219 CAN121 */ 86 MVDMA121_IRQn = 220, /*!< 220 MVDMA121 */ 87 I3C121_IRQn = 222, /*!< 222 I3C121 */ 88 TIMER120_IRQn = 226, /*!< 226 TIMER120 */ 89 TIMER121_IRQn = 227, /*!< 227 TIMER121 */ 90 PWM120_IRQn = 228, /*!< 228 PWM120 */ 91 SPIS120_IRQn = 229, /*!< 229 SPIS120 */ 92 SPIM120_UARTE120_IRQn = 230, /*!< 230 SPIM120_UARTE120 */ 93 SPIM121_IRQn = 231, /*!< 231 SPIM121 */ 94 VPR130_IRQn = 264, /*!< 264 VPR130 */ 95 IPCT130_0_IRQn = 289, /*!< 289 IPCT130_0 */ 96 RTC130_IRQn = 296, /*!< 296 RTC130 */ 97 RTC131_IRQn = 297, /*!< 297 RTC131 */ 98 WDT131_IRQn = 299, /*!< 299 WDT131 */ 99 WDT132_IRQn = 300, /*!< 300 WDT132 */ 100 EGU130_IRQn = 301, /*!< 301 EGU130 */ 101 SAADC_IRQn = 386, /*!< 386 SAADC */ 102 COMP_LPCOMP_IRQn = 387, /*!< 387 COMP_LPCOMP */ 103 TEMP_IRQn = 388, /*!< 388 TEMP */ 104 I2S130_IRQn = 402, /*!< 402 I2S130 */ 105 PDM_IRQn = 403, /*!< 403 PDM */ 106 QDEC130_IRQn = 404, /*!< 404 QDEC130 */ 107 QDEC131_IRQn = 405, /*!< 405 QDEC131 */ 108 I2S131_IRQn = 407, /*!< 407 I2S131 */ 109 TIMER130_IRQn = 418, /*!< 418 TIMER130 */ 110 TIMER131_IRQn = 419, /*!< 419 TIMER131 */ 111 PWM130_IRQn = 420, /*!< 420 PWM130 */ 112 SERIAL0_IRQn = 421, /*!< 421 SERIAL0 */ 113 SERIAL1_IRQn = 422, /*!< 422 SERIAL1 */ 114 TIMER132_IRQn = 434, /*!< 434 TIMER132 */ 115 TIMER133_IRQn = 435, /*!< 435 TIMER133 */ 116 PWM131_IRQn = 436, /*!< 436 PWM131 */ 117 SERIAL2_IRQn = 437, /*!< 437 SERIAL2 */ 118 SERIAL3_IRQn = 438, /*!< 438 SERIAL3 */ 119 TIMER134_IRQn = 450, /*!< 450 TIMER134 */ 120 TIMER135_IRQn = 451, /*!< 451 TIMER135 */ 121 PWM132_IRQn = 452, /*!< 452 PWM132 */ 122 SERIAL4_IRQn = 453, /*!< 453 SERIAL4 */ 123 SERIAL5_IRQn = 454, /*!< 454 SERIAL5 */ 124 TIMER136_IRQn = 466, /*!< 466 TIMER136 */ 125 TIMER137_IRQn = 467, /*!< 467 TIMER137 */ 126 PWM133_IRQn = 468, /*!< 468 PWM133 */ 127 SERIAL6_IRQn = 469, /*!< 469 SERIAL6 */ 128 SERIAL7_IRQn = 470, /*!< 470 SERIAL7 */ 129 } IRQn_Type; 130 131 /* ==================================================== Interrupt Aliases ==================================================== */ 132 #define SPIM120_IRQn SPIM120_UARTE120_IRQn 133 #define SPIM120_IRQHandler SPIM120_UARTE120_IRQHandler 134 #define UARTE120_IRQn SPIM120_UARTE120_IRQn 135 #define UARTE120_IRQHandler SPIM120_UARTE120_IRQHandler 136 #define COMP_IRQn COMP_LPCOMP_IRQn 137 #define COMP_IRQHandler COMP_LPCOMP_IRQHandler 138 #define LPCOMP_IRQn COMP_LPCOMP_IRQn 139 #define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler 140 #define SPIM130_IRQn SERIAL0_IRQn 141 #define SPIM130_IRQHandler SERIAL0_IRQHandler 142 #define SPIS130_IRQn SERIAL0_IRQn 143 #define SPIS130_IRQHandler SERIAL0_IRQHandler 144 #define TWIM130_IRQn SERIAL0_IRQn 145 #define TWIM130_IRQHandler SERIAL0_IRQHandler 146 #define TWIS130_IRQn SERIAL0_IRQn 147 #define TWIS130_IRQHandler SERIAL0_IRQHandler 148 #define UARTE130_IRQn SERIAL0_IRQn 149 #define UARTE130_IRQHandler SERIAL0_IRQHandler 150 #define SPIM131_IRQn SERIAL1_IRQn 151 #define SPIM131_IRQHandler SERIAL1_IRQHandler 152 #define SPIS131_IRQn SERIAL1_IRQn 153 #define SPIS131_IRQHandler SERIAL1_IRQHandler 154 #define TWIM131_IRQn SERIAL1_IRQn 155 #define TWIM131_IRQHandler SERIAL1_IRQHandler 156 #define TWIS131_IRQn SERIAL1_IRQn 157 #define TWIS131_IRQHandler SERIAL1_IRQHandler 158 #define UARTE131_IRQn SERIAL1_IRQn 159 #define UARTE131_IRQHandler SERIAL1_IRQHandler 160 #define SPIM132_IRQn SERIAL2_IRQn 161 #define SPIM132_IRQHandler SERIAL2_IRQHandler 162 #define SPIS132_IRQn SERIAL2_IRQn 163 #define SPIS132_IRQHandler SERIAL2_IRQHandler 164 #define TWIM132_IRQn SERIAL2_IRQn 165 #define TWIM132_IRQHandler SERIAL2_IRQHandler 166 #define TWIS132_IRQn SERIAL2_IRQn 167 #define TWIS132_IRQHandler SERIAL2_IRQHandler 168 #define UARTE132_IRQn SERIAL2_IRQn 169 #define UARTE132_IRQHandler SERIAL2_IRQHandler 170 #define SPIM133_IRQn SERIAL3_IRQn 171 #define SPIM133_IRQHandler SERIAL3_IRQHandler 172 #define SPIS133_IRQn SERIAL3_IRQn 173 #define SPIS133_IRQHandler SERIAL3_IRQHandler 174 #define TWIM133_IRQn SERIAL3_IRQn 175 #define TWIM133_IRQHandler SERIAL3_IRQHandler 176 #define TWIS133_IRQn SERIAL3_IRQn 177 #define TWIS133_IRQHandler SERIAL3_IRQHandler 178 #define UARTE133_IRQn SERIAL3_IRQn 179 #define UARTE133_IRQHandler SERIAL3_IRQHandler 180 #define SPIM134_IRQn SERIAL4_IRQn 181 #define SPIM134_IRQHandler SERIAL4_IRQHandler 182 #define SPIS134_IRQn SERIAL4_IRQn 183 #define SPIS134_IRQHandler SERIAL4_IRQHandler 184 #define TWIM134_IRQn SERIAL4_IRQn 185 #define TWIM134_IRQHandler SERIAL4_IRQHandler 186 #define TWIS134_IRQn SERIAL4_IRQn 187 #define TWIS134_IRQHandler SERIAL4_IRQHandler 188 #define UARTE134_IRQn SERIAL4_IRQn 189 #define UARTE134_IRQHandler SERIAL4_IRQHandler 190 #define SPIM135_IRQn SERIAL5_IRQn 191 #define SPIM135_IRQHandler SERIAL5_IRQHandler 192 #define SPIS135_IRQn SERIAL5_IRQn 193 #define SPIS135_IRQHandler SERIAL5_IRQHandler 194 #define TWIM135_IRQn SERIAL5_IRQn 195 #define TWIM135_IRQHandler SERIAL5_IRQHandler 196 #define TWIS135_IRQn SERIAL5_IRQn 197 #define TWIS135_IRQHandler SERIAL5_IRQHandler 198 #define UARTE135_IRQn SERIAL5_IRQn 199 #define UARTE135_IRQHandler SERIAL5_IRQHandler 200 #define SPIM136_IRQn SERIAL6_IRQn 201 #define SPIM136_IRQHandler SERIAL6_IRQHandler 202 #define SPIS136_IRQn SERIAL6_IRQn 203 #define SPIS136_IRQHandler SERIAL6_IRQHandler 204 #define TWIM136_IRQn SERIAL6_IRQn 205 #define TWIM136_IRQHandler SERIAL6_IRQHandler 206 #define TWIS136_IRQn SERIAL6_IRQn 207 #define TWIS136_IRQHandler SERIAL6_IRQHandler 208 #define UARTE136_IRQn SERIAL6_IRQn 209 #define UARTE136_IRQHandler SERIAL6_IRQHandler 210 #define SPIM137_IRQn SERIAL7_IRQn 211 #define SPIM137_IRQHandler SERIAL7_IRQHandler 212 #define SPIS137_IRQn SERIAL7_IRQn 213 #define SPIS137_IRQHandler SERIAL7_IRQHandler 214 #define TWIM137_IRQn SERIAL7_IRQn 215 #define TWIM137_IRQHandler SERIAL7_IRQHandler 216 #define TWIS137_IRQn SERIAL7_IRQn 217 #define TWIS137_IRQHandler SERIAL7_IRQHandler 218 #define UARTE137_IRQn SERIAL7_IRQn 219 #define UARTE137_IRQHandler SERIAL7_IRQHandler 220 221 /* =========================================================================================================================== */ 222 /* ================ Processor and Core Peripheral Section ================ */ 223 /* =========================================================================================================================== */ 224 225 /* ====================== Configuration of the Nordic Semiconductor VPR Processor and Core Peripherals ======================= */ 226 #define __VPR_REV 1.1 /*!< VPR Core Revision */ 227 #define __VPR_REV_MAJOR 1 /*!< VPR Core Major Revision */ 228 #define __VPR_REV_MINOR 1 /*!< VPR Core Minor Revision */ 229 #define __VPR_REV_PATCH 0 /*!< VPR Core Patch Revision */ 230 #define __DSP_PRESENT 0 /*!< DSP present or not */ 231 #define __CLIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ 232 #define __MTVT_PRESENT 1 /*!< CPU supports alternate Vector Table address */ 233 #define __MPU_PRESENT 1 /*!< MPU present */ 234 #define __FPU_PRESENT 0 /*!< FPU present */ 235 #define __FPU_DP 0 /*!< Double Precision FPU */ 236 #define __INTERRUPTS_MAX 480 /*!< Size of interrupt vector table */ 237 238 #define NRF_VPR NRF_VPR130 /*!< VPR instance name */ 239 #include "core_vpr.h" /*!< Nordic Semiconductor VPR processor and core peripherals */ 240 #include "system_nrf.h" /*!< nrf9230_enga_ppr System Library */ 241 242 #endif /*!< NRF_PPR */ 243 244 245 #ifdef NRF_PPR 246 247 #define NRF_DOMAIN NRF_DOMAIN_GLOBALSLOW 248 #define NRF_PROCESSOR NRF_PROCESSOR_PPR 249 #ifndef NRF_OWNER 250 #define NRF_OWNER NRF_OWNER_APPLICATION 251 #endif 252 253 #endif /*!< NRF_PPR */ 254 255 256 /* ========================================= Start of section using anonymous unions ========================================= */ 257 258 #include "compiler_abstraction.h" 259 260 #if defined (__CC_ARM) 261 #pragma push 262 #pragma anon_unions 263 #elif defined (__ICCARM__) 264 #pragma language=extended 265 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 266 #pragma clang diagnostic push 267 #pragma clang diagnostic ignored "-Wc11-extensions" 268 #pragma clang diagnostic ignored "-Wreserved-id-macro" 269 #pragma clang diagnostic ignored "-Wgnu-anonymous-struct" 270 #pragma clang diagnostic ignored "-Wnested-anon-types" 271 #elif defined (__GNUC__) 272 /* anonymous unions are enabled by default */ 273 #elif defined (__TMS470__) 274 /* anonymous unions are enabled by default */ 275 #elif defined (__TASKING__) 276 #pragma warning 586 277 #elif defined (__CSMC__) 278 /* anonymous unions are enabled by default */ 279 #else 280 #warning Unsupported compiler type 281 #endif 282 283 /* =========================================================================================================================== */ 284 /* ================ Peripheral Address Map ================ */ 285 /* =========================================================================================================================== */ 286 287 #define NRF_PPR_VPRCLIC_BASE 0x5F909000UL 288 289 /* =========================================================================================================================== */ 290 /* ================ Peripheral Declaration ================ */ 291 /* =========================================================================================================================== */ 292 293 #define NRF_PPR_VPRCLIC ((NRF_CLIC_Type*) NRF_PPR_VPRCLIC_BASE) 294 295 /* =========================================================================================================================== */ 296 /* ================ Local Domain Remapping ================ */ 297 /* =========================================================================================================================== */ 298 299 #ifdef NRF_PPR /*!< Remap NRF_DOMAIN_X instances to NRF_X symbol for ease of use. */ 300 #define NRF_VPRCLIC NRF_PPR_VPRCLIC 301 #endif /*!< NRF_PPR */ 302 303 /* ========================================== End of section using anonymous unions ========================================== */ 304 305 #if defined (__CC_ARM) 306 #pragma pop 307 #elif defined (__ICCARM__) 308 /* leave anonymous unions enabled */ 309 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 310 #pragma clang diagnostic pop 311 #elif defined (__GNUC__) 312 /* anonymous unions are enabled by default */ 313 #elif defined (__TMS470__) 314 /* anonymous unions are enabled by default */ 315 #elif defined (__TASKING__) 316 #pragma warning restore 317 #elif defined (__CSMC__) 318 /* anonymous unions are enabled by default */ 319 #endif 320 321 322 #ifdef __cplusplus 323 } 324 #endif 325 #endif /* NRF9230_ENGA_PPR_H */ 326 327
