1 /* 2 3 Copyright (c) 2010 - 2024, Nordic Semiconductor ASA All rights reserved. 4 5 SPDX-License-Identifier: BSD-3-Clause 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, this 11 list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of Nordic Semiconductor ASA nor the names of its 18 contributors may be used to endorse or promote products derived from this 19 software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 */ 34 35 #ifndef _NRF9120_PERIPHERALS_H 36 #define _NRF9120_PERIPHERALS_H 37 38 /* UICR */ 39 #define UICR_KEYSLOT_COUNT 128 40 41 /* Clock Peripheral */ 42 #define CLOCK_PRESENT 43 #define CLOCK_COUNT 1 44 45 /* Power Peripheral */ 46 #define POWER_PRESENT 47 #define POWER_COUNT 1 48 49 /* Non-Volatile Memory Controller */ 50 #define NVMC_PRESENT 51 #define NVMC_COUNT 1 52 53 #define NVMC_FEATURE_CACHE_PRESENT 54 55 /* Memory Protection Unit */ 56 #define MPU_REGION_NUM 16 57 58 /* GPIO */ 59 #define GPIO_PRESENT 60 #define GPIO_COUNT 1 61 62 #define P0_PIN_NUM 32 63 64 #define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL 65 66 /* Distributed Peripheral to Peripheral Interconnect */ 67 #define DPPIC_PRESENT 68 #define DPPIC_COUNT 1 69 70 #define DPPIC_CH_NUM 16 71 #define DPPIC_GROUP_NUM 6 72 73 /* Event Generator Unit */ 74 #define EGU_PRESENT 75 #define EGU_COUNT 6 76 77 #define EGU0_CH_NUM 16 78 #define EGU1_CH_NUM 16 79 #define EGU2_CH_NUM 16 80 #define EGU3_CH_NUM 16 81 #define EGU4_CH_NUM 16 82 #define EGU5_CH_NUM 16 83 84 /* Timer/Counter */ 85 #define TIMER_PRESENT 86 #define TIMER_COUNT 3 87 88 #define TIMER0_MAX_SIZE 32 89 #define TIMER1_MAX_SIZE 32 90 #define TIMER2_MAX_SIZE 32 91 92 93 #define TIMER0_CC_NUM 6 94 #define TIMER1_CC_NUM 6 95 #define TIMER2_CC_NUM 6 96 97 /* Real Time Counter */ 98 #define RTC_PRESENT 99 #define RTC_COUNT 2 100 101 #define RTC0_CC_NUM 4 102 #define RTC1_CC_NUM 4 103 104 /* Watchdog Timer */ 105 #define WDT_PRESENT 106 #define WDT_COUNT 1 107 108 /* Serial Peripheral Interface Master with DMA */ 109 #define SPIM_PRESENT 110 #define SPIM_COUNT 4 111 112 #define SPIM0_MAX_DATARATE 8 113 #define SPIM1_MAX_DATARATE 8 114 #define SPIM2_MAX_DATARATE 8 115 #define SPIM3_MAX_DATARATE 8 116 117 #define SPIM0_EASYDMA_MAXCNT_SIZE 13 118 #define SPIM1_EASYDMA_MAXCNT_SIZE 13 119 #define SPIM2_EASYDMA_MAXCNT_SIZE 13 120 #define SPIM3_EASYDMA_MAXCNT_SIZE 13 121 122 /* Serial Peripheral Interface Slave with DMA*/ 123 #define SPIS_PRESENT 124 #define SPIS_COUNT 4 125 126 #define SPIS0_EASYDMA_MAXCNT_SIZE 13 127 #define SPIS1_EASYDMA_MAXCNT_SIZE 13 128 #define SPIS2_EASYDMA_MAXCNT_SIZE 13 129 #define SPIS3_EASYDMA_MAXCNT_SIZE 13 130 131 /* Two Wire Interface Master with DMA */ 132 #define TWIM_PRESENT 133 #define TWIM_COUNT 4 134 135 #define TWIM0_EASYDMA_MAXCNT_SIZE 13 136 #define TWIM1_EASYDMA_MAXCNT_SIZE 13 137 #define TWIM2_EASYDMA_MAXCNT_SIZE 13 138 #define TWIM3_EASYDMA_MAXCNT_SIZE 13 139 140 /* Two Wire Interface Slave with DMA */ 141 #define TWIS_PRESENT 142 #define TWIS_COUNT 4 143 144 #define TWIS0_EASYDMA_MAXCNT_SIZE 13 145 #define TWIS1_EASYDMA_MAXCNT_SIZE 13 146 #define TWIS2_EASYDMA_MAXCNT_SIZE 13 147 #define TWIS3_EASYDMA_MAXCNT_SIZE 13 148 149 /* Universal Asynchronous Receiver-Transmitter with DMA */ 150 #define UARTE_PRESENT 151 #define UARTE_COUNT 4 152 153 #define UARTE0_EASYDMA_MAXCNT_SIZE 13 154 #define UARTE1_EASYDMA_MAXCNT_SIZE 13 155 #define UARTE2_EASYDMA_MAXCNT_SIZE 13 156 #define UARTE3_EASYDMA_MAXCNT_SIZE 13 157 158 /* Successive Approximation Analog to Digital Converter */ 159 #define SAADC_PRESENT 160 #define SAADC_COUNT 1 161 162 #define SAADC_CH_NUM 8 163 #define SAADC_EASYDMA_MAXCNT_SIZE 15 164 165 /* GPIO Tasks and Events */ 166 #define GPIOTE_PRESENT 167 #define GPIOTE_COUNT 2 168 169 #define GPIOTE_CH_NUM 8 170 171 #define GPIOTE_FEATURE_SET_PRESENT 172 #define GPIOTE_FEATURE_CLR_PRESENT 173 174 /* Pulse Width Modulator */ 175 #define PWM_PRESENT 176 #define PWM_COUNT 4 177 178 #define PWM_CH_NUM 4 179 180 #define PWM_EASYDMA_MAXCNT_SIZE 15 181 182 /* Pulse Density Modulator */ 183 #define PDM_PRESENT 184 #define PDM_COUNT 1 185 186 #define PDM_EASYDMA_MAXCNT_SIZE 15 187 188 /* Inter-IC Sound Interface */ 189 #define I2S_PRESENT 190 #define I2S_COUNT 1 191 192 #define I2S_EASYDMA_MAXCNT_SIZE 14 193 194 /* Inter Processor Communication */ 195 #define IPC_PRESENT 196 #define IPC_COUNT 1 197 198 #define IPC_CH_NUM 8 199 #define IPC_CONF_NUM 8 200 #define IPC_GPMEM_NUM 4 201 202 /* FPU */ 203 #define FPU_PRESENT 204 #define FPU_COUNT 1 205 206 /* SPU */ 207 #define SPU_PRESENT 208 #define SPU_COUNT 1 209 210 #define SPU_RAMREGION_SIZE 0x2000ul 211 212 /* CRYPTOCELL */ 213 #define CRYPTOCELL_PRESENT 214 #define CRYPTOCELL_COUNT 1 215 216 /* KMU */ 217 #define KMU_PRESENT 218 #define KMU_COUNT 1 219 220 #define KMU_KEYSLOT_PRESENT 221 222 /* MAGPIO */ 223 #define MAGPIO_PRESENT 224 #define MAGPIO_COUNT 1 225 #define MAGPIO_PIN_NUM 3 226 227 /* REGULATORS */ 228 #define REGULATORS_PRESENT 229 #define REGULATORS_COUNT 1 230 231 232 #endif // _NRF9120_PERIPHERALS_H 233
