1 /* 2 3 Copyright (c) 2010 - 2024, Nordic Semiconductor ASA All rights reserved. 4 5 SPDX-License-Identifier: BSD-3-Clause 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, this 11 list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of Nordic Semiconductor ASA nor the names of its 18 contributors may be used to endorse or promote products derived from this 19 software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 */ 34 35 #ifndef NRF54L15_APPLICATION_H 36 #define NRF54L15_APPLICATION_H 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 43 #ifdef NRF_APPLICATION /*!< Processor information is domain local. */ 44 45 46 /* =========================================================================================================================== */ 47 /* ================ Interrupt Number Definition ================ */ 48 /* =========================================================================================================================== */ 49 50 typedef enum { 51 /* ===================================================== Core Interrupts ===================================================== */ 52 Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset */ 53 NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempted */ 54 HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault */ 55 MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Violation and No 56 Match*/ 57 BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory 58 related Fault*/ 59 UsageFault_IRQn = -10, /*!< -10 Usage Fault, i.e. Undef Instruction, Illegal State Transition */ 60 SecureFault_IRQn = -9, /*!< -9 Secure Fault Handler */ 61 SVCall_IRQn = -5, /*!< -5 System Service Call via SVC instruction */ 62 DebugMonitor_IRQn = -4, /*!< -4 Debug Monitor */ 63 PendSV_IRQn = -2, /*!< -2 Pendable request for system service */ 64 SysTick_IRQn = -1, /*!< -1 System Tick Timer */ 65 /* ============================================== Processor Specific Interrupts ============================================== */ 66 SWI00_IRQn = 28, /*!< 28 SWI00 */ 67 SWI01_IRQn = 29, /*!< 29 SWI01 */ 68 SWI02_IRQn = 30, /*!< 30 SWI02 */ 69 SWI03_IRQn = 31, /*!< 31 SWI03 */ 70 SPU00_IRQn = 64, /*!< 64 SPU00 */ 71 MPC00_IRQn = 65, /*!< 65 MPC00 */ 72 AAR00_CCM00_IRQn = 70, /*!< 70 AAR00_CCM00 */ 73 ECB00_IRQn = 71, /*!< 71 ECB00 */ 74 CRACEN_IRQn = 72, /*!< 72 CRACEN */ 75 SERIAL00_IRQn = 74, /*!< 74 SERIAL00 */ 76 RRAMC_IRQn = 75, /*!< 75 RRAMC */ 77 VPR00_IRQn = 76, /*!< 76 VPR00 */ 78 CTRLAP_IRQn = 82, /*!< 82 CTRLAP */ 79 CM33SS_IRQn = 83, /*!< 83 CM33SS */ 80 TIMER00_IRQn = 85, /*!< 85 TIMER00 */ 81 SPU10_IRQn = 128, /*!< 128 SPU10 */ 82 TIMER10_IRQn = 133, /*!< 133 TIMER10 */ 83 RTC10_IRQn = 134, /*!< 134 RTC10 */ 84 EGU10_IRQn = 135, /*!< 135 EGU10 */ 85 RADIO_0_IRQn = 138, /*!< 138 RADIO_0 */ 86 RADIO_1_IRQn = 139, /*!< 139 RADIO_1 */ 87 SPU20_IRQn = 192, /*!< 192 SPU20 */ 88 SERIAL20_IRQn = 198, /*!< 198 SERIAL20 */ 89 SERIAL21_IRQn = 199, /*!< 199 SERIAL21 */ 90 SERIAL22_IRQn = 200, /*!< 200 SERIAL22 */ 91 EGU20_IRQn = 201, /*!< 201 EGU20 */ 92 TIMER20_IRQn = 202, /*!< 202 TIMER20 */ 93 TIMER21_IRQn = 203, /*!< 203 TIMER21 */ 94 TIMER22_IRQn = 204, /*!< 204 TIMER22 */ 95 TIMER23_IRQn = 205, /*!< 205 TIMER23 */ 96 TIMER24_IRQn = 206, /*!< 206 TIMER24 */ 97 PDM20_IRQn = 208, /*!< 208 PDM20 */ 98 PDM21_IRQn = 209, /*!< 209 PDM21 */ 99 PWM20_IRQn = 210, /*!< 210 PWM20 */ 100 PWM21_IRQn = 211, /*!< 211 PWM21 */ 101 PWM22_IRQn = 212, /*!< 212 PWM22 */ 102 SAADC_IRQn = 213, /*!< 213 SAADC */ 103 NFCT_IRQn = 214, /*!< 214 NFCT */ 104 TEMP_IRQn = 215, /*!< 215 TEMP */ 105 GPIOTE20_0_IRQn = 218, /*!< 218 GPIOTE20_0 */ 106 GPIOTE20_1_IRQn = 219, /*!< 219 GPIOTE20_1 */ 107 TAMPC_IRQn = 220, /*!< 220 TAMPC */ 108 I2S20_IRQn = 221, /*!< 221 I2S20 */ 109 QDEC20_IRQn = 224, /*!< 224 QDEC20 */ 110 QDEC21_IRQn = 225, /*!< 225 QDEC21 */ 111 GRTC_0_IRQn = 226, /*!< 226 GRTC_0 */ 112 GRTC_1_IRQn = 227, /*!< 227 GRTC_1 */ 113 GRTC_2_IRQn = 228, /*!< 228 GRTC_2 */ 114 GRTC_3_IRQn = 229, /*!< 229 GRTC_3 */ 115 SPU30_IRQn = 256, /*!< 256 SPU30 */ 116 SERIAL30_IRQn = 260, /*!< 260 SERIAL30 */ 117 RTC30_IRQn = 261, /*!< 261 RTC30 */ 118 COMP_LPCOMP_IRQn = 262, /*!< 262 COMP_LPCOMP */ 119 WDT30_IRQn = 264, /*!< 264 WDT30 */ 120 WDT31_IRQn = 265, /*!< 265 WDT31 */ 121 GPIOTE30_0_IRQn = 268, /*!< 268 GPIOTE30_0 */ 122 GPIOTE30_1_IRQn = 269, /*!< 269 GPIOTE30_1 */ 123 CLOCK_POWER_IRQn = 270, /*!< 270 CLOCK_POWER */ 124 } IRQn_Type; 125 126 /* ==================================================== Interrupt Aliases ==================================================== */ 127 #define AAR00_IRQn AAR00_CCM00_IRQn 128 #define AAR00_IRQHandler AAR00_CCM00_IRQHandler 129 #define CCM00_IRQn AAR00_CCM00_IRQn 130 #define CCM00_IRQHandler AAR00_CCM00_IRQHandler 131 #define SPIM00_IRQn SERIAL00_IRQn 132 #define SPIM00_IRQHandler SERIAL00_IRQHandler 133 #define SPIS00_IRQn SERIAL00_IRQn 134 #define SPIS00_IRQHandler SERIAL00_IRQHandler 135 #define UARTE00_IRQn SERIAL00_IRQn 136 #define UARTE00_IRQHandler SERIAL00_IRQHandler 137 #define SPIM20_IRQn SERIAL20_IRQn 138 #define SPIM20_IRQHandler SERIAL20_IRQHandler 139 #define SPIS20_IRQn SERIAL20_IRQn 140 #define SPIS20_IRQHandler SERIAL20_IRQHandler 141 #define TWIM20_IRQn SERIAL20_IRQn 142 #define TWIM20_IRQHandler SERIAL20_IRQHandler 143 #define TWIS20_IRQn SERIAL20_IRQn 144 #define TWIS20_IRQHandler SERIAL20_IRQHandler 145 #define UARTE20_IRQn SERIAL20_IRQn 146 #define UARTE20_IRQHandler SERIAL20_IRQHandler 147 #define SPIM21_IRQn SERIAL21_IRQn 148 #define SPIM21_IRQHandler SERIAL21_IRQHandler 149 #define SPIS21_IRQn SERIAL21_IRQn 150 #define SPIS21_IRQHandler SERIAL21_IRQHandler 151 #define TWIM21_IRQn SERIAL21_IRQn 152 #define TWIM21_IRQHandler SERIAL21_IRQHandler 153 #define TWIS21_IRQn SERIAL21_IRQn 154 #define TWIS21_IRQHandler SERIAL21_IRQHandler 155 #define UARTE21_IRQn SERIAL21_IRQn 156 #define UARTE21_IRQHandler SERIAL21_IRQHandler 157 #define SPIM22_IRQn SERIAL22_IRQn 158 #define SPIM22_IRQHandler SERIAL22_IRQHandler 159 #define SPIS22_IRQn SERIAL22_IRQn 160 #define SPIS22_IRQHandler SERIAL22_IRQHandler 161 #define TWIM22_IRQn SERIAL22_IRQn 162 #define TWIM22_IRQHandler SERIAL22_IRQHandler 163 #define TWIS22_IRQn SERIAL22_IRQn 164 #define TWIS22_IRQHandler SERIAL22_IRQHandler 165 #define UARTE22_IRQn SERIAL22_IRQn 166 #define UARTE22_IRQHandler SERIAL22_IRQHandler 167 #define SPIM30_IRQn SERIAL30_IRQn 168 #define SPIM30_IRQHandler SERIAL30_IRQHandler 169 #define SPIS30_IRQn SERIAL30_IRQn 170 #define SPIS30_IRQHandler SERIAL30_IRQHandler 171 #define TWIM30_IRQn SERIAL30_IRQn 172 #define TWIM30_IRQHandler SERIAL30_IRQHandler 173 #define TWIS30_IRQn SERIAL30_IRQn 174 #define TWIS30_IRQHandler SERIAL30_IRQHandler 175 #define UARTE30_IRQn SERIAL30_IRQn 176 #define UARTE30_IRQHandler SERIAL30_IRQHandler 177 #define COMP_IRQn COMP_LPCOMP_IRQn 178 #define COMP_IRQHandler COMP_LPCOMP_IRQHandler 179 #define LPCOMP_IRQn COMP_LPCOMP_IRQn 180 #define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler 181 #define CLOCK_IRQn CLOCK_POWER_IRQn 182 #define CLOCK_IRQHandler CLOCK_POWER_IRQHandler 183 #define POWER_IRQn CLOCK_POWER_IRQn 184 #define POWER_IRQHandler CLOCK_POWER_IRQHandler 185 186 /* =========================================================================================================================== */ 187 /* ================ Processor and Core Peripheral Section ================ */ 188 /* =========================================================================================================================== */ 189 190 /* =========================== Configuration of the ARM Cortex-M33 Processor and Core Peripherals ============================ */ 191 #define __CM33_REV r0p4 /*!< CM33 Core Revision */ 192 #define __DSP_PRESENT 1 /*!< DSP present or not */ 193 #define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ 194 #define __VTOR_PRESENT 1 /*!< CPU supports alternate Vector Table address */ 195 #define __MPU_PRESENT 1 /*!< MPU present */ 196 #define __FPU_PRESENT 1 /*!< FPU present */ 197 #define __FPU_DP 0 /*!< Double Precision FPU */ 198 #define __INTERRUPTS_MAX 270 /*!< Size of interrupt vector table */ 199 #define __Vendor_SysTickConfig 0 /*!< Vendor SysTick Config implementation is used */ 200 #define __SAUREGION_PRESENT 1 /*!< SAU present */ 201 #define __NUM_SAUREGIONS 4 /*!< Number of regions */ 202 203 #include "core_cm33.h" /*!< ARM Cortex-M33 processor and core peripherals */ 204 #include "system_nrf.h" /*!< nrf54l15_application System Library */ 205 206 #endif /*!< NRF_APPLICATION */ 207 208 209 #ifdef NRF_APPLICATION 210 211 #define NRF_DOMAIN NRF_DOMAIN_NONE 212 #define NRF_PROCESSOR NRF_PROCESSOR_CM33 213 214 #endif /*!< NRF_APPLICATION */ 215 216 217 /* ========================================= Start of section using anonymous unions ========================================= */ 218 219 #include "compiler_abstraction.h" 220 221 #if defined (__CC_ARM) 222 #pragma push 223 #pragma anon_unions 224 #elif defined (__ICCARM__) 225 #pragma language=extended 226 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 227 #pragma clang diagnostic push 228 #pragma clang diagnostic ignored "-Wc11-extensions" 229 #pragma clang diagnostic ignored "-Wreserved-id-macro" 230 #pragma clang diagnostic ignored "-Wgnu-anonymous-struct" 231 #pragma clang diagnostic ignored "-Wnested-anon-types" 232 #elif defined (__GNUC__) 233 /* anonymous unions are enabled by default */ 234 #elif defined (__TMS470__) 235 /* anonymous unions are enabled by default */ 236 #elif defined (__TASKING__) 237 #pragma warning 586 238 #elif defined (__CSMC__) 239 /* anonymous unions are enabled by default */ 240 #else 241 #warning Unsupported compiler type 242 #endif 243 244 /* =========================================================================================================================== */ 245 /* ================ Peripheral Address Map ================ */ 246 /* =========================================================================================================================== */ 247 248 #define NRF_APPLICATION_ICACHEDATA_S_BASE 0x12F00000UL 249 #define NRF_APPLICATION_ICACHEINFO_S_BASE 0x12F10000UL 250 #define NRF_APPLICATION_TPIU_NS_BASE 0xE0040000UL 251 #define NRF_APPLICATION_ETM_NS_BASE 0xE0041000UL 252 #define NRF_APPLICATION_CPUC_S_BASE 0xE0080000UL 253 #define NRF_APPLICATION_ICACHE_S_BASE 0xE0082000UL 254 #define NRF_APPLICATION_SWI00_S_BASE 0x5001C000UL 255 #define NRF_APPLICATION_SWI01_S_BASE 0x5001D000UL 256 #define NRF_APPLICATION_SWI02_S_BASE 0x5001E000UL 257 #define NRF_APPLICATION_SWI03_S_BASE 0x5001F000UL 258 259 /* =========================================================================================================================== */ 260 /* ================ Peripheral Declaration ================ */ 261 /* =========================================================================================================================== */ 262 263 #define NRF_APPLICATION_ICACHEDATA_S ((NRF_CACHEDATA_Type*) NRF_APPLICATION_ICACHEDATA_S_BASE) 264 #define NRF_APPLICATION_ICACHEINFO_S ((NRF_CACHEINFO_Type*) NRF_APPLICATION_ICACHEINFO_S_BASE) 265 #define NRF_APPLICATION_TPIU_NS ((NRF_TPIU_Type*) NRF_APPLICATION_TPIU_NS_BASE) 266 #define NRF_APPLICATION_ETM_NS ((NRF_ETM_Type*) NRF_APPLICATION_ETM_NS_BASE) 267 #define NRF_APPLICATION_CPUC_S ((NRF_CPUC_Type*) NRF_APPLICATION_CPUC_S_BASE) 268 #define NRF_APPLICATION_ICACHE_S ((NRF_CACHE_Type*) NRF_APPLICATION_ICACHE_S_BASE) 269 #define NRF_APPLICATION_SWI00_S ((NRF_SWI_Type*) NRF_APPLICATION_SWI00_S_BASE) 270 #define NRF_APPLICATION_SWI01_S ((NRF_SWI_Type*) NRF_APPLICATION_SWI01_S_BASE) 271 #define NRF_APPLICATION_SWI02_S ((NRF_SWI_Type*) NRF_APPLICATION_SWI02_S_BASE) 272 #define NRF_APPLICATION_SWI03_S ((NRF_SWI_Type*) NRF_APPLICATION_SWI03_S_BASE) 273 274 /* =========================================================================================================================== */ 275 /* ================ TrustZone Remapping ================ */ 276 /* =========================================================================================================================== */ 277 278 #ifdef NRF_TRUSTZONE_NONSECURE /*!< Remap NRF_X_NS instances to NRF_X symbol for ease of use. */ 279 #define NRF_APPLICATION_TPIU NRF_APPLICATION_TPIU_NS 280 #define NRF_APPLICATION_ETM NRF_APPLICATION_ETM_NS 281 #else /*!< Remap NRF_X_S instances to NRF_X symbol for ease of use. */ 282 #define NRF_APPLICATION_ICACHEDATA NRF_APPLICATION_ICACHEDATA_S 283 #define NRF_APPLICATION_ICACHEINFO NRF_APPLICATION_ICACHEINFO_S 284 #define NRF_APPLICATION_TPIU NRF_APPLICATION_TPIU_NS 285 #define NRF_APPLICATION_ETM NRF_APPLICATION_ETM_NS 286 #define NRF_APPLICATION_CPUC NRF_APPLICATION_CPUC_S 287 #define NRF_APPLICATION_ICACHE NRF_APPLICATION_ICACHE_S 288 #define NRF_APPLICATION_SWI00 NRF_APPLICATION_SWI00_S 289 #define NRF_APPLICATION_SWI01 NRF_APPLICATION_SWI01_S 290 #define NRF_APPLICATION_SWI02 NRF_APPLICATION_SWI02_S 291 #define NRF_APPLICATION_SWI03 NRF_APPLICATION_SWI03_S 292 #endif /*!< NRF_TRUSTZONE_NONSECURE */ 293 294 /* =========================================================================================================================== */ 295 /* ================ Local Domain Remapping ================ */ 296 /* =========================================================================================================================== */ 297 298 #ifdef NRF_APPLICATION /*!< Remap NRF_DOMAIN_X instances to NRF_X symbol for ease of use. */ 299 #ifdef NRF_TRUSTZONE_NONSECURE /*!< Remap only nonsecure instances. */ 300 #define NRF_TPIU NRF_APPLICATION_TPIU 301 #define NRF_ETM NRF_APPLICATION_ETM 302 #else /*!< Remap all instances. */ 303 #define NRF_ICACHEDATA NRF_APPLICATION_ICACHEDATA 304 #define NRF_ICACHEINFO NRF_APPLICATION_ICACHEINFO 305 #define NRF_TPIU NRF_APPLICATION_TPIU 306 #define NRF_ETM NRF_APPLICATION_ETM 307 #define NRF_CPUC NRF_APPLICATION_CPUC 308 #define NRF_ICACHE NRF_APPLICATION_ICACHE 309 #define NRF_SWI00 NRF_APPLICATION_SWI00 310 #define NRF_SWI01 NRF_APPLICATION_SWI01 311 #define NRF_SWI02 NRF_APPLICATION_SWI02 312 #define NRF_SWI03 NRF_APPLICATION_SWI03 313 #endif /*!< NRF_TRUSTZONE_NONSECURE */ 314 #endif /*!< NRF_APPLICATION */ 315 316 /* ========================================== End of section using anonymous unions ========================================== */ 317 318 #if defined (__CC_ARM) 319 #pragma pop 320 #elif defined (__ICCARM__) 321 /* leave anonymous unions enabled */ 322 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 323 #pragma clang diagnostic pop 324 #elif defined (__GNUC__) 325 /* anonymous unions are enabled by default */ 326 #elif defined (__TMS470__) 327 /* anonymous unions are enabled by default */ 328 #elif defined (__TASKING__) 329 #pragma warning restore 330 #elif defined (__CSMC__) 331 /* anonymous unions are enabled by default */ 332 #endif 333 334 335 #ifdef __cplusplus 336 } 337 #endif 338 #endif /* NRF54L15_APPLICATION_H */ 339 340
