1 /* 2 3 Copyright (c) 2010 - 2024, Nordic Semiconductor ASA All rights reserved. 4 5 SPDX-License-Identifier: BSD-3-Clause 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, this 11 list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of Nordic Semiconductor ASA nor the names of its 18 contributors may be used to endorse or promote products derived from this 19 software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 */ 34 35 #ifndef NRF54H20_ENGA_PPR_H 36 #define NRF54H20_ENGA_PPR_H 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 43 #ifdef NRF_PPR /*!< Processor information is domain local. */ 44 45 46 /* =========================================================================================================================== */ 47 /* ================ Interrupt Number Definition ================ */ 48 /* =========================================================================================================================== */ 49 50 typedef enum { 51 /* ===================================================== Core Interrupts ===================================================== */ 52 /* ============================================== Processor Specific Interrupts ============================================== */ 53 VPRCLIC_0_IRQn = 0, /*!< 0 VPRCLIC_0 */ 54 VPRCLIC_1_IRQn = 1, /*!< 1 VPRCLIC_1 */ 55 VPRCLIC_2_IRQn = 2, /*!< 2 VPRCLIC_2 */ 56 VPRCLIC_3_IRQn = 3, /*!< 3 VPRCLIC_3 */ 57 VPRCLIC_4_IRQn = 4, /*!< 4 VPRCLIC_4 */ 58 VPRCLIC_5_IRQn = 5, /*!< 5 VPRCLIC_5 */ 59 VPRCLIC_6_IRQn = 6, /*!< 6 VPRCLIC_6 */ 60 VPRCLIC_7_IRQn = 7, /*!< 7 VPRCLIC_7 */ 61 VPRCLIC_8_IRQn = 8, /*!< 8 VPRCLIC_8 */ 62 VPRCLIC_9_IRQn = 9, /*!< 9 VPRCLIC_9 */ 63 VPRCLIC_10_IRQn = 10, /*!< 10 VPRCLIC_10 */ 64 VPRCLIC_11_IRQn = 11, /*!< 11 VPRCLIC_11 */ 65 VPRCLIC_12_IRQn = 12, /*!< 12 VPRCLIC_12 */ 66 VPRCLIC_13_IRQn = 13, /*!< 13 VPRCLIC_13 */ 67 VPRCLIC_14_IRQn = 14, /*!< 14 VPRCLIC_14 */ 68 VPRCLIC_15_IRQn = 15, /*!< 15 VPRCLIC_15 */ 69 VPRTIM_IRQn = 32, /*!< 32 VPRTIM */ 70 GPIOTE130_0_IRQn = 104, /*!< 104 GPIOTE130_0 */ 71 GPIOTE130_1_IRQn = 105, /*!< 105 GPIOTE130_1 */ 72 GRTC_0_IRQn = 108, /*!< 108 GRTC_0 */ 73 GRTC_1_IRQn = 109, /*!< 109 GRTC_1 */ 74 TBM_IRQn = 127, /*!< 127 TBM */ 75 USBHS_IRQn = 134, /*!< 134 USBHS */ 76 EXMIF_IRQn = 149, /*!< 149 EXMIF */ 77 IPCT120_0_IRQn = 209, /*!< 209 IPCT120_0 */ 78 I3C120_IRQn = 211, /*!< 211 I3C120 */ 79 VPR121_IRQn = 212, /*!< 212 VPR121 */ 80 CAN_IRQn = 216, /*!< 216 CAN */ 81 I3C121_IRQn = 222, /*!< 222 I3C121 */ 82 TIMER120_IRQn = 226, /*!< 226 TIMER120 */ 83 TIMER121_IRQn = 227, /*!< 227 TIMER121 */ 84 PWM120_IRQn = 228, /*!< 228 PWM120 */ 85 SPIS120_UARTE120_IRQn = 229, /*!< 229 SPIS120_UARTE120 */ 86 SPIM120_IRQn = 230, /*!< 230 SPIM120 */ 87 SPIM121_IRQn = 231, /*!< 231 SPIM121 */ 88 VPR130_IRQn = 264, /*!< 264 VPR130 */ 89 IPCT130_0_IRQn = 289, /*!< 289 IPCT130_0 */ 90 RTC130_IRQn = 296, /*!< 296 RTC130 */ 91 RTC131_IRQn = 297, /*!< 297 RTC131 */ 92 WDT131_IRQn = 299, /*!< 299 WDT131 */ 93 WDT132_IRQn = 300, /*!< 300 WDT132 */ 94 SAADC_IRQn = 386, /*!< 386 SAADC */ 95 COMP_LPCOMP_IRQn = 387, /*!< 387 COMP_LPCOMP */ 96 TEMP_IRQn = 388, /*!< 388 TEMP */ 97 NFCT_IRQn = 389, /*!< 389 NFCT */ 98 I2S130_IRQn = 402, /*!< 402 I2S130 */ 99 PDM_IRQn = 403, /*!< 403 PDM */ 100 QDEC130_IRQn = 404, /*!< 404 QDEC130 */ 101 QDEC131_IRQn = 405, /*!< 405 QDEC131 */ 102 I2S131_IRQn = 407, /*!< 407 I2S131 */ 103 TIMER130_IRQn = 418, /*!< 418 TIMER130 */ 104 TIMER131_IRQn = 419, /*!< 419 TIMER131 */ 105 PWM130_IRQn = 420, /*!< 420 PWM130 */ 106 SERIAL0_IRQn = 421, /*!< 421 SERIAL0 */ 107 SERIAL1_IRQn = 422, /*!< 422 SERIAL1 */ 108 TIMER132_IRQn = 434, /*!< 434 TIMER132 */ 109 TIMER133_IRQn = 435, /*!< 435 TIMER133 */ 110 PWM131_IRQn = 436, /*!< 436 PWM131 */ 111 SERIAL2_IRQn = 437, /*!< 437 SERIAL2 */ 112 SERIAL3_IRQn = 438, /*!< 438 SERIAL3 */ 113 TIMER134_IRQn = 450, /*!< 450 TIMER134 */ 114 TIMER135_IRQn = 451, /*!< 451 TIMER135 */ 115 PWM132_IRQn = 452, /*!< 452 PWM132 */ 116 SERIAL4_IRQn = 453, /*!< 453 SERIAL4 */ 117 SERIAL5_IRQn = 454, /*!< 454 SERIAL5 */ 118 TIMER136_IRQn = 466, /*!< 466 TIMER136 */ 119 TIMER137_IRQn = 467, /*!< 467 TIMER137 */ 120 PWM133_IRQn = 468, /*!< 468 PWM133 */ 121 SERIAL6_IRQn = 469, /*!< 469 SERIAL6 */ 122 SERIAL7_IRQn = 470, /*!< 470 SERIAL7 */ 123 } IRQn_Type; 124 125 /* ==================================================== Interrupt Aliases ==================================================== */ 126 #define SPIS120_IRQn SPIS120_UARTE120_IRQn 127 #define SPIS120_IRQHandler SPIS120_UARTE120_IRQHandler 128 #define UARTE120_IRQn SPIS120_UARTE120_IRQn 129 #define UARTE120_IRQHandler SPIS120_UARTE120_IRQHandler 130 #define COMP_IRQn COMP_LPCOMP_IRQn 131 #define COMP_IRQHandler COMP_LPCOMP_IRQHandler 132 #define LPCOMP_IRQn COMP_LPCOMP_IRQn 133 #define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler 134 #define SPIM130_IRQn SERIAL0_IRQn 135 #define SPIM130_IRQHandler SERIAL0_IRQHandler 136 #define SPIS130_IRQn SERIAL0_IRQn 137 #define SPIS130_IRQHandler SERIAL0_IRQHandler 138 #define TWIM130_IRQn SERIAL0_IRQn 139 #define TWIM130_IRQHandler SERIAL0_IRQHandler 140 #define TWIS130_IRQn SERIAL0_IRQn 141 #define TWIS130_IRQHandler SERIAL0_IRQHandler 142 #define UARTE130_IRQn SERIAL0_IRQn 143 #define UARTE130_IRQHandler SERIAL0_IRQHandler 144 #define SPIM131_IRQn SERIAL1_IRQn 145 #define SPIM131_IRQHandler SERIAL1_IRQHandler 146 #define SPIS131_IRQn SERIAL1_IRQn 147 #define SPIS131_IRQHandler SERIAL1_IRQHandler 148 #define TWIM131_IRQn SERIAL1_IRQn 149 #define TWIM131_IRQHandler SERIAL1_IRQHandler 150 #define TWIS131_IRQn SERIAL1_IRQn 151 #define TWIS131_IRQHandler SERIAL1_IRQHandler 152 #define UARTE131_IRQn SERIAL1_IRQn 153 #define UARTE131_IRQHandler SERIAL1_IRQHandler 154 #define SPIM132_IRQn SERIAL2_IRQn 155 #define SPIM132_IRQHandler SERIAL2_IRQHandler 156 #define SPIS132_IRQn SERIAL2_IRQn 157 #define SPIS132_IRQHandler SERIAL2_IRQHandler 158 #define TWIM132_IRQn SERIAL2_IRQn 159 #define TWIM132_IRQHandler SERIAL2_IRQHandler 160 #define TWIS132_IRQn SERIAL2_IRQn 161 #define TWIS132_IRQHandler SERIAL2_IRQHandler 162 #define UARTE132_IRQn SERIAL2_IRQn 163 #define UARTE132_IRQHandler SERIAL2_IRQHandler 164 #define SPIM133_IRQn SERIAL3_IRQn 165 #define SPIM133_IRQHandler SERIAL3_IRQHandler 166 #define SPIS133_IRQn SERIAL3_IRQn 167 #define SPIS133_IRQHandler SERIAL3_IRQHandler 168 #define TWIM133_IRQn SERIAL3_IRQn 169 #define TWIM133_IRQHandler SERIAL3_IRQHandler 170 #define TWIS133_IRQn SERIAL3_IRQn 171 #define TWIS133_IRQHandler SERIAL3_IRQHandler 172 #define UARTE133_IRQn SERIAL3_IRQn 173 #define UARTE133_IRQHandler SERIAL3_IRQHandler 174 #define SPIM134_IRQn SERIAL4_IRQn 175 #define SPIM134_IRQHandler SERIAL4_IRQHandler 176 #define SPIS134_IRQn SERIAL4_IRQn 177 #define SPIS134_IRQHandler SERIAL4_IRQHandler 178 #define TWIM134_IRQn SERIAL4_IRQn 179 #define TWIM134_IRQHandler SERIAL4_IRQHandler 180 #define TWIS134_IRQn SERIAL4_IRQn 181 #define TWIS134_IRQHandler SERIAL4_IRQHandler 182 #define UARTE134_IRQn SERIAL4_IRQn 183 #define UARTE134_IRQHandler SERIAL4_IRQHandler 184 #define SPIM135_IRQn SERIAL5_IRQn 185 #define SPIM135_IRQHandler SERIAL5_IRQHandler 186 #define SPIS135_IRQn SERIAL5_IRQn 187 #define SPIS135_IRQHandler SERIAL5_IRQHandler 188 #define TWIM135_IRQn SERIAL5_IRQn 189 #define TWIM135_IRQHandler SERIAL5_IRQHandler 190 #define TWIS135_IRQn SERIAL5_IRQn 191 #define TWIS135_IRQHandler SERIAL5_IRQHandler 192 #define UARTE135_IRQn SERIAL5_IRQn 193 #define UARTE135_IRQHandler SERIAL5_IRQHandler 194 #define SPIM136_IRQn SERIAL6_IRQn 195 #define SPIM136_IRQHandler SERIAL6_IRQHandler 196 #define SPIS136_IRQn SERIAL6_IRQn 197 #define SPIS136_IRQHandler SERIAL6_IRQHandler 198 #define TWIM136_IRQn SERIAL6_IRQn 199 #define TWIM136_IRQHandler SERIAL6_IRQHandler 200 #define TWIS136_IRQn SERIAL6_IRQn 201 #define TWIS136_IRQHandler SERIAL6_IRQHandler 202 #define UARTE136_IRQn SERIAL6_IRQn 203 #define UARTE136_IRQHandler SERIAL6_IRQHandler 204 #define SPIM137_IRQn SERIAL7_IRQn 205 #define SPIM137_IRQHandler SERIAL7_IRQHandler 206 #define SPIS137_IRQn SERIAL7_IRQn 207 #define SPIS137_IRQHandler SERIAL7_IRQHandler 208 #define TWIM137_IRQn SERIAL7_IRQn 209 #define TWIM137_IRQHandler SERIAL7_IRQHandler 210 #define TWIS137_IRQn SERIAL7_IRQn 211 #define TWIS137_IRQHandler SERIAL7_IRQHandler 212 #define UARTE137_IRQn SERIAL7_IRQn 213 #define UARTE137_IRQHandler SERIAL7_IRQHandler 214 215 /* =========================================================================================================================== */ 216 /* ================ Processor and Core Peripheral Section ================ */ 217 /* =========================================================================================================================== */ 218 219 /* ====================== Configuration of the Nordic Semiconductor VPR Processor and Core Peripherals ======================= */ 220 #define __VPR_REV 0.7 /*!< VPR Core Revision */ 221 #define __VPR_REV_MAJOR 0 /*!< VPR Core Major Revision */ 222 #define __VPR_REV_MINOR 7 /*!< VPR Core Minor Revision */ 223 #define __VPR_REV_PATCH 0 /*!< VPR Core Patch Revision */ 224 #define __DSP_PRESENT 0 /*!< DSP present or not */ 225 #define __CLIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ 226 #define __MTVT_PRESENT 1 /*!< CPU supports alternate Vector Table address */ 227 #define __MPU_PRESENT 1 /*!< MPU present */ 228 #define __FPU_PRESENT 0 /*!< FPU present */ 229 #define __FPU_DP 0 /*!< Double Precision FPU */ 230 #define __INTERRUPTS_MAX 480 /*!< Size of interrupt vector table */ 231 232 #define NRF_VPR NRF_VPR130 /*!< VPR instance name */ 233 #include "core_vpr.h" /*!< Nordic Semiconductor VPR processor and core peripherals */ 234 #include "system_nrf.h" /*!< nrf54h20_enga_ppr System Library */ 235 236 #endif /*!< NRF_PPR */ 237 238 239 #ifdef NRF_PPR 240 241 #define NRF_DOMAIN NRF_DOMAIN_GLOBALSLOW 242 #define NRF_PROCESSOR NRF_PROCESSOR_PPR 243 #ifndef NRF_OWNER 244 #define NRF_OWNER NRF_OWNER_APPLICATION 245 #endif 246 247 #endif /*!< NRF_PPR */ 248 249 250 /* ========================================= Start of section using anonymous unions ========================================= */ 251 252 #include "compiler_abstraction.h" 253 254 #if defined (__CC_ARM) 255 #pragma push 256 #pragma anon_unions 257 #elif defined (__ICCARM__) 258 #pragma language=extended 259 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 260 #pragma clang diagnostic push 261 #pragma clang diagnostic ignored "-Wc11-extensions" 262 #pragma clang diagnostic ignored "-Wreserved-id-macro" 263 #pragma clang diagnostic ignored "-Wgnu-anonymous-struct" 264 #pragma clang diagnostic ignored "-Wnested-anon-types" 265 #elif defined (__GNUC__) 266 /* anonymous unions are enabled by default */ 267 #elif defined (__TMS470__) 268 /* anonymous unions are enabled by default */ 269 #elif defined (__TASKING__) 270 #pragma warning 586 271 #elif defined (__CSMC__) 272 /* anonymous unions are enabled by default */ 273 #else 274 #warning Unsupported compiler type 275 #endif 276 277 /* =========================================================================================================================== */ 278 /* ================ Peripheral Address Map ================ */ 279 /* =========================================================================================================================== */ 280 281 #define NRF_PPR_VPRCLIC_NS_BASE 0x4F909000UL 282 #define NRF_PPR_VPRCLIC_S_BASE 0x5F909000UL 283 284 /* =========================================================================================================================== */ 285 /* ================ Peripheral Declaration ================ */ 286 /* =========================================================================================================================== */ 287 288 #define NRF_PPR_VPRCLIC_NS ((NRF_CLIC_Type*) NRF_PPR_VPRCLIC_NS_BASE) 289 #define NRF_PPR_VPRCLIC_S ((NRF_CLIC_Type*) NRF_PPR_VPRCLIC_S_BASE) 290 291 /* =========================================================================================================================== */ 292 /* ================ TrustZone Remapping ================ */ 293 /* =========================================================================================================================== */ 294 295 #ifdef NRF_TRUSTZONE_NONSECURE /*!< Remap NRF_X_NS instances to NRF_X symbol for ease of use. */ 296 #define NRF_PPR_VPRCLIC NRF_PPR_VPRCLIC_NS 297 #else /*!< Remap NRF_X_S instances to NRF_X symbol for ease of use. */ 298 #define NRF_PPR_VPRCLIC NRF_PPR_VPRCLIC_S 299 #endif /*!< NRF_TRUSTZONE_NONSECURE */ 300 301 /* =========================================================================================================================== */ 302 /* ================ Local Domain Remapping ================ */ 303 /* =========================================================================================================================== */ 304 305 #ifdef NRF_PPR /*!< Remap NRF_DOMAIN_X instances to NRF_X symbol for ease of use. */ 306 #ifdef NRF_TRUSTZONE_NONSECURE /*!< Remap only nonsecure instances. */ 307 #define NRF_VPRCLIC NRF_PPR_VPRCLIC 308 #else /*!< Remap all instances. */ 309 #define NRF_VPRCLIC NRF_PPR_VPRCLIC 310 #endif /*!< NRF_TRUSTZONE_NONSECURE */ 311 #endif /*!< NRF_PPR */ 312 313 /* ========================================== End of section using anonymous unions ========================================== */ 314 315 #if defined (__CC_ARM) 316 #pragma pop 317 #elif defined (__ICCARM__) 318 /* leave anonymous unions enabled */ 319 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 320 #pragma clang diagnostic pop 321 #elif defined (__GNUC__) 322 /* anonymous unions are enabled by default */ 323 #elif defined (__TMS470__) 324 /* anonymous unions are enabled by default */ 325 #elif defined (__TASKING__) 326 #pragma warning restore 327 #elif defined (__CSMC__) 328 /* anonymous unions are enabled by default */ 329 #endif 330 331 332 #ifdef __cplusplus 333 } 334 #endif 335 #endif /* NRF54H20_ENGA_PPR_H */ 336 337
