1 /* 2 3 Copyright (c) 2010 - 2024, Nordic Semiconductor ASA All rights reserved. 4 5 SPDX-License-Identifier: BSD-3-Clause 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, this 11 list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of Nordic Semiconductor ASA nor the names of its 18 contributors may be used to endorse or promote products derived from this 19 software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 */ 34 35 #ifndef NRF51_TO_NRF52810_H 36 #define NRF51_TO_NRF52810_H 37 38 /*lint ++flb "Enter library region */ 39 40 /* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52840 devices. 41 * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the 42 * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros 43 * from the nrf51_deprecated.h file. */ 44 45 46 /* Differences between latest nRF51 headers and nRF52810 headers. */ 47 48 /* IRQ */ 49 /* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */ 50 #ifndef SWI0_IRQHandler 51 #define SWI0_IRQHandler SWI0_EGU0_IRQHandler 52 #endif 53 #ifndef SWI1_IRQHandler 54 #define SWI1_IRQHandler SWI1_EGU1_IRQHandler 55 #endif 56 57 #ifndef SWI0_IRQn 58 #define SWI0_IRQn SWI0_EGU0_IRQn 59 #endif 60 #ifndef SWI1_IRQn 61 #define SWI1_IRQn SWI1_EGU1_IRQn 62 #endif 63 64 65 /* UICR */ 66 /* Register RBPCONF was renamed to APPROTECT. */ 67 #ifndef RBPCONF 68 #define RBPCONF APPROTECT 69 #endif 70 71 #ifndef UICR_RBPCONF_PALL_Pos 72 #define UICR_RBPCONF_PALL_Pos UICR_APPROTECT_PALL_Pos 73 #endif 74 #ifndef UICR_RBPCONF_PALL_Msk 75 #define UICR_RBPCONF_PALL_Msk UICR_APPROTECT_PALL_Msk 76 #endif 77 #ifndef UICR_RBPCONF_PALL_Enabled 78 #define UICR_RBPCONF_PALL_Enabled UICR_APPROTECT_PALL_Enabled 79 #endif 80 #ifndef UICR_RBPCONF_PALL_Disabled 81 #define UICR_RBPCONF_PALL_Disabled UICR_APPROTECT_PALL_Disabled 82 #endif 83 84 85 /* GPIO */ 86 /* GPIO port was renamed to P0. */ 87 #ifndef NRF_GPIO 88 #define NRF_GPIO NRF_P0 89 #endif 90 #ifndef NRF_GPIO_BASE 91 #define NRF_GPIO_BASE NRF_P0_BASE 92 #endif 93 94 95 /* QDEC */ 96 /* The registers PSELA, PSELB and PSELLED were restructured into a struct. */ 97 #ifndef PSELLED 98 #define PSELLED PSEL.LED 99 #endif 100 #ifndef PSELA 101 #define PSELA PSEL.A 102 #endif 103 #ifndef PSELB 104 #define PSELB PSEL.B 105 #endif 106 107 108 /* SPIS */ 109 /* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */ 110 #ifndef PSELSCK 111 #define PSELSCK PSEL.SCK 112 #endif 113 #ifndef PSELMISO 114 #define PSELMISO PSEL.MISO 115 #endif 116 #ifndef PSELMOSI 117 #define PSELMOSI PSEL.MOSI 118 #endif 119 #ifndef PSELCSN 120 #define PSELCSN PSEL.CSN 121 #endif 122 123 124 /* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */ 125 #ifndef RXDPTR 126 #define RXDPTR RXD.PTR 127 #endif 128 #ifndef MAXRX 129 #define MAXRX RXD.MAXCNT 130 #endif 131 #ifndef AMOUNTRX 132 #define AMOUNTRX RXD.AMOUNT 133 #endif 134 135 #ifndef SPIS_MAXRX_MAXRX_Pos 136 #define SPIS_MAXRX_MAXRX_Pos SPIS_RXD_MAXCNT_MAXCNT_Pos 137 #endif 138 #ifndef SPIS_MAXRX_MAXRX_Msk 139 #define SPIS_MAXRX_MAXRX_Msk SPIS_RXD_MAXCNT_MAXCNT_Msk 140 #endif 141 142 #ifndef SPIS_AMOUNTRX_AMOUNTRX_Pos 143 #define SPIS_AMOUNTRX_AMOUNTRX_Pos SPIS_RXD_AMOUNT_AMOUNT_Pos 144 #endif 145 #ifndef SPIS_AMOUNTRX_AMOUNTRX_Msk 146 #define SPIS_AMOUNTRX_AMOUNTRX_Msk SPIS_RXD_AMOUNT_AMOUNT_Msk 147 #endif 148 149 /* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */ 150 #ifndef TXDPTR 151 #define TXDPTR TXD.PTR 152 #endif 153 #ifndef MAXTX 154 #define MAXTX TXD.MAXCNT 155 #endif 156 #ifndef AMOUNTTX 157 #define AMOUNTTX TXD.AMOUNT 158 #endif 159 160 #ifndef SPIS_MAXTX_MAXTX_Pos 161 #define SPIS_MAXTX_MAXTX_Pos SPIS_TXD_MAXCNT_MAXCNT_Pos 162 #endif 163 #ifndef SPIS_MAXTX_MAXTX_Msk 164 #define SPIS_MAXTX_MAXTX_Msk SPIS_TXD_MAXCNT_MAXCNT_Msk 165 #endif 166 167 #ifndef SPIS_AMOUNTTX_AMOUNTTX_Pos 168 #define SPIS_AMOUNTTX_AMOUNTTX_Pos SPIS_TXD_AMOUNT_AMOUNT_Pos 169 #endif 170 #ifndef SPIS_AMOUNTTX_AMOUNTTX_Msk 171 #define SPIS_AMOUNTTX_AMOUNTTX_Msk SPIS_TXD_AMOUNT_AMOUNT_Msk 172 #endif 173 174 /* UART */ 175 #ifndef PSELRTS 176 #define PSELRTS PSEL.RTS 177 #endif 178 #ifndef PSELTXD 179 #define PSELTXD PSEL.TXD 180 #endif 181 #ifndef PSELCTS 182 #define PSELCTS PSEL.CTS 183 #endif 184 #ifndef PSELRXD 185 #define PSELRXD PSEL.RXD 186 #endif 187 188 /* From nrf51_deprecated.h. Several macros changed in different versions of nRF52 headers. By defining the following, any code written for any version of nRF52 headers will still compile. */ 189 190 /* NVMC */ 191 /* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */ 192 #ifndef ERASEPROTECTEDPAGE 193 #define ERASEPROTECTEDPAGE ERASEPCR0 194 #endif 195 196 197 /* RADIO */ 198 /* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */ 199 #ifndef RADIO_CRCCNF_SKIP_ADDR_Pos 200 #define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos 201 #endif 202 #ifndef RADIO_CRCCNF_SKIP_ADDR_Msk 203 #define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk 204 #endif 205 #ifndef RADIO_CRCCNF_SKIP_ADDR_Include 206 #define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include 207 #endif 208 #ifndef RADIO_CRCCNF_SKIP_ADDR_Skip 209 #define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip 210 #endif 211 212 213 /* FICR */ 214 /* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */ 215 #ifndef DEVICEID0 216 #define DEVICEID0 DEVICEID[0] 217 #endif 218 #ifndef DEVICEID1 219 #define DEVICEID1 DEVICEID[1] 220 #endif 221 222 /* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */ 223 #ifndef ER0 224 #define ER0 ER[0] 225 #endif 226 #ifndef ER1 227 #define ER1 ER[1] 228 #endif 229 #ifndef ER2 230 #define ER2 ER[2] 231 #endif 232 #ifndef ER3 233 #define ER3 ER[3] 234 #endif 235 236 /* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */ 237 #ifndef IR0 238 #define IR0 IR[0] 239 #endif 240 #ifndef IR1 241 #define IR1 IR[1] 242 #endif 243 #ifndef IR2 244 #define IR2 IR[2] 245 #endif 246 #ifndef IR3 247 #define IR3 IR[3] 248 #endif 249 250 /* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */ 251 #ifndef DEVICEADDR0 252 #define DEVICEADDR0 DEVICEADDR[0] 253 #endif 254 #ifndef DEVICEADDR1 255 #define DEVICEADDR1 DEVICEADDR[1] 256 #endif 257 258 259 /* PPI */ 260 /* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */ 261 #ifndef TASKS_CHG0EN 262 #define TASKS_CHG0EN TASKS_CHG[0].EN 263 #endif 264 #ifndef TASKS_CHG0DIS 265 #define TASKS_CHG0DIS TASKS_CHG[0].DIS 266 #endif 267 #ifndef TASKS_CHG1EN 268 #define TASKS_CHG1EN TASKS_CHG[1].EN 269 #endif 270 #ifndef TASKS_CHG1DIS 271 #define TASKS_CHG1DIS TASKS_CHG[1].DIS 272 #endif 273 #ifndef TASKS_CHG2EN 274 #define TASKS_CHG2EN TASKS_CHG[2].EN 275 #endif 276 #ifndef TASKS_CHG2DIS 277 #define TASKS_CHG2DIS TASKS_CHG[2].DIS 278 #endif 279 #ifndef TASKS_CHG3EN 280 #define TASKS_CHG3EN TASKS_CHG[3].EN 281 #endif 282 #ifndef TASKS_CHG3DIS 283 #define TASKS_CHG3DIS TASKS_CHG[3].DIS 284 #endif 285 286 /* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */ 287 #ifndef CH0_EEP 288 #define CH0_EEP CH[0].EEP 289 #endif 290 #ifndef CH0_TEP 291 #define CH0_TEP CH[0].TEP 292 #endif 293 #ifndef CH1_EEP 294 #define CH1_EEP CH[1].EEP 295 #endif 296 #ifndef CH1_TEP 297 #define CH1_TEP CH[1].TEP 298 #endif 299 #ifndef CH2_EEP 300 #define CH2_EEP CH[2].EEP 301 #endif 302 #ifndef CH2_TEP 303 #define CH2_TEP CH[2].TEP 304 #endif 305 #ifndef CH3_EEP 306 #define CH3_EEP CH[3].EEP 307 #endif 308 #ifndef CH3_TEP 309 #define CH3_TEP CH[3].TEP 310 #endif 311 #ifndef CH4_EEP 312 #define CH4_EEP CH[4].EEP 313 #endif 314 #ifndef CH4_TEP 315 #define CH4_TEP CH[4].TEP 316 #endif 317 #ifndef CH5_EEP 318 #define CH5_EEP CH[5].EEP 319 #endif 320 #ifndef CH5_TEP 321 #define CH5_TEP CH[5].TEP 322 #endif 323 #ifndef CH6_EEP 324 #define CH6_EEP CH[6].EEP 325 #endif 326 #ifndef CH6_TEP 327 #define CH6_TEP CH[6].TEP 328 #endif 329 #ifndef CH7_EEP 330 #define CH7_EEP CH[7].EEP 331 #endif 332 #ifndef CH7_TEP 333 #define CH7_TEP CH[7].TEP 334 #endif 335 #ifndef CH8_EEP 336 #define CH8_EEP CH[8].EEP 337 #endif 338 #ifndef CH8_TEP 339 #define CH8_TEP CH[8].TEP 340 #endif 341 #ifndef CH9_EEP 342 #define CH9_EEP CH[9].EEP 343 #endif 344 #ifndef CH9_TEP 345 #define CH9_TEP CH[9].TEP 346 #endif 347 #ifndef CH10_EEP 348 #define CH10_EEP CH[10].EEP 349 #endif 350 #ifndef CH10_TEP 351 #define CH10_TEP CH[10].TEP 352 #endif 353 #ifndef CH11_EEP 354 #define CH11_EEP CH[11].EEP 355 #endif 356 #ifndef CH11_TEP 357 #define CH11_TEP CH[11].TEP 358 #endif 359 #ifndef CH12_EEP 360 #define CH12_EEP CH[12].EEP 361 #endif 362 #ifndef CH12_TEP 363 #define CH12_TEP CH[12].TEP 364 #endif 365 #ifndef CH13_EEP 366 #define CH13_EEP CH[13].EEP 367 #endif 368 #ifndef CH13_TEP 369 #define CH13_TEP CH[13].TEP 370 #endif 371 #ifndef CH14_EEP 372 #define CH14_EEP CH[14].EEP 373 #endif 374 #ifndef CH14_TEP 375 #define CH14_TEP CH[14].TEP 376 #endif 377 #ifndef CH15_EEP 378 #define CH15_EEP CH[15].EEP 379 #endif 380 #ifndef CH15_TEP 381 #define CH15_TEP CH[15].TEP 382 #endif 383 384 /* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */ 385 #ifndef CHG0 386 #define CHG0 CHG[0] 387 #endif 388 #ifndef CHG1 389 #define CHG1 CHG[1] 390 #endif 391 #ifndef CHG2 392 #define CHG2 CHG[2] 393 #endif 394 #ifndef CHG3 395 #define CHG3 CHG[3] 396 #endif 397 398 /* All bitfield macros for the CHGx registers therefore changed name. */ 399 #ifndef PPI_CHG0_CH15_Pos 400 #define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos 401 #endif 402 #ifndef PPI_CHG0_CH15_Msk 403 #define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk 404 #endif 405 #ifndef PPI_CHG0_CH15_Excluded 406 #define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded 407 #endif 408 #ifndef PPI_CHG0_CH15_Included 409 #define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included 410 #endif 411 412 #ifndef PPI_CHG0_CH14_Pos 413 #define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos 414 #endif 415 #ifndef PPI_CHG0_CH14_Msk 416 #define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk 417 #endif 418 #ifndef PPI_CHG0_CH14_Excluded 419 #define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded 420 #endif 421 #ifndef PPI_CHG0_CH14_Included 422 #define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included 423 #endif 424 425 #ifndef PPI_CHG0_CH13_Pos 426 #define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos 427 #endif 428 #ifndef PPI_CHG0_CH13_Msk 429 #define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk 430 #endif 431 #ifndef PPI_CHG0_CH13_Excluded 432 #define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded 433 #endif 434 #ifndef PPI_CHG0_CH13_Included 435 #define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included 436 #endif 437 438 #ifndef PPI_CHG0_CH12_Pos 439 #define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos 440 #endif 441 #ifndef PPI_CHG0_CH12_Msk 442 #define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk 443 #endif 444 #ifndef PPI_CHG0_CH12_Excluded 445 #define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded 446 #endif 447 #ifndef PPI_CHG0_CH12_Included 448 #define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included 449 #endif 450 451 #ifndef PPI_CHG0_CH11_Pos 452 #define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos 453 #endif 454 #ifndef PPI_CHG0_CH11_Msk 455 #define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk 456 #endif 457 #ifndef PPI_CHG0_CH11_Excluded 458 #define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded 459 #endif 460 #ifndef PPI_CHG0_CH11_Included 461 #define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included 462 #endif 463 464 #ifndef PPI_CHG0_CH10_Pos 465 #define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos 466 #endif 467 #ifndef PPI_CHG0_CH10_Msk 468 #define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk 469 #endif 470 #ifndef PPI_CHG0_CH10_Excluded 471 #define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded 472 #endif 473 #ifndef PPI_CHG0_CH10_Included 474 #define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included 475 #endif 476 477 #ifndef PPI_CHG0_CH9_Pos 478 #define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos 479 #endif 480 #ifndef PPI_CHG0_CH9_Msk 481 #define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk 482 #endif 483 #ifndef PPI_CHG0_CH9_Excluded 484 #define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded 485 #endif 486 #ifndef PPI_CHG0_CH9_Included 487 #define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included 488 #endif 489 490 #ifndef PPI_CHG0_CH8_Pos 491 #define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos 492 #endif 493 #ifndef PPI_CHG0_CH8_Msk 494 #define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk 495 #endif 496 #ifndef PPI_CHG0_CH8_Excluded 497 #define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded 498 #endif 499 #ifndef PPI_CHG0_CH8_Included 500 #define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included 501 #endif 502 503 #ifndef PPI_CHG0_CH7_Pos 504 #define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos 505 #endif 506 #ifndef PPI_CHG0_CH7_Msk 507 #define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk 508 #endif 509 #ifndef PPI_CHG0_CH7_Excluded 510 #define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded 511 #endif 512 #ifndef PPI_CHG0_CH7_Included 513 #define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included 514 #endif 515 516 #ifndef PPI_CHG0_CH6_Pos 517 #define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos 518 #endif 519 #ifndef PPI_CHG0_CH6_Msk 520 #define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk 521 #endif 522 #ifndef PPI_CHG0_CH6_Excluded 523 #define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded 524 #endif 525 #ifndef PPI_CHG0_CH6_Included 526 #define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included 527 #endif 528 529 #ifndef PPI_CHG0_CH5_Pos 530 #define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos 531 #endif 532 #ifndef PPI_CHG0_CH5_Msk 533 #define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk 534 #endif 535 #ifndef PPI_CHG0_CH5_Excluded 536 #define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded 537 #endif 538 #ifndef PPI_CHG0_CH5_Included 539 #define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included 540 #endif 541 542 #ifndef PPI_CHG0_CH4_Pos 543 #define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos 544 #endif 545 #ifndef PPI_CHG0_CH4_Msk 546 #define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk 547 #endif 548 #ifndef PPI_CHG0_CH4_Excluded 549 #define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded 550 #endif 551 #ifndef PPI_CHG0_CH4_Included 552 #define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included 553 #endif 554 555 #ifndef PPI_CHG0_CH3_Pos 556 #define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos 557 #endif 558 #ifndef PPI_CHG0_CH3_Msk 559 #define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk 560 #endif 561 #ifndef PPI_CHG0_CH3_Excluded 562 #define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded 563 #endif 564 #ifndef PPI_CHG0_CH3_Included 565 #define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included 566 #endif 567 568 #ifndef PPI_CHG0_CH2_Pos 569 #define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos 570 #endif 571 #ifndef PPI_CHG0_CH2_Msk 572 #define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk 573 #endif 574 #ifndef PPI_CHG0_CH2_Excluded 575 #define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded 576 #endif 577 #ifndef PPI_CHG0_CH2_Included 578 #define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included 579 #endif 580 581 #ifndef PPI_CHG0_CH1_Pos 582 #define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos 583 #endif 584 #ifndef PPI_CHG0_CH1_Msk 585 #define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk 586 #endif 587 #ifndef PPI_CHG0_CH1_Excluded 588 #define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded 589 #endif 590 #ifndef PPI_CHG0_CH1_Included 591 #define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included 592 #endif 593 594 #ifndef PPI_CHG0_CH0_Pos 595 #define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos 596 #endif 597 #ifndef PPI_CHG0_CH0_Msk 598 #define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk 599 #endif 600 #ifndef PPI_CHG0_CH0_Excluded 601 #define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded 602 #endif 603 #ifndef PPI_CHG0_CH0_Included 604 #define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included 605 #endif 606 607 #ifndef PPI_CHG1_CH15_Pos 608 #define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos 609 #endif 610 #ifndef PPI_CHG1_CH15_Msk 611 #define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk 612 #endif 613 #ifndef PPI_CHG1_CH15_Excluded 614 #define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded 615 #endif 616 #ifndef PPI_CHG1_CH15_Included 617 #define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included 618 #endif 619 620 #ifndef PPI_CHG1_CH14_Pos 621 #define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos 622 #endif 623 #ifndef PPI_CHG1_CH14_Msk 624 #define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk 625 #endif 626 #ifndef PPI_CHG1_CH14_Excluded 627 #define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded 628 #endif 629 #ifndef PPI_CHG1_CH14_Included 630 #define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included 631 #endif 632 633 #ifndef PPI_CHG1_CH13_Pos 634 #define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos 635 #endif 636 #ifndef PPI_CHG1_CH13_Msk 637 #define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk 638 #endif 639 #ifndef PPI_CHG1_CH13_Excluded 640 #define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded 641 #endif 642 #ifndef PPI_CHG1_CH13_Included 643 #define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included 644 #endif 645 646 #ifndef PPI_CHG1_CH12_Pos 647 #define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos 648 #endif 649 #ifndef PPI_CHG1_CH12_Msk 650 #define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk 651 #endif 652 #ifndef PPI_CHG1_CH12_Excluded 653 #define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded 654 #endif 655 #ifndef PPI_CHG1_CH12_Included 656 #define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included 657 #endif 658 659 #ifndef PPI_CHG1_CH11_Pos 660 #define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos 661 #endif 662 #ifndef PPI_CHG1_CH11_Msk 663 #define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk 664 #endif 665 #ifndef PPI_CHG1_CH11_Excluded 666 #define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded 667 #endif 668 #ifndef PPI_CHG1_CH11_Included 669 #define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included 670 #endif 671 672 #ifndef PPI_CHG1_CH10_Pos 673 #define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos 674 #endif 675 #ifndef PPI_CHG1_CH10_Msk 676 #define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk 677 #endif 678 #ifndef PPI_CHG1_CH10_Excluded 679 #define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded 680 #endif 681 #ifndef PPI_CHG1_CH10_Included 682 #define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included 683 #endif 684 685 #ifndef PPI_CHG1_CH9_Pos 686 #define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos 687 #endif 688 #ifndef PPI_CHG1_CH9_Msk 689 #define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk 690 #endif 691 #ifndef PPI_CHG1_CH9_Excluded 692 #define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded 693 #endif 694 #ifndef PPI_CHG1_CH9_Included 695 #define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included 696 #endif 697 698 #ifndef PPI_CHG1_CH8_Pos 699 #define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos 700 #endif 701 #ifndef PPI_CHG1_CH8_Msk 702 #define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk 703 #endif 704 #ifndef PPI_CHG1_CH8_Excluded 705 #define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded 706 #endif 707 #ifndef PPI_CHG1_CH8_Included 708 #define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included 709 #endif 710 711 #ifndef PPI_CHG1_CH7_Pos 712 #define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos 713 #endif 714 #ifndef PPI_CHG1_CH7_Msk 715 #define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk 716 #endif 717 #ifndef PPI_CHG1_CH7_Excluded 718 #define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded 719 #endif 720 #ifndef PPI_CHG1_CH7_Included 721 #define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included 722 #endif 723 724 #ifndef PPI_CHG1_CH6_Pos 725 #define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos 726 #endif 727 #ifndef PPI_CHG1_CH6_Msk 728 #define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk 729 #endif 730 #ifndef PPI_CHG1_CH6_Excluded 731 #define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded 732 #endif 733 #ifndef PPI_CHG1_CH6_Included 734 #define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included 735 #endif 736 737 #ifndef PPI_CHG1_CH5_Pos 738 #define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos 739 #endif 740 #ifndef PPI_CHG1_CH5_Msk 741 #define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk 742 #endif 743 #ifndef PPI_CHG1_CH5_Excluded 744 #define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded 745 #endif 746 #ifndef PPI_CHG1_CH5_Included 747 #define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included 748 #endif 749 750 #ifndef PPI_CHG1_CH4_Pos 751 #define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos 752 #endif 753 #ifndef PPI_CHG1_CH4_Msk 754 #define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk 755 #endif 756 #ifndef PPI_CHG1_CH4_Excluded 757 #define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded 758 #endif 759 #ifndef PPI_CHG1_CH4_Included 760 #define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included 761 #endif 762 763 #ifndef PPI_CHG1_CH3_Pos 764 #define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos 765 #endif 766 #ifndef PPI_CHG1_CH3_Msk 767 #define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk 768 #endif 769 #ifndef PPI_CHG1_CH3_Excluded 770 #define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded 771 #endif 772 #ifndef PPI_CHG1_CH3_Included 773 #define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included 774 #endif 775 776 #ifndef PPI_CHG1_CH2_Pos 777 #define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos 778 #endif 779 #ifndef PPI_CHG1_CH2_Msk 780 #define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk 781 #endif 782 #ifndef PPI_CHG1_CH2_Excluded 783 #define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded 784 #endif 785 #ifndef PPI_CHG1_CH2_Included 786 #define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included 787 #endif 788 789 #ifndef PPI_CHG1_CH1_Pos 790 #define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos 791 #endif 792 #ifndef PPI_CHG1_CH1_Msk 793 #define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk 794 #endif 795 #ifndef PPI_CHG1_CH1_Excluded 796 #define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded 797 #endif 798 #ifndef PPI_CHG1_CH1_Included 799 #define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included 800 #endif 801 802 #ifndef PPI_CHG1_CH0_Pos 803 #define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos 804 #endif 805 #ifndef PPI_CHG1_CH0_Msk 806 #define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk 807 #endif 808 #ifndef PPI_CHG1_CH0_Excluded 809 #define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded 810 #endif 811 #ifndef PPI_CHG1_CH0_Included 812 #define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included 813 #endif 814 815 #ifndef PPI_CHG2_CH15_Pos 816 #define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos 817 #endif 818 #ifndef PPI_CHG2_CH15_Msk 819 #define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk 820 #endif 821 #ifndef PPI_CHG2_CH15_Excluded 822 #define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded 823 #endif 824 #ifndef PPI_CHG2_CH15_Included 825 #define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included 826 #endif 827 828 #ifndef PPI_CHG2_CH14_Pos 829 #define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos 830 #endif 831 #ifndef PPI_CHG2_CH14_Msk 832 #define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk 833 #endif 834 #ifndef PPI_CHG2_CH14_Excluded 835 #define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded 836 #endif 837 #ifndef PPI_CHG2_CH14_Included 838 #define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included 839 #endif 840 841 #ifndef PPI_CHG2_CH13_Pos 842 #define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos 843 #endif 844 #ifndef PPI_CHG2_CH13_Msk 845 #define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk 846 #endif 847 #ifndef PPI_CHG2_CH13_Excluded 848 #define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded 849 #endif 850 #ifndef PPI_CHG2_CH13_Included 851 #define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included 852 #endif 853 854 #ifndef PPI_CHG2_CH12_Pos 855 #define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos 856 #endif 857 #ifndef PPI_CHG2_CH12_Msk 858 #define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk 859 #endif 860 #ifndef PPI_CHG2_CH12_Excluded 861 #define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded 862 #endif 863 #ifndef PPI_CHG2_CH12_Included 864 #define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included 865 #endif 866 867 #ifndef PPI_CHG2_CH11_Pos 868 #define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos 869 #endif 870 #ifndef PPI_CHG2_CH11_Msk 871 #define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk 872 #endif 873 #ifndef PPI_CHG2_CH11_Excluded 874 #define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded 875 #endif 876 #ifndef PPI_CHG2_CH11_Included 877 #define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included 878 #endif 879 880 #ifndef PPI_CHG2_CH10_Pos 881 #define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos 882 #endif 883 #ifndef PPI_CHG2_CH10_Msk 884 #define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk 885 #endif 886 #ifndef PPI_CHG2_CH10_Excluded 887 #define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded 888 #endif 889 #ifndef PPI_CHG2_CH10_Included 890 #define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included 891 #endif 892 893 #ifndef PPI_CHG2_CH9_Pos 894 #define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos 895 #endif 896 #ifndef PPI_CHG2_CH9_Msk 897 #define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk 898 #endif 899 #ifndef PPI_CHG2_CH9_Excluded 900 #define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded 901 #endif 902 #ifndef PPI_CHG2_CH9_Included 903 #define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included 904 #endif 905 906 #ifndef PPI_CHG2_CH8_Pos 907 #define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos 908 #endif 909 #ifndef PPI_CHG2_CH8_Msk 910 #define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk 911 #endif 912 #ifndef PPI_CHG2_CH8_Excluded 913 #define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded 914 #endif 915 #ifndef PPI_CHG2_CH8_Included 916 #define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included 917 #endif 918 919 #ifndef PPI_CHG2_CH7_Pos 920 #define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos 921 #endif 922 #ifndef PPI_CHG2_CH7_Msk 923 #define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk 924 #endif 925 #ifndef PPI_CHG2_CH7_Excluded 926 #define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded 927 #endif 928 #ifndef PPI_CHG2_CH7_Included 929 #define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included 930 #endif 931 932 #ifndef PPI_CHG2_CH6_Pos 933 #define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos 934 #endif 935 #ifndef PPI_CHG2_CH6_Msk 936 #define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk 937 #endif 938 #ifndef PPI_CHG2_CH6_Excluded 939 #define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded 940 #endif 941 #ifndef PPI_CHG2_CH6_Included 942 #define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included 943 #endif 944 945 #ifndef PPI_CHG2_CH5_Pos 946 #define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos 947 #endif 948 #ifndef PPI_CHG2_CH5_Msk 949 #define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk 950 #endif 951 #ifndef PPI_CHG2_CH5_Excluded 952 #define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded 953 #endif 954 #ifndef PPI_CHG2_CH5_Included 955 #define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included 956 #endif 957 958 #ifndef PPI_CHG2_CH4_Pos 959 #define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos 960 #endif 961 #ifndef PPI_CHG2_CH4_Msk 962 #define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk 963 #endif 964 #ifndef PPI_CHG2_CH4_Excluded 965 #define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded 966 #endif 967 #ifndef PPI_CHG2_CH4_Included 968 #define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included 969 #endif 970 971 #ifndef PPI_CHG2_CH3_Pos 972 #define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos 973 #endif 974 #ifndef PPI_CHG2_CH3_Msk 975 #define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk 976 #endif 977 #ifndef PPI_CHG2_CH3_Excluded 978 #define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded 979 #endif 980 #ifndef PPI_CHG2_CH3_Included 981 #define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included 982 #endif 983 984 #ifndef PPI_CHG2_CH2_Pos 985 #define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos 986 #endif 987 #ifndef PPI_CHG2_CH2_Msk 988 #define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk 989 #endif 990 #ifndef PPI_CHG2_CH2_Excluded 991 #define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded 992 #endif 993 #ifndef PPI_CHG2_CH2_Included 994 #define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included 995 #endif 996 997 #ifndef PPI_CHG2_CH1_Pos 998 #define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos 999 #endif 1000 #ifndef PPI_CHG2_CH1_Msk 1001 #define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk 1002 #endif 1003 #ifndef PPI_CHG2_CH1_Excluded 1004 #define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded 1005 #endif 1006 #ifndef PPI_CHG2_CH1_Included 1007 #define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included 1008 #endif 1009 1010 #ifndef PPI_CHG2_CH0_Pos 1011 #define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos 1012 #endif 1013 #ifndef PPI_CHG2_CH0_Msk 1014 #define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk 1015 #endif 1016 #ifndef PPI_CHG2_CH0_Excluded 1017 #define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded 1018 #endif 1019 #ifndef PPI_CHG2_CH0_Included 1020 #define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included 1021 #endif 1022 1023 #ifndef PPI_CHG3_CH15_Pos 1024 #define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos 1025 #endif 1026 #ifndef PPI_CHG3_CH15_Msk 1027 #define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk 1028 #endif 1029 #ifndef PPI_CHG3_CH15_Excluded 1030 #define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded 1031 #endif 1032 #ifndef PPI_CHG3_CH15_Included 1033 #define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included 1034 #endif 1035 1036 #ifndef PPI_CHG3_CH14_Pos 1037 #define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos 1038 #endif 1039 #ifndef PPI_CHG3_CH14_Msk 1040 #define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk 1041 #endif 1042 #ifndef PPI_CHG3_CH14_Excluded 1043 #define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded 1044 #endif 1045 #ifndef PPI_CHG3_CH14_Included 1046 #define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included 1047 #endif 1048 1049 #ifndef PPI_CHG3_CH13_Pos 1050 #define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos 1051 #endif 1052 #ifndef PPI_CHG3_CH13_Msk 1053 #define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk 1054 #endif 1055 #ifndef PPI_CHG3_CH13_Excluded 1056 #define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded 1057 #endif 1058 #ifndef PPI_CHG3_CH13_Included 1059 #define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included 1060 #endif 1061 1062 #ifndef PPI_CHG3_CH12_Pos 1063 #define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos 1064 #endif 1065 #ifndef PPI_CHG3_CH12_Msk 1066 #define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk 1067 #endif 1068 #ifndef PPI_CHG3_CH12_Excluded 1069 #define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded 1070 #endif 1071 #ifndef PPI_CHG3_CH12_Included 1072 #define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included 1073 #endif 1074 1075 #ifndef PPI_CHG3_CH11_Pos 1076 #define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos 1077 #endif 1078 #ifndef PPI_CHG3_CH11_Msk 1079 #define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk 1080 #endif 1081 #ifndef PPI_CHG3_CH11_Excluded 1082 #define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded 1083 #endif 1084 #ifndef PPI_CHG3_CH11_Included 1085 #define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included 1086 #endif 1087 1088 #ifndef PPI_CHG3_CH10_Pos 1089 #define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos 1090 #endif 1091 #ifndef PPI_CHG3_CH10_Msk 1092 #define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk 1093 #endif 1094 #ifndef PPI_CHG3_CH10_Excluded 1095 #define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded 1096 #endif 1097 #ifndef PPI_CHG3_CH10_Included 1098 #define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included 1099 #endif 1100 1101 #ifndef PPI_CHG3_CH9_Pos 1102 #define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos 1103 #endif 1104 #ifndef PPI_CHG3_CH9_Msk 1105 #define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk 1106 #endif 1107 #ifndef PPI_CHG3_CH9_Excluded 1108 #define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded 1109 #endif 1110 #ifndef PPI_CHG3_CH9_Included 1111 #define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included 1112 #endif 1113 1114 #ifndef PPI_CHG3_CH8_Pos 1115 #define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos 1116 #endif 1117 #ifndef PPI_CHG3_CH8_Msk 1118 #define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk 1119 #endif 1120 #ifndef PPI_CHG3_CH8_Excluded 1121 #define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded 1122 #endif 1123 #ifndef PPI_CHG3_CH8_Included 1124 #define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included 1125 #endif 1126 1127 #ifndef PPI_CHG3_CH7_Pos 1128 #define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos 1129 #endif 1130 #ifndef PPI_CHG3_CH7_Msk 1131 #define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk 1132 #endif 1133 #ifndef PPI_CHG3_CH7_Excluded 1134 #define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded 1135 #endif 1136 #ifndef PPI_CHG3_CH7_Included 1137 #define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included 1138 #endif 1139 1140 #ifndef PPI_CHG3_CH6_Pos 1141 #define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos 1142 #endif 1143 #ifndef PPI_CHG3_CH6_Msk 1144 #define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk 1145 #endif 1146 #ifndef PPI_CHG3_CH6_Excluded 1147 #define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded 1148 #endif 1149 #ifndef PPI_CHG3_CH6_Included 1150 #define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included 1151 #endif 1152 1153 #ifndef PPI_CHG3_CH5_Pos 1154 #define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos 1155 #endif 1156 #ifndef PPI_CHG3_CH5_Msk 1157 #define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk 1158 #endif 1159 #ifndef PPI_CHG3_CH5_Excluded 1160 #define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded 1161 #endif 1162 #ifndef PPI_CHG3_CH5_Included 1163 #define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included 1164 #endif 1165 1166 #ifndef PPI_CHG3_CH4_Pos 1167 #define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos 1168 #endif 1169 #ifndef PPI_CHG3_CH4_Msk 1170 #define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk 1171 #endif 1172 #ifndef PPI_CHG3_CH4_Excluded 1173 #define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded 1174 #endif 1175 #ifndef PPI_CHG3_CH4_Included 1176 #define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included 1177 #endif 1178 1179 #ifndef PPI_CHG3_CH3_Pos 1180 #define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos 1181 #endif 1182 #ifndef PPI_CHG3_CH3_Msk 1183 #define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk 1184 #endif 1185 #ifndef PPI_CHG3_CH3_Excluded 1186 #define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded 1187 #endif 1188 #ifndef PPI_CHG3_CH3_Included 1189 #define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included 1190 #endif 1191 1192 #ifndef PPI_CHG3_CH2_Pos 1193 #define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos 1194 #endif 1195 #ifndef PPI_CHG3_CH2_Msk 1196 #define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk 1197 #endif 1198 #ifndef PPI_CHG3_CH2_Excluded 1199 #define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded 1200 #endif 1201 #ifndef PPI_CHG3_CH2_Included 1202 #define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included 1203 #endif 1204 1205 #ifndef PPI_CHG3_CH1_Pos 1206 #define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos 1207 #endif 1208 #ifndef PPI_CHG3_CH1_Msk 1209 #define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk 1210 #endif 1211 #ifndef PPI_CHG3_CH1_Excluded 1212 #define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded 1213 #endif 1214 #ifndef PPI_CHG3_CH1_Included 1215 #define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included 1216 #endif 1217 1218 #ifndef PPI_CHG3_CH0_Pos 1219 #define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos 1220 #endif 1221 #ifndef PPI_CHG3_CH0_Msk 1222 #define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk 1223 #endif 1224 #ifndef PPI_CHG3_CH0_Excluded 1225 #define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded 1226 #endif 1227 #ifndef PPI_CHG3_CH0_Included 1228 #define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included 1229 #endif 1230 1231 1232 1233 1234 /*lint --flb "Leave library region" */ 1235 1236 #endif /* NRF51_TO_NRF52810_H */ 1237 1238
