1 /* 2 Copyright (c) 2010 - 2024, Nordic Semiconductor ASA All rights reserved. 3 4 SPDX-License-Identifier: BSD-3-Clause 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, this 10 list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of Nordic Semiconductor ASA nor the names of its 17 contributors may be used to endorse or promote products derived from this 18 software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef NRF_DEVICE_MEM_H_ 34 #define NRF_DEVICE_MEM_H_ 35 36 #ifndef __DEFAULT_STACK_SIZE 37 #define __DEFAULT_STACK_SIZE 2048 38 #endif 39 #ifndef __DEFAULT_HEAP_SIZE 40 #define __DEFAULT_HEAP_SIZE 2048 41 #endif 42 43 /* Device memory Flash: */ 44 #define NRF_MEMORY_FLASH_BASE 0x00000000 45 #define NRF_MEMORY_FLASH_SIZE 0x00040000 46 47 /* Device memory FICR: */ 48 #define NRF_MEMORY_FICR_BASE 0x10000000 49 #define NRF_MEMORY_FICR_SIZE 0x00000400 50 51 /* Device memory UICR: */ 52 #define NRF_MEMORY_UICR_BASE 0x10001000 53 #define NRF_MEMORY_UICR_SIZE 0x00000400 54 55 /* Device memory RAM: */ 56 #define NRF_MEMORY_RAM_BASE 0x20000000 57 #define NRF_MEMORY_RAM_SIZE 0x00008000 58 59 /* Device memory PeripheralsAPB: */ 60 #define NRF_MEMORY_PERIPHERALSAPB_BASE 0x40000000 61 #define NRF_MEMORY_PERIPHERALSAPB_SIZE 0x00020000 62 63 /* Device memory PeripheralsAHB: */ 64 #define NRF_MEMORY_PERIPHERALSAHB_BASE 0x50000000 65 #define NRF_MEMORY_PERIPHERALSAHB_SIZE 0x00001000 66 67 /* Device memory SystemSFR: */ 68 #define NRF_MEMORY_SYSTEMSFR_BASE 0xE0000000 69 #define NRF_MEMORY_SYSTEMSFR_SIZE 0x00100000 70 71 72 73 #endif 74
