1 /*
2  * Copyright (c) 2022 - 2024, Nordic Semiconductor ASA
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  *
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8  * modification, are permitted provided that the following conditions are met:
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10  * 1. Redistributions of source code must retain the above copyright notice, this
11  *    list of conditions and the following disclaimer.
12  *
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
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17  * 3. Neither the name of the copyright holder nor the names of its
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19  *    software without specific prior written permission.
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21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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32  */
33 
34 #include <helpers/nrfx_gppi.h>
35 
36 #if NRFX_CHECK(NRFX_DPPI_ENABLED) && (!defined(DPPIC_COUNT) || (DPPIC_COUNT == 1))
37 #include <nrfx_dppi.h>
38 #endif
39 
40 #if defined(DPPI_PRESENT) && (defined(NRF53_SERIES) || defined(NRF91_SERIES))
nrfx_gppi_channel_check(uint8_t channel)41 bool nrfx_gppi_channel_check(uint8_t channel)
42 {
43     return nrfy_dppi_channel_check(NRF_DPPIC, channel);
44 }
45 
nrfx_gppi_channels_disable_all(void)46 void nrfx_gppi_channels_disable_all(void)
47 {
48     nrfy_dppi_channels_disable_all(NRF_DPPIC);
49 }
50 
nrfx_gppi_channels_enable(uint32_t mask)51 void nrfx_gppi_channels_enable(uint32_t mask)
52 {
53     nrfy_dppi_channels_enable(NRF_DPPIC, mask);
54 }
55 
nrfx_gppi_channels_disable(uint32_t mask)56 void nrfx_gppi_channels_disable(uint32_t mask)
57 {
58     nrfy_dppi_channels_disable(NRF_DPPIC, mask);
59 }
60 
nrfx_gppi_task_trigger(nrfx_gppi_task_t task)61 void nrfx_gppi_task_trigger(nrfx_gppi_task_t task)
62 {
63     nrfy_dppi_task_trigger(NRF_DPPIC, (nrf_dppi_task_t)task);
64 }
65 
nrfx_gppi_event_endpoint_setup(uint8_t channel,uint32_t eep)66 void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep)
67 {
68     NRFX_ASSERT(eep);
69     NRF_DPPI_ENDPOINT_SETUP(eep, channel);
70 }
71 
nrfx_gppi_task_endpoint_setup(uint8_t channel,uint32_t tep)72 void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep)
73 {
74     NRFX_ASSERT(tep);
75     NRF_DPPI_ENDPOINT_SETUP(tep, channel);
76 }
77 
nrfx_gppi_channel_endpoints_setup(uint8_t channel,uint32_t eep,uint32_t tep)78 void nrfx_gppi_channel_endpoints_setup(uint8_t  channel, uint32_t eep, uint32_t tep)
79 {
80     nrfx_gppi_event_endpoint_setup(channel, eep);
81     nrfx_gppi_task_endpoint_setup(channel, tep);
82 }
83 
nrfx_gppi_channel_endpoints_clear(uint8_t channel,uint32_t eep,uint32_t tep)84 void nrfx_gppi_channel_endpoints_clear(uint8_t channel, uint32_t eep, uint32_t tep)
85 {
86     nrfx_gppi_event_endpoint_clear(channel, eep);
87     nrfx_gppi_task_endpoint_clear(channel, tep);
88 }
89 
nrfx_gppi_event_endpoint_clear(uint8_t channel,uint32_t eep)90 void nrfx_gppi_event_endpoint_clear(uint8_t channel, uint32_t eep)
91 {
92     NRFX_ASSERT(eep);
93     (void)channel;
94     NRF_DPPI_ENDPOINT_CLEAR(eep);
95 }
96 
nrfx_gppi_task_endpoint_clear(uint8_t channel,uint32_t tep)97 void nrfx_gppi_task_endpoint_clear(uint8_t channel, uint32_t tep)
98 {
99     NRFX_ASSERT(tep);
100     (void)channel;
101     NRF_DPPI_ENDPOINT_CLEAR(tep);
102 }
103 
nrfx_gppi_fork_endpoint_setup(uint8_t channel,uint32_t fork_tep)104 void nrfx_gppi_fork_endpoint_setup(uint8_t channel, uint32_t fork_tep)
105 {
106     nrfx_gppi_task_endpoint_setup(channel, fork_tep);
107 }
108 
nrfx_gppi_fork_endpoint_clear(uint8_t channel,uint32_t fork_tep)109 void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep)
110 {
111     nrfx_gppi_task_endpoint_clear(channel, fork_tep);
112 }
113 
nrfx_gppi_channels_group_set(uint32_t channel_mask,nrfx_gppi_channel_group_t channel_group)114 void nrfx_gppi_channels_group_set(uint32_t                  channel_mask,
115                                   nrfx_gppi_channel_group_t channel_group)
116 {
117     nrfy_dppi_channels_group_set(NRF_DPPIC,
118                                  channel_mask,
119                                  (nrf_dppi_channel_group_t)channel_group);
120 }
121 
nrfx_gppi_channels_include_in_group(uint32_t channel_mask,nrfx_gppi_channel_group_t channel_group)122 void nrfx_gppi_channels_include_in_group(uint32_t                  channel_mask,
123                                          nrfx_gppi_channel_group_t channel_group)
124 {
125     nrfy_dppi_channels_include_in_group(NRF_DPPIC,
126                                         channel_mask,
127                                         (nrf_dppi_channel_group_t)channel_group);
128 }
129 
nrfx_gppi_channels_remove_from_group(uint32_t channel_mask,nrfx_gppi_channel_group_t channel_group)130 void nrfx_gppi_channels_remove_from_group(uint32_t                  channel_mask,
131                                           nrfx_gppi_channel_group_t channel_group)
132 {
133     nrfy_dppi_channels_remove_from_group(NRF_DPPIC,
134                                          channel_mask,
135                                          (nrf_dppi_channel_group_t)channel_group);
136 }
137 
nrfx_gppi_group_clear(nrfx_gppi_channel_group_t channel_group)138 void nrfx_gppi_group_clear(nrfx_gppi_channel_group_t channel_group)
139 {
140     nrfy_dppi_group_clear(NRF_DPPIC, (nrf_dppi_channel_group_t)channel_group);
141 }
142 
nrfx_gppi_group_enable(nrfx_gppi_channel_group_t channel_group)143 void nrfx_gppi_group_enable(nrfx_gppi_channel_group_t channel_group)
144 {
145     nrfy_dppi_group_enable(NRF_DPPIC, (nrf_dppi_channel_group_t)channel_group);
146 }
147 
nrfx_gppi_group_disable(nrfx_gppi_channel_group_t channel_group)148 void nrfx_gppi_group_disable(nrfx_gppi_channel_group_t channel_group)
149 {
150     nrfy_dppi_group_disable(NRF_DPPIC, (nrf_dppi_channel_group_t)channel_group);
151 }
152 
nrfx_gppi_task_address_get(nrfx_gppi_task_t gppi_task)153 uint32_t nrfx_gppi_task_address_get(nrfx_gppi_task_t gppi_task)
154 {
155     return nrfy_dppi_task_address_get(NRF_DPPIC, (nrf_dppi_task_t)gppi_task);
156 }
157 
nrfx_gppi_group_disable_task_get(nrfx_gppi_channel_group_t group)158 nrfx_gppi_task_t nrfx_gppi_group_disable_task_get(nrfx_gppi_channel_group_t group)
159 {
160     return (nrfx_gppi_task_t) nrfy_dppi_group_disable_task_get((uint8_t)group);
161 }
162 
nrfx_gppi_group_enable_task_get(nrfx_gppi_channel_group_t group)163 nrfx_gppi_task_t nrfx_gppi_group_enable_task_get(nrfx_gppi_channel_group_t group)
164 {
165     return (nrfx_gppi_task_t) nrfy_dppi_group_enable_task_get((uint8_t)group);
166 }
167 
nrfx_gppi_channel_alloc(uint8_t * p_channel)168 nrfx_err_t nrfx_gppi_channel_alloc(uint8_t * p_channel)
169 {
170 #if NRFX_CHECK(NRFX_DPPI_ENABLED) && (!defined(DPPIC_COUNT) || (DPPIC_COUNT == 1))
171     return nrfx_dppi_channel_alloc(p_channel);
172 #else
173     (void)p_channel;
174     return NRFX_ERROR_NOT_SUPPORTED;
175 #endif
176 }
177 
nrfx_gppi_channel_free(uint8_t channel)178 nrfx_err_t nrfx_gppi_channel_free(uint8_t channel)
179 {
180 #if NRFX_CHECK(NRFX_DPPI_ENABLED) && (!defined(DPPIC_COUNT) || (DPPIC_COUNT == 1))
181     return nrfx_dppi_channel_free(channel);
182 #else
183     (void)channel;
184     return NRFX_ERROR_NOT_SUPPORTED;
185 #endif
186 }
187 
nrfx_gppi_group_alloc(nrfx_gppi_channel_group_t * p_group)188 nrfx_err_t nrfx_gppi_group_alloc(nrfx_gppi_channel_group_t * p_group)
189 {
190 #if NRFX_CHECK(NRFX_DPPI_ENABLED) && (!defined(DPPIC_COUNT) || (DPPIC_COUNT == 1))
191     return nrfx_dppi_group_alloc((nrf_dppi_channel_group_t *)p_group);
192 #else
193     (void)p_group;
194     return NRFX_ERROR_NOT_SUPPORTED;
195 #endif
196 }
197 
nrfx_gppi_group_free(nrfx_gppi_channel_group_t group)198 nrfx_err_t nrfx_gppi_group_free(nrfx_gppi_channel_group_t group)
199 {
200 #if NRFX_CHECK(NRFX_DPPI_ENABLED) && (!defined(DPPIC_COUNT) || (DPPIC_COUNT == 1))
201     return nrfx_dppi_group_free((nrf_dppi_channel_group_t)group);
202 #else
203     (void)group;
204     return NRFX_ERROR_NOT_SUPPORTED;
205 #endif
206 }
207 #endif // defined(DPPI_PRESENT) && (defined(NRF53_SERIES) || defined(NRF91_SERIES))
208