1 /*
2  * Copyright (c) 2023 - 2024, Nordic Semiconductor ASA
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are met:
9  *
10  * 1. Redistributions of source code must retain the above copyright notice, this
11  *    list of conditions and the following disclaimer.
12  *
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * 3. Neither the name of the copyright holder nor the names of its
18  *    contributors may be used to endorse or promote products derived from this
19  *    software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #ifndef NRF_VPR_CSR_VIO_H__
35 #define NRF_VPR_CSR_VIO_H__
36 
37 #include <nrfx.h>
38 
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42 
43 /**
44  * @defgroup nrf_vpr_csr_vio_hal VPR CSR VIO HAL
45  * @{
46  * @ingroup nrf_vpr
47  * @brief   Hardware access layer for managing the VPR RISC-V CPU Control
48  *          and Status Registers for VPR IO (VPR CSR VIO).
49  */
50 
51 /** @brief Shift sizes for output. */
52 typedef enum
53 {
54     NRF_VPR_CSR_VIO_OUT_SHIFT_1  = VPRCSR_NORDIC_OUTMODE_SHIFSIZE_SHIFT1,  ///< Shift OUT by 1 bit.
55     NRF_VPR_CSR_VIO_OUT_SHIFT_2  = VPRCSR_NORDIC_OUTMODE_SHIFSIZE_SHIFT2,  ///< Shift OUT by 2 bits.
56     NRF_VPR_CSR_VIO_OUT_SHIFT_4  = VPRCSR_NORDIC_OUTMODE_SHIFSIZE_SHIFT4,  ///< Shift OUT by 4 bits.
57     NRF_VPR_CSR_VIO_OUT_SHIFT_8  = VPRCSR_NORDIC_OUTMODE_SHIFSIZE_SHIFT8,  ///< Shift OUT by 8 bits.
58     NRF_VPR_CSR_VIO_OUT_SHIFT_16 = VPRCSR_NORDIC_OUTMODE_SHIFSIZE_SHIFT16, ///< Shift OUT by 16 bits.
59 } nrf_vpr_csr_vio_out_shift_t;
60 
61 /** @brief Output mode structure. */
62 typedef struct
63 {
64     bool                        shift_enable; ///< Enable shift mode.
65     nrf_vpr_csr_vio_out_shift_t shift_size;   ///< Shift size.
66 } nrf_vpr_csr_vio_mode_out_t;
67 
68 #if !defined(NRF54H20_ENGA_XXAA)
69 /** @brief Input modes. */
70 typedef enum
71 {
72     NRF_VPR_CSR_VIO_MODE_IN_CONTINUOUS = VPRCSR_NORDIC_INMODE_MODE_CONTINUOUS, ///< Continuous sampling (if CPU is not sleeping).
73     NRF_VPR_CSR_VIO_MODE_IN_EVENT      = VPRCSR_NORDIC_INMODE_MODE_EVENT,      ///< Sampling on Counter 1 event.
74 } nrf_vpr_csr_vio_mode_in_t;
75 #endif
76 
77 /**
78  * @brief Function for getting the pin directions mask.
79  *
80  * @return Mask of pin directions. 0 is input, 1 is output.
81  */
82 NRF_STATIC_INLINE uint16_t nrf_vpr_csr_vio_dir_get(void);
83 
84 /**
85  * @brief Function for setting the pin directions mask.
86  *
87  * @param[in] value Mask of pin directions to be set. 0 is input, 1 is output.
88  */
89 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dir_set(uint16_t value);
90 
91 /**
92  * @brief Function for getting the buffered pin directions mask.
93  *
94  * @return Mask of pin directions. 0 is input, 1 is output.
95  */
96 NRF_STATIC_INLINE uint16_t nrf_vpr_csr_vio_dir_buffered_get(void);
97 
98 /**
99  * @brief Function for setting the buffered pin directions mask.
100  *
101  * @param[in] value Mask of pin directions to be set. 0 is input, 1 is output.
102  */
103 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dir_buffered_set(uint16_t value);
104 
105 /**
106  * @brief Function for retrieving the dirty status of buffered pin directions mask.
107  *
108  * @retval true  Buffer is dirty.
109  * @retval fasle Buffer is clean.
110  */
111 NRF_STATIC_INLINE bool nrf_vpr_csr_vio_dir_buffered_dirty_check(void);
112 
113 /**
114  * @brief Function for setting the pin directions toggle mask.
115  *
116  * @param[in] mask Mask of pin directions to be toggled.
117  */
118 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dir_toggle_set(uint16_t mask);
119 
120 /**
121  * @brief Function for setting the buffered pin directions toggle mask.
122  *
123  * @param[in] mask Mask of pin directions to be toggled.
124  */
125 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dir_buffered_toggle_set(uint16_t mask);
126 
127 /**
128  * @brief Function for getting the input values.
129  *
130  * @return Mask of input states. 0 is low, 1 is high.
131  */
132 NRF_STATIC_INLINE uint16_t nrf_vpr_csr_vio_in_get(void);
133 
134 #if !defined(NRF54H20_ENGA_XXAA)
135 /**
136  * @brief Function for getting the input mode.
137  *
138  * @return Input mode.
139  */
140 NRF_STATIC_INLINE nrf_vpr_csr_vio_mode_in_t nrf_vpr_csr_vio_mode_in_get(void);
141 
142 /**
143  * @brief Function for setting the input mode.
144  *
145  * @param[in] mode Input mode to be set.
146  */
147 NRF_STATIC_INLINE void nrf_vpr_csr_vio_mode_in_set(nrf_vpr_csr_vio_mode_in_t mode);
148 #else
149 /**
150  * @brief Function for getting the input mode.
151  *
152  * @return Mask of input modes. 0 is continous sampling, 1 is sampling on event.
153  */
154 NRF_STATIC_INLINE uint16_t nrf_vpr_csr_vio_mode_in_get(void);
155 
156 /**
157  * @brief Function for setting the input mode.
158  *
159  * @param[in] value Mask of input modes to be set. 0 is continous sampling, 1 is sampling on event.
160  */
161 NRF_STATIC_INLINE void nrf_vpr_csr_vio_mode_in_set(uint16_t mode);
162 #endif
163 
164 /**
165  * @brief Function for getting the output values.
166  *
167  * @return Mask of output states. 0 is low, 1 is high.
168  */
169 NRF_STATIC_INLINE uint16_t nrf_vpr_csr_vio_out_get(void);
170 
171 /**
172  * @brief Function for setting the output values.
173  *
174  * @param[in] value Mask of output states to be set. 0 is low, 1 is high.
175  */
176 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_set(uint16_t value);
177 
178 /**
179  * @brief Function for getting the buffered output values.
180  *
181  * @return Mask of output states. 0 is low, 1 is high.
182  */
183 NRF_STATIC_INLINE uint32_t nrf_vpr_csr_vio_out_buffered_get(void);
184 
185 /**
186  * @brief Function for setting the buffered output values.
187  *
188  * @param[in] value Mask of output states to be set. 0 is low, 1 is high.
189  */
190 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_buffered_set(uint32_t value);
191 
192 /**
193  * @brief Function for retrieving the dirty status of buffered output values.
194  *
195  * @retval true  Buffer is dirty.
196  * @retval fasle Buffer is clean.
197  */
198 NRF_STATIC_INLINE bool nrf_vpr_csr_vio_out_buffered_dirty_check(void);
199 
200 /**
201  * @brief Function for setting the output toggle mask.
202  *
203  * @param[in] mask Mask of output to be toggled.
204  */
205 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_toggle_set(uint16_t mask);
206 
207 /**
208  * @brief Function for setting the buffered output toggle mask.
209  *
210  * @param[in] mask Mask of output to be toggled.
211  */
212 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_toggle_buffered_set(uint16_t mask);
213 
214 /**
215  * @brief Function for setting the combined output and buffered output values.
216  *
217  * @note Lower 16 bits determine the output state, while higher 16 bits determine the buffered output state.
218  *
219  * @param[in] value Mask of output states to be set. 0 is low, 1 is high.
220  */
221 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_combined_set(uint32_t value);
222 
223 /**
224  * @brief Function for setting the combined output and buffered output toggle mask.
225  *
226  * @note Lower 16 bits determine the output toggle, while higher 16 bits determine the buffered output toggle.
227  *
228  * @param[in] mask Mask of output to be toggled.
229  */
230 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_combined_toggle_set(uint32_t mask);
231 
232 /**
233  * @brief Function for retrieving the dirty status of combined output and buffered output values.
234  *
235  * @retval true  Buffer is dirty.
236  * @retval fasle Buffer is clean.
237  */
238 NRF_STATIC_INLINE bool nrf_vpr_csr_vio_out_combined_dirty_check(void);
239 
240 /**
241  * @brief Function for getting the configuration of output mode.
242  *
243  * @param[out] p_mode Pointer to the structure to be filled with output mode.
244  */
245 NRF_STATIC_INLINE void nrf_vpr_csr_vio_mode_out_get(nrf_vpr_csr_vio_mode_out_t * p_mode);
246 
247 /**
248  * @brief Function for setting the configuration of output mode.
249  *
250  * @param[in] p_mode Pointer to the structure with output mode to be set.
251  */
252 NRF_STATIC_INLINE void nrf_vpr_csr_vio_mode_out_set(nrf_vpr_csr_vio_mode_out_t const * p_mode);
253 
254 /**
255  * @brief Function for getting the combined pin directions mask and output values.
256  *
257  * @note Lower 16 bits determine the output state, while higher 16 bits determine the pin directions.
258  *
259  * @return Mask of pin directions and output values.
260  */
261 NRF_STATIC_INLINE uint32_t nrf_vpr_csr_vio_dirout_get(void);
262 
263 /**
264  * @brief Function for setting the combined pin directions mask and output values.
265  *
266  * @note Lower 16 bits determine the output state, while higher 16 bits determine the pin directions.
267  *
268  * @param[in] value Mask of pin directions and output values.
269  */
270 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dirout_set(uint32_t value);
271 
272 /**
273  * @brief Function for getting the combined buffered pin directions mask and buffered output values.
274  *
275  * @note Lower 16 bits determine the buffered output state, while higher 16 bits determine the buffered pin directions.
276  *
277  * @return Mask of buffered pin directions and buffered output values.
278  */
279 NRF_STATIC_INLINE uint32_t nrf_vpr_csr_vio_dirout_buffered_get(void);
280 
281 /**
282  * @brief Function for getting the combined buffered pin directions mask and buffered output values.
283  *
284  * @note Lower 16 bits determine the buffered output state, while higher 16 bits determine the buffered pin directions.
285  *
286  * @param[in] value Mask of buffered pin directions and buffered output values.
287  */
288 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dirout_buffered_set(uint32_t value);
289 
290 /**
291  * @brief Function for retrieving the dirty status of combined buffered pin directions mask and buffered output values.
292  *
293  * @retval true  Buffer is dirty.
294  * @retval fasle Buffer is clean.
295  */
296 NRF_STATIC_INLINE bool nrf_vpr_csr_vio_dirout_buffered_dirty_check(void);
297 
298 /**
299  * @brief Function for setting the combined pin directions and output toggle masks.
300  *
301  * @note Lower 16 bits determine the output toggle, while higher 16 bits determine the pin directions toggle.
302  *
303  * @param[in] mask Mask of values to be toggled.
304  */
305 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dirout_toggle_set(uint32_t mask);
306 
307 /**
308  * @brief Function for setting the combined buffered pin directions and buffered output toggle masks.
309  *
310  * @note Lower 16 bits determine the buffered output toggle, while higher 16 bits determine the buffered pin directions toggle.
311  *
312  * @param[in] mask Mask of values to be toggled.
313  */
314 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dirout_toggle_buffered_set(uint32_t mask);
315 
316 #ifndef NRF_DECLARE_ONLY
317 
nrf_vpr_csr_vio_dir_get(void)318 NRF_STATIC_INLINE uint16_t nrf_vpr_csr_vio_dir_get(void)
319 {
320     return (uint16_t)nrf_csr_read(VPRCSR_NORDIC_DIR);
321 }
322 
nrf_vpr_csr_vio_dir_set(uint16_t value)323 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dir_set(uint16_t value)
324 {
325     nrf_csr_write(VPRCSR_NORDIC_DIR, value);
326 }
327 
nrf_vpr_csr_vio_dir_buffered_get(void)328 NRF_STATIC_INLINE uint16_t nrf_vpr_csr_vio_dir_buffered_get(void)
329 {
330     return (uint16_t)nrf_csr_read(VPRCSR_NORDIC_DIRB);
331 }
332 
nrf_vpr_csr_vio_dir_buffered_set(uint16_t value)333 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dir_buffered_set(uint16_t value)
334 {
335     nrf_csr_write(VPRCSR_NORDIC_DIRB, value);
336 }
337 
nrf_vpr_csr_vio_dir_buffered_dirty_check(void)338 NRF_STATIC_INLINE bool nrf_vpr_csr_vio_dir_buffered_dirty_check(void)
339 {
340     return ((nrf_csr_read(VPRCSR_NORDIC_DIRBS) & VPRCSR_NORDIC_DIRBS_DIRTYBIT_Msk)
341             >> VPRCSR_NORDIC_DIRBS_DIRTYBIT_Pos) == VPRCSR_NORDIC_DIRBS_DIRTYBIT_DIRTY;
342 }
343 
nrf_vpr_csr_vio_dir_toggle_set(uint16_t mask)344 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dir_toggle_set(uint16_t mask)
345 {
346     nrf_csr_write(VPRCSR_NORDIC_DIRTGL, mask);
347 }
348 
nrf_vpr_csr_vio_dir_buffered_toggle_set(uint16_t mask)349 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dir_buffered_toggle_set(uint16_t mask)
350 {
351     nrf_csr_write(VPRCSR_NORDIC_DIRBTGL, mask);
352 }
353 
nrf_vpr_csr_vio_in_get(void)354 NRF_STATIC_INLINE uint16_t nrf_vpr_csr_vio_in_get(void)
355 {
356     return (uint16_t)nrf_csr_read(VPRCSR_NORDIC_IN);
357 }
358 
359 #if !defined(NRF54H20_ENGA_XXAA)
nrf_vpr_csr_vio_mode_in_get(void)360 NRF_STATIC_INLINE nrf_vpr_csr_vio_mode_in_t nrf_vpr_csr_vio_mode_in_get(void)
361 {
362     return nrf_csr_read(VPRCSR_NORDIC_INMODE);
363 }
364 
nrf_vpr_csr_vio_mode_in_set(nrf_vpr_csr_vio_mode_in_t mode)365 NRF_STATIC_INLINE void nrf_vpr_csr_vio_mode_in_set(nrf_vpr_csr_vio_mode_in_t mode)
366 {
367     nrf_csr_write(VPRCSR_NORDIC_INMODE, mode);
368 }
369 #else
nrf_vpr_csr_vio_mode_in_get(void)370 NRF_STATIC_INLINE uint16_t nrf_vpr_csr_vio_mode_in_get(void)
371 {
372     return (uint16_t)nrf_csr_read(VPRCSR_NORDIC_INMODE);
373 }
374 
nrf_vpr_csr_vio_mode_in_set(uint16_t value)375 NRF_STATIC_INLINE void nrf_vpr_csr_vio_mode_in_set(uint16_t value)
376 {
377     nrf_csr_write(VPRCSR_NORDIC_INMODE, value);
378 }
379 #endif
380 
nrf_vpr_csr_vio_out_get(void)381 NRF_STATIC_INLINE uint16_t nrf_vpr_csr_vio_out_get(void)
382 {
383     return (uint16_t)nrf_csr_read(VPRCSR_NORDIC_OUT);
384 }
385 
nrf_vpr_csr_vio_out_set(uint16_t value)386 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_set(uint16_t value)
387 {
388     nrf_csr_write(VPRCSR_NORDIC_OUT, value);
389 }
390 
nrf_vpr_csr_vio_out_buffered_get(void)391 NRF_STATIC_INLINE uint32_t nrf_vpr_csr_vio_out_buffered_get(void)
392 {
393     return nrf_csr_read(VPRCSR_NORDIC_OUTB);
394 }
395 
nrf_vpr_csr_vio_out_buffered_set(uint32_t value)396 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_buffered_set(uint32_t value)
397 {
398     nrf_csr_write(VPRCSR_NORDIC_OUTB, value);
399 }
400 
nrf_vpr_csr_vio_out_buffered_dirty_check(void)401 NRF_STATIC_INLINE bool nrf_vpr_csr_vio_out_buffered_dirty_check(void)
402 {
403     return ((nrf_csr_read(VPRCSR_NORDIC_OUTBS) & VPRCSR_NORDIC_OUTBS_DIRTYBIT_Msk)
404             >> VPRCSR_NORDIC_OUTBS_DIRTYBIT_Pos) == VPRCSR_NORDIC_OUTBS_DIRTYBIT_DIRTY;
405 }
406 
nrf_vpr_csr_vio_out_toggle_set(uint16_t mask)407 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_toggle_set(uint16_t mask)
408 {
409     nrf_csr_write(VPRCSR_NORDIC_OUTTGL, mask);
410 }
411 
nrf_vpr_csr_vio_out_toggle_buffered_set(uint16_t mask)412 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_toggle_buffered_set(uint16_t mask)
413 {
414     nrf_csr_write(VPRCSR_NORDIC_OUTBTGL, mask);
415 }
416 
nrf_vpr_csr_vio_out_combined_set(uint32_t value)417 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_combined_set(uint32_t value)
418 {
419     nrf_csr_write(VPRCSR_NORDIC_OUTBD, value);
420 }
421 
nrf_vpr_csr_vio_out_combined_toggle_set(uint32_t mask)422 NRF_STATIC_INLINE void nrf_vpr_csr_vio_out_combined_toggle_set(uint32_t mask)
423 {
424     nrf_csr_write(VPRCSR_NORDIC_OUTBDTGL, mask);
425 }
426 
nrf_vpr_csr_vio_out_combined_dirty_check(void)427 NRF_STATIC_INLINE bool nrf_vpr_csr_vio_out_combined_dirty_check(void)
428 {
429     return ((nrf_csr_read(VPRCSR_NORDIC_OUTBDS) & VPRCSR_NORDIC_OUTBDS_DIRTYBIT_Msk)
430             >> VPRCSR_NORDIC_OUTBDS_DIRTYBIT_Pos) == VPRCSR_NORDIC_OUTBDS_DIRTYBIT_DIRTY;
431 }
432 
nrf_vpr_csr_vio_mode_out_get(nrf_vpr_csr_vio_mode_out_t * p_mode)433 NRF_STATIC_INLINE void nrf_vpr_csr_vio_mode_out_get(nrf_vpr_csr_vio_mode_out_t * p_mode)
434 {
435     uint32_t reg = nrf_csr_read(VPRCSR_NORDIC_OUTMODE);
436 
437     p_mode->shift_enable = ((reg & VPRCSR_NORDIC_OUTMODE_SHIFTMODE_Msk)
438                             >> VPRCSR_NORDIC_OUTMODE_SHIFTMODE_Pos)
439                            == VPRCSR_NORDIC_OUTMODE_SHIFTMODE_Enabled ? true : false;
440     p_mode->shift_size   = (reg & VPRCSR_NORDIC_OUTMODE_SHIFSIZE_Msk)
441                            >> VPRCSR_NORDIC_OUTMODE_SHIFSIZE_Pos;
442 }
443 
nrf_vpr_csr_vio_mode_out_set(nrf_vpr_csr_vio_mode_out_t const * p_mode)444 NRF_STATIC_INLINE void nrf_vpr_csr_vio_mode_out_set(nrf_vpr_csr_vio_mode_out_t const * p_mode)
445 {
446     uint32_t reg = ((p_mode->shift_enable ? VPRCSR_NORDIC_OUTMODE_SHIFTMODE_Enabled :
447                                             VPRCSR_NORDIC_OUTMODE_SHIFTMODE_Disabled)
448                     << VPRCSR_NORDIC_OUTMODE_SHIFTMODE_Pos) |
449                    ((p_mode->shift_size << VPRCSR_NORDIC_OUTMODE_SHIFSIZE_Pos)
450                     & VPRCSR_NORDIC_OUTMODE_SHIFSIZE_Msk);
451 
452     nrf_csr_write(VPRCSR_NORDIC_OUTMODE, reg);
453 }
454 
nrf_vpr_csr_vio_dirout_get(void)455 NRF_STATIC_INLINE uint32_t nrf_vpr_csr_vio_dirout_get(void)
456 {
457     return nrf_csr_read(VPRCSR_NORDIC_DIROUT);
458 }
459 
nrf_vpr_csr_vio_dirout_set(uint32_t value)460 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dirout_set(uint32_t value)
461 {
462     nrf_csr_write(VPRCSR_NORDIC_DIROUT, value);
463 }
464 
nrf_vpr_csr_vio_dirout_buffered_get(void)465 NRF_STATIC_INLINE uint32_t nrf_vpr_csr_vio_dirout_buffered_get(void)
466 {
467     return nrf_csr_read(VPRCSR_NORDIC_DIROUTB);
468 }
469 
nrf_vpr_csr_vio_dirout_buffered_set(uint32_t value)470 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dirout_buffered_set(uint32_t value)
471 {
472     nrf_csr_write(VPRCSR_NORDIC_DIROUTB, value);
473 }
474 
nrf_vpr_csr_vio_dirout_buffered_dirty_check(void)475 NRF_STATIC_INLINE bool nrf_vpr_csr_vio_dirout_buffered_dirty_check(void)
476 {
477     return ((nrf_csr_read(VPRCSR_NORDIC_DIROUTBS) & VPRCSR_NORDIC_DIROUTBS_DIRTYBIT_Msk)
478             >> VPRCSR_NORDIC_DIROUTBS_DIRTYBIT_Pos) == VPRCSR_NORDIC_DIROUTBS_DIRTYBIT_DIRTY;
479 }
480 
nrf_vpr_csr_vio_dirout_toggle_set(uint32_t mask)481 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dirout_toggle_set(uint32_t mask)
482 {
483     nrf_csr_write(VPRCSR_NORDIC_DIROUTTGL, mask);
484 }
485 
nrf_vpr_csr_vio_dirout_toggle_buffered_set(uint32_t mask)486 NRF_STATIC_INLINE void nrf_vpr_csr_vio_dirout_toggle_buffered_set(uint32_t mask)
487 {
488     nrf_csr_write(VPRCSR_NORDIC_DIROUTBTGL, mask);
489 }
490 
491 #endif // NRF_DECLARE_ONLY
492 
493 /** @} */
494 
495 #ifdef __cplusplus
496 }
497 #endif
498 
499 #endif // NRF_VPR_CSR_VIO_H__
500