1 /*
2  * Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are met:
9  *
10  * 1. Redistributions of source code must retain the above copyright notice, this
11  *    list of conditions and the following disclaimer.
12  *
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * 3. Neither the name of the copyright holder nor the names of its
18  *    contributors may be used to endorse or promote products derived from this
19  *    software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #ifndef NRF_TWIS_H__
35 #define NRF_TWIS_H__
36 
37 #include <nrfx.h>
38 
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42 
43 #if defined(NRF54H20_XXAA)
44 #define NRF_TWIS_CLOCKPIN_SDA_NEEDED 1
45 #endif
46 
47 #if defined(HALTIUM_XXAA)
48 #define NRF_TWIS_CLOCKPIN_SCL_NEEDED 1
49 #endif
50 
51 /**
52  * @defgroup nrf_twis_hal TWIS HAL
53  * @{
54  * @ingroup nrf_twis
55  * @brief   Hardware access layer for managing the Two Wire Interface Slave with EasyDMA
56  *          (TWIS) peripheral.
57  */
58 
59 #if defined(TWIS_DMA_RX_PTR_PTR_Msk) || defined(__NRFX_DOXYGEN__)
60 /** @brief Symbol indicating whether dedicated DMA register is present. */
61 #define NRF_TWIS_HAS_DMA_REG 1
62 #else
63 #define NRF_TWIS_HAS_DMA_REG 0
64 #endif
65 
66 #if (defined(TWIS_TASKS_DMA_RX_ENABLEMATCH_ENABLEMATCH_Msk) && \
67      defined(TWIS_EVENTS_DMA_RX_END_END_Msk)) || \
68     defined(__NRFX_DOXYGEN__)
69 /** @brief Symbol indicating whether TWIS DMA tasks and events are present. */
70 #define NRF_TWIS_HAS_DMA_TASKS_EVENTS 1
71 #else
72 #define NRF_TWIS_HAS_DMA_TASKS_EVENTS 0
73 #endif
74 
75 #if defined(TWIS_TXD_LIST_LIST_Msk) || defined(TWIS_RXD_LIST_LIST_Msk) || defined(__NRFX_DOXYGEN__)
76 /** @brief Symbol indicating whether TX or RX LIST is present. */
77 #define NRF_TWIS_HAS_LIST_REG 1
78 #else
79 #define NRF_TWIS_HAS_LIST_REG 0
80 #endif
81 
82 #if NRF_TWIS_HAS_DMA_REG
83 /** @brief Symbol specifying maximum possible size of the TX channel buffer. */
84 #define NRF_TWIS_TX_MAX_COUNT_SIZE TWIS_DMA_TX_MAXCNT_MAXCNT_Max
85 /** @brief Symbol specifying maximum possible size of the RX channel buffer. */
86 #define NRF_TWIS_RX_MAX_COUNT_SIZE TWIS_DMA_RX_MAXCNT_MAXCNT_Max
87 #else
88 #define NRF_TWIS_TX_MAX_COUNT_SIZE TWIS_TXD_MAXCNT_MAXCNT_Msk
89 #define NRF_TWIS_RX_MAX_COUNT_SIZE TWIS_RXD_MAXCNT_MAXCNT_Msk
90 #endif
91 
92 /**
93  * @brief Macro getting pointer to the structure of registers of the TWIS peripheral.
94  *
95  * @param[in] idx TWIS instance index.
96  *
97  * @return Pointer to the structure of registers of the TWIS peripheral.
98  */
99 #define NRF_TWIS_INST_GET(idx) NRFX_CONCAT(NRF_, TWIS, idx)
100 
101 /** @brief TWIS tasks. */
102 typedef enum
103 {
104     NRF_TWIS_TASK_STOP      = offsetof(NRF_TWIS_Type, TASKS_STOP),      ///< Stop TWIS transaction.
105     NRF_TWIS_TASK_SUSPEND   = offsetof(NRF_TWIS_Type, TASKS_SUSPEND),   ///< Suspend TWIS transaction.
106     NRF_TWIS_TASK_RESUME    = offsetof(NRF_TWIS_Type, TASKS_RESUME),    ///< Resume TWIS transaction.
107     NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), ///< Prepare the TWIS slave to respond to a write command.
108     NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX)  ///< Prepare the TWIS slave to respond to a read command.
109 } nrf_twis_task_t;
110 
111 /** @brief TWIS events. */
112 typedef enum
113 {
114     NRF_TWIS_EVENT_STOPPED   = offsetof(NRF_TWIS_Type, EVENTS_STOPPED),      ///< TWIS stopped.
115     NRF_TWIS_EVENT_ERROR     = offsetof(NRF_TWIS_Type, EVENTS_ERROR),        ///< TWIS error.
116 #if NRF_TWIS_HAS_DMA_TASKS_EVENTS
117     NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_DMA.RX.READY), ///< Receive sequence started.
118     NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_DMA.TX.READY), ///< Transmit sequence started.
119 #else
120     NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED),    ///< Receive sequence started.
121     NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED),    ///< Transmit sequence started.
122 #endif
123     NRF_TWIS_EVENT_WRITE     = offsetof(NRF_TWIS_Type, EVENTS_WRITE),        ///< Write command received.
124     NRF_TWIS_EVENT_READ      = offsetof(NRF_TWIS_Type, EVENTS_READ)          ///< Read command received.
125 } nrf_twis_event_t;
126 
127 /** @brief TWIS shortcuts. */
128 typedef enum
129 {
130     NRF_TWIS_SHORT_WRITE_SUSPEND_MASK   = TWIS_SHORTS_WRITE_SUSPEND_Msk, ///< Shortcut between WRITE event and SUSPEND task.
131     NRF_TWIS_SHORT_READ_SUSPEND_MASK    = TWIS_SHORTS_READ_SUSPEND_Msk,  ///< Shortcut between READ event and SUSPEND task.
132 } nrf_twis_short_mask_t;
133 
134 /** @brief TWIS interrupts. */
135 typedef enum
136 {
137     NRF_TWIS_INT_STOPPED_MASK   = TWIS_INTEN_STOPPED_Msk,    ///< Interrupt on STOPPED event.
138     NRF_TWIS_INT_ERROR_MASK     = TWIS_INTEN_ERROR_Msk,      ///< Interrupt on ERROR event.
139 #if NRF_TWIS_HAS_DMA_TASKS_EVENTS
140     NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_DMARXREADY_Msk, ///< Interrupt on RXSTARTED event.
141     NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_DMATXREADY_Msk, ///< Interrupt on TXSTARTED event.
142 #else
143     NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk,  ///< Interrupt on RXSTARTED event.
144     NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk,  ///< Interrupt on TXSTARTED event.
145 #endif
146     NRF_TWIS_INT_WRITE_MASK     = TWIS_INTEN_WRITE_Msk,      ///< Interrupt on WRITE event.
147     NRF_TWIS_INT_READ_MASK      = TWIS_INTEN_READ_Msk,       ///< Interrupt on READ event.
148 } nrf_twis_int_mask_t;
149 
150 /** @brief TWIS error source. */
151 typedef enum
152 {
153     NRF_TWIS_ERROR_OVERFLOW  = TWIS_ERRORSRC_OVERFLOW_Msk, ///< RX buffer overflow detected, and prevented.
154     NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk,    ///< NACK sent after receiving a data byte.
155     NRF_TWIS_ERROR_OVERREAD  = TWIS_ERRORSRC_OVERREAD_Msk  ///< TX buffer over-read detected, and prevented.
156 } nrf_twis_error_t;
157 
158 /** @brief TWIS address matching configuration. */
159 typedef enum
160 {
161     NRF_TWIS_CONFIG_ADDRESS0_MASK  = TWIS_CONFIG_ADDRESS0_Msk, ///< Enable or disable address matching on ADDRESS[0].
162     NRF_TWIS_CONFIG_ADDRESS1_MASK  = TWIS_CONFIG_ADDRESS1_Msk, ///< Enable or disable address matching on ADDRESS[1].
163     NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk |
164                                      TWIS_CONFIG_ADDRESS1_Msk  ///< Enable both address matching.
165 } nrf_twis_config_addr_mask_t;
166 
167 /**
168  * @brief Smallest variable type to hold the TWI address.
169  *
170  * Variable of the minimum size that can hold a single TWI address.
171  *
172  * @note Defined to make it simple to change if the new TWI supports for example
173  *       10 bit addressing mode.
174  */
175 typedef uint8_t nrf_twis_address_t;
176 
177 /**
178  * @brief Function for activating the specified TWIS task.
179  *
180  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
181  * @param[in] task  Task to be activated.
182  */
183 NRF_STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * p_reg, nrf_twis_task_t task);
184 
185 /**
186  * @brief Function for returning the address of the specified TWIS task register.
187  *
188  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
189  * @param[in] task  The specified task.
190  *
191  * @return Task address.
192  */
193 NRF_STATIC_INLINE uint32_t nrf_twis_task_address_get(NRF_TWIS_Type const * p_reg,
194                                                      nrf_twis_task_t       task);
195 
196 /**
197  * @brief Function for clearing the specified event.
198  *
199  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
200  * @param[in] event The specified event.
201  */
202 NRF_STATIC_INLINE void nrf_twis_event_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event);
203 
204 /**
205  * @brief Function for retrieving the state of the TWIS event.
206  *
207  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
208  * @param[in] event Event to be checked.
209  *
210  * @retval true  The event has been generated.
211  * @retval false The event has not been generated.
212  */
213 NRF_STATIC_INLINE bool nrf_twis_event_check(NRF_TWIS_Type const * p_reg, nrf_twis_event_t event);
214 
215 /**
216  * @brief Function for getting and clearing the state of the specified event.
217  *
218  * This function checks the state of the event and clears it.
219  *
220  * @param[in,out] p_reg Pointer to the structure of registers of the peripheral.
221  * @param[in]     event Event.
222  *
223  * @retval true  The event was set.
224  * @retval false The event was not set.
225  */
226 NRF_STATIC_INLINE bool nrf_twis_event_get_and_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event);
227 
228 /**
229  * @brief Function for returning the address of the specified TWIS event register.
230  *
231  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
232  * @param[in] event Event.
233  *
234  * @return Address.
235  */
236 NRF_STATIC_INLINE uint32_t nrf_twis_event_address_get(NRF_TWIS_Type const * p_reg,
237                                                       nrf_twis_event_t      event);
238 
239 /**
240  * @brief Function for setting a shortcut.
241  *
242  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
243  * @param[in] mask  Mask of shortcuts to be enabled.
244  */
245 NRF_STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * p_reg, uint32_t mask);
246 
247 /**
248  * @brief Function for clearing shortcuts.
249  *
250  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
251  * @param[in] mask  Mask of shortcuts to be disabled.
252  */
253 NRF_STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * p_reg, uint32_t mask);
254 
255 /**
256  * @brief Function for getting the shorts mask.
257  *
258  * Function returns shorts register.
259  *
260  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
261  *
262  * @return Flags of currently enabled shortcuts
263  */
264 NRF_STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type const * p_reg);
265 
266 /**
267  * @brief Function for enabling the specified interrupts.
268  *
269  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
270  * @param[in] mask  Mask of interrupts to be enabled.
271  *                  Use @ref nrf_twis_int_mask_t values for bit masking.
272  */
273 NRF_STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * p_reg, uint32_t mask);
274 
275 /**
276  * @brief Function for checking if the specified interrupts are enabled.
277  *
278  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
279  * @param[in] mask  Mask of interrupts to be checked.
280  *                  Use @ref nrf_twis_int_mask_t values for bit masking.
281  *
282  * @return Mask of enabled interrupts.
283  */
284 NRF_STATIC_INLINE uint32_t nrf_twis_int_enable_check(NRF_TWIS_Type const * p_reg, uint32_t mask);
285 
286 /**
287  * @brief Function for disabling the specified interrupts.
288  *
289  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
290  * @param[in] mask  Mask of interrupts to be disabled.
291  *                  Use @ref nrf_twis_int_mask_t values for bit masking.
292  */
293 NRF_STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * p_reg, uint32_t mask);
294 
295 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
296 /**
297  * @brief Function for setting the subscribe configuration for a given TWIS task.
298  *
299  * @param[in] p_reg   Pointer to the structure of registers of the peripheral.
300  * @param[in] task    Task for which to set the configuration.
301  * @param[in] channel Channel through which to subscribe events.
302  */
303 NRF_STATIC_INLINE void nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg,
304                                               nrf_twis_task_t task,
305                                               uint8_t         channel);
306 
307 /**
308  * @brief Function for clearing the subscribe configuration for a given
309  *        TWIS task.
310  *
311  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
312  * @param[in] task  Task for which to clear the configuration.
313  */
314 NRF_STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg, nrf_twis_task_t task);
315 
316 /**
317  * @brief Function for setting the publish configuration for a given TWIS event.
318  *
319  * @param[in] p_reg   Pointer to the structure of registers of the peripheral.
320  * @param[in] event   Event for which to set the configuration.
321  * @param[in] channel Channel through which to publish the event.
322  */
323 NRF_STATIC_INLINE void nrf_twis_publish_set(NRF_TWIS_Type *  p_reg,
324                                             nrf_twis_event_t event,
325                                             uint8_t         channel);
326 
327 /**
328  * @brief Function for clearing the publish configuration for a given TWIS event.
329  *
330  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
331  * @param[in] event Event for which to clear the configuration.
332  */
333 NRF_STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event);
334 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
335 
336 /**
337  * @brief Function for retrieving and clearing the TWIS error source.
338  *
339  * @attention Error sources are cleared after read.
340  *
341  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
342  *
343  * @return Error source mask with values from @ref nrf_twis_error_t.
344  */
345 NRF_STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * p_reg);
346 
347 /**
348  * @brief Function for getting information about which of the addresses matched.
349  *
350  * Function returns index in the address table
351  * that points to the address that already matched.
352  *
353  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
354  *
355  * @return Index of matched address.
356  */
357 NRF_STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg);
358 
359 /**
360  * @brief Function for enabling TWIS.
361  *
362  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
363  */
364 NRF_STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * p_reg);
365 
366 /**
367  * @brief Function for disabling TWIS.
368  *
369  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
370  */
371 NRF_STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * p_reg);
372 
373 /**
374  * @brief Function for checking if the TWIS is enabled.
375  *
376  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
377  *
378  * @retval true  The TWIS is enabled.
379  * @retval false The TWIS is not enabled.
380  */
381 NRF_STATIC_INLINE bool nrf_twis_enable_check(NRF_TWIS_Type const * p_reg);
382 
383 /**
384  * @brief Function for configuring TWIS pins.
385  *
386  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
387  * @param[in] scl   SCL pin number.
388  * @param[in] sda   SDA pin number.
389  */
390 NRF_STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * p_reg, uint32_t scl, uint32_t sda);
391 
392 /**
393  * @brief Function for retrieving the SCL pin selection.
394  *
395  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
396  *
397  * @return SCL pin selection.
398  */
399 NRF_STATIC_INLINE uint32_t nrf_twis_scl_pin_get(NRF_TWIS_Type const * p_reg);
400 
401 /**
402  * @brief Function for retrieving the SDA pin selection.
403  *
404  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
405  *
406  * @return SDA pin selection.
407  */
408 NRF_STATIC_INLINE uint32_t nrf_twis_sda_pin_get(NRF_TWIS_Type const * p_reg);
409 
410 /**
411  * @brief Function for setting the receive buffer.
412  *
413  * @param[in] p_reg  Pointer to the structure of registers of the peripheral.
414  * @param[in] p_buf  Pointer to the buffer for received data.
415  * @param[in] length Maximum number of data bytes to receive.
416  */
417 NRF_STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg,
418                                               uint8_t       * p_buf,
419                                               size_t          length);
420 
421 /**
422  * @brief Function for getting the receive buffer.
423  *
424  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
425  *
426  * @return Pointer to the receive buffer.
427  */
428 NRF_STATIC_INLINE uint8_t * nrf_twis_rx_buffer_get(NRF_TWIS_Type const * p_reg);
429 
430 /**
431  * @brief Function that prepares TWIS for receiving
432  *
433  * This function sets receive buffer and then sets NRF_TWIS_TASK_PREPARERX task.
434  *
435  * @param[in] p_reg  Pointer to the structure of registers of the peripheral.
436  * @param[in] p_buf  Pointer to the buffer for received data.
437  * @param[in] length Maximum number of data bytes to receive.
438  */
439 NRF_STATIC_INLINE void nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg, uint8_t * p_buf, size_t length);
440 
441 /**
442  * @brief Function for getting number of bytes received in the last transaction.
443  *
444  * @param[in] p_reg TWIS instance.
445  *
446  * @return Amount of received bytes.
447  * */
448 NRF_STATIC_INLINE size_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * p_reg);
449 
450 /**
451  * @brief Function for setting the transmit buffer.
452  *
453  * @param[in] p_reg  Pointer to the structure of registers of the peripheral.
454  * @param[in] p_buf  Pointer to the buffer with data to send.
455  * @param[in] length Maximum number of data bytes to transmit.
456  */
457 NRF_STATIC_INLINE void nrf_twis_tx_buffer_set(NRF_TWIS_Type * p_reg,
458                                               uint8_t const * p_buf,
459                                               size_t          length);
460 
461 /**
462  * @brief Function for getting the transmit buffer.
463  *
464  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
465  *
466  * @return Pointer to the transmit buffer.
467  */
468 NRF_STATIC_INLINE uint8_t * nrf_twis_tx_buffer_get(NRF_TWIS_Type const * p_reg);
469 
470 /**
471  * @brief Function for preparing TWIS for transmitting.
472  *
473  * This function sets transmit buffer and then sets NRF_TWIS_TASK_PREPARETX task.
474  *
475  * @param[in] p_reg  Pointer to the structure of registers of the peripheral.
476  * @param[in] p_buf  Pointer to the buffer with data to send.
477  * @param[in] length Maximum number of data bytes to transmit.
478  */
479 NRF_STATIC_INLINE void nrf_twis_tx_prepare(NRF_TWIS_Type * p_reg,
480                                            uint8_t const * p_buf,
481                                            size_t          length);
482 
483 /**
484  * @brief Function for getting the number of bytes transmitted in the last transaction.
485  *
486  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
487  *
488  * @return Amount of bytes transmitted.
489  */
490 NRF_STATIC_INLINE size_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * p_reg);
491 
492 /**
493  * @brief Function for setting the slave address.
494  *
495  * Function sets the selected address for this TWI interface.
496  *
497  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
498  * @param[in] n     Index of address to be set.
499  * @param[in] addr  Addres to be set.
500  *
501  * @sa nrf_twis_config_address_set
502  * @sa nrf_twis_config_address_get
503  */
504 NRF_STATIC_INLINE void nrf_twis_address_set(NRF_TWIS_Type *    p_reg,
505                                             uint_fast8_t       n,
506                                             nrf_twis_address_t addr);
507 
508 /**
509  * @brief Function for retrieving configured slave address.
510  *
511  * Function gets the selected address for this TWI interface.
512  *
513  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
514  * @param[in] n     Index of address to get.
515  *
516  * @return Configured slave address.
517  */
518 NRF_STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(NRF_TWIS_Type const * p_reg,
519                                                           uint_fast8_t          n);
520 
521 /**
522  * @brief Function for setting the device address configuration.
523  *
524  * @param[in] p_reg     Pointer to the structure of registers of the peripheral.
525  * @param[in] addr_mask Mask of address indexes of what device should answer to.
526  *
527  * @sa nrf_twis_address_set
528  */
529 NRF_STATIC_INLINE void nrf_twis_config_address_set(NRF_TWIS_Type *             p_reg,
530                                                    nrf_twis_config_addr_mask_t addr_mask);
531 
532 /**
533  * @brief Function for retrieving the device address configuration.
534  *
535  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
536  *
537  * @return Mask of address indexes of what device should answer to.
538  */
539 NRF_STATIC_INLINE
540 nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * p_reg);
541 
542 /**
543  * @brief Function for setting the over-read character.
544  *
545  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
546  * @param[in] orc   Over-read character. Character clocked out in case of
547  *                  over-read of the TXD buffer.
548  */
549 NRF_STATIC_INLINE void nrf_twis_orc_set(NRF_TWIS_Type * p_reg, uint8_t orc);
550 
551 /**
552  * @brief Function for setting the over-read character.
553  *
554  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
555  *
556  * @return Over-read character configured for selected instance.
557  */
558 NRF_STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * p_reg);
559 
560 #if NRF_TWIS_HAS_LIST_REG
561 /**
562  * @brief Function for enabling the TX list feature.
563  *
564  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
565  */
566 NRF_STATIC_INLINE void nrf_twis_tx_list_enable(NRF_TWIS_Type * p_reg);
567 
568 /**
569  * @brief Function for disabling the TX list feature.
570  *
571  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
572  */
573 NRF_STATIC_INLINE void nrf_twis_tx_list_disable(NRF_TWIS_Type * p_reg);
574 
575 /**
576  * @brief Function for enabling the RX list feature.
577  *
578  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
579  */
580 NRF_STATIC_INLINE void nrf_twis_rx_list_enable(NRF_TWIS_Type * p_reg);
581 
582 /**
583  * @brief Function for disabling the RX list feature.
584  *
585  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
586  */
587 NRF_STATIC_INLINE void nrf_twis_rx_list_disable(NRF_TWIS_Type * p_reg);
588 #endif
589 
590 /** @} */ /*  End of nrf_twis_hal */
591 
592 #ifndef NRF_DECLARE_ONLY
593 
594 /* ------------------------------------------------------------------------------------------------
595  *  Internal functions
596  */
597 
598 /**
599  * @internal
600  * @brief Internal function for getting task or event register address.
601  *
602  * @param[in] p_reg  Pointer to the structure of registers of the peripheral.
603  * @param[in] offset Offset of the register from the beginning of the instance.
604  *
605  * @attention Offset must be modulo 4 value. In other case, hardware fault can occur.
606  * @return Pointer to the register.
607  */
nrf_twis_getRegPtr(NRF_TWIS_Type * p_reg,uint32_t offset)608 NRF_STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type * p_reg, uint32_t offset)
609 {
610     return (volatile uint32_t*)((uint8_t *)p_reg + (uint32_t)offset);
611 }
612 
613 /**
614  * @internal
615  * @brief Internal function for getting task/event register address - constant version.
616  *
617  * @param[in] p_reg  Pointer to the structure of registers of the peripheral.
618  * @param[in] offset Offset of the register from the beginning of the instance.
619  *
620  * @attention Offset must be modulo 4 value. In other case, hardware fault can occur.
621  * @return Pointer to the register.
622  */
nrf_twis_getRegPtr_c(NRF_TWIS_Type const * p_reg,uint32_t offset)623 NRF_STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * p_reg,
624                                                                 uint32_t              offset)
625 {
626     return (volatile const uint32_t*)((uint8_t const *)p_reg + (uint32_t)offset);
627 }
628 
629 
630 /* ------------------------------------------------------------------------------------------------
631  *  Interface functions definitions
632  */
633 
634 
nrf_twis_task_trigger(NRF_TWIS_Type * p_reg,nrf_twis_task_t task)635 NRF_STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * p_reg, nrf_twis_task_t task)
636 {
637     *(nrf_twis_getRegPtr(p_reg, (uint32_t)task)) = 1UL;
638 }
639 
nrf_twis_task_address_get(NRF_TWIS_Type const * p_reg,nrf_twis_task_t task)640 NRF_STATIC_INLINE uint32_t nrf_twis_task_address_get(NRF_TWIS_Type const * p_reg,
641                                                      nrf_twis_task_t       task)
642 {
643     return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)task);
644 }
645 
nrf_twis_event_clear(NRF_TWIS_Type * p_reg,nrf_twis_event_t event)646 NRF_STATIC_INLINE void nrf_twis_event_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event)
647 {
648     *(nrf_twis_getRegPtr(p_reg, (uint32_t)event)) = 0UL;
649     nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
650 }
651 
nrf_twis_event_check(NRF_TWIS_Type const * p_reg,nrf_twis_event_t event)652 NRF_STATIC_INLINE bool nrf_twis_event_check(NRF_TWIS_Type const * p_reg, nrf_twis_event_t event)
653 {
654     return (bool)*nrf_twis_getRegPtr_c(p_reg, (uint32_t)event);
655 }
656 
nrf_twis_event_get_and_clear(NRF_TWIS_Type * p_reg,nrf_twis_event_t event)657 NRF_STATIC_INLINE bool nrf_twis_event_get_and_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event)
658 {
659     bool ret = nrf_twis_event_check(p_reg, event);
660     if (ret)
661     {
662         nrf_twis_event_clear(p_reg, event);
663     }
664     return ret;
665 }
666 
nrf_twis_event_address_get(NRF_TWIS_Type const * p_reg,nrf_twis_event_t event)667 NRF_STATIC_INLINE uint32_t nrf_twis_event_address_get(NRF_TWIS_Type const * p_reg,
668                                                       nrf_twis_event_t      event)
669 {
670     return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)event);
671 }
672 
nrf_twis_shorts_enable(NRF_TWIS_Type * p_reg,uint32_t mask)673 NRF_STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * p_reg, uint32_t mask)
674 {
675     p_reg->SHORTS |= mask;
676 }
677 
nrf_twis_shorts_disable(NRF_TWIS_Type * p_reg,uint32_t mask)678 NRF_STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * p_reg, uint32_t mask)
679 {
680     if (~0U == mask)
681     {
682         /* Optimized version for "disable all" */
683         p_reg->SHORTS = 0;
684     }
685     else
686     {
687         p_reg->SHORTS &= ~mask;
688     }
689 }
690 
nrf_twis_shorts_get(NRF_TWIS_Type const * p_reg)691 NRF_STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type const * p_reg)
692 {
693     return p_reg->SHORTS;
694 }
695 
nrf_twis_int_enable(NRF_TWIS_Type * p_reg,uint32_t mask)696 NRF_STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * p_reg, uint32_t mask)
697 {
698     p_reg->INTENSET = mask;
699 }
700 
nrf_twis_int_enable_check(NRF_TWIS_Type const * p_reg,uint32_t mask)701 NRF_STATIC_INLINE uint32_t nrf_twis_int_enable_check(NRF_TWIS_Type const * p_reg, uint32_t mask)
702 {
703     return p_reg->INTENSET & mask;
704 }
705 
nrf_twis_int_disable(NRF_TWIS_Type * p_reg,uint32_t mask)706 NRF_STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * p_reg, uint32_t mask)
707 {
708     p_reg->INTENCLR = mask;
709 }
710 
711 #if defined(DPPI_PRESENT)
nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg,nrf_twis_task_t task,uint8_t channel)712 NRF_STATIC_INLINE void nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg,
713                                               nrf_twis_task_t task,
714                                               uint8_t         channel)
715 {
716     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
717             ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
718 }
719 
nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg,nrf_twis_task_t task)720 NRF_STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg, nrf_twis_task_t task)
721 {
722     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
723 }
724 
nrf_twis_publish_set(NRF_TWIS_Type * p_reg,nrf_twis_event_t event,uint8_t channel)725 NRF_STATIC_INLINE void nrf_twis_publish_set(NRF_TWIS_Type *  p_reg,
726                                             nrf_twis_event_t event,
727                                             uint8_t          channel)
728 {
729     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
730             ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
731 }
732 
nrf_twis_publish_clear(NRF_TWIS_Type * p_reg,nrf_twis_event_t event)733 NRF_STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type *  p_reg, nrf_twis_event_t event)
734 {
735     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
736 }
737 #endif // defined(DPPI_PRESENT)
738 
nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * p_reg)739 NRF_STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * p_reg)
740 {
741     uint32_t ret = p_reg->ERRORSRC;
742     p_reg->ERRORSRC = ret;
743     return ret;
744 }
745 
nrf_twis_match_get(NRF_TWIS_Type const * p_reg)746 NRF_STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg)
747 {
748     return (uint_fast8_t)p_reg->MATCH;
749 }
750 
nrf_twis_enable(NRF_TWIS_Type * p_reg)751 NRF_STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * p_reg)
752 {
753     p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos);
754 }
755 
nrf_twis_disable(NRF_TWIS_Type * p_reg)756 NRF_STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * p_reg)
757 {
758     p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Disabled << TWIS_ENABLE_ENABLE_Pos);
759 }
760 
nrf_twis_enable_check(NRF_TWIS_Type const * p_reg)761 NRF_STATIC_INLINE bool nrf_twis_enable_check(NRF_TWIS_Type const * p_reg)
762 {
763     return (p_reg->ENABLE == (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos));
764 }
765 
nrf_twis_pins_set(NRF_TWIS_Type * p_reg,uint32_t scl,uint32_t sda)766 NRF_STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * p_reg, uint32_t scl, uint32_t sda)
767 {
768     p_reg->PSEL.SCL = scl;
769     p_reg->PSEL.SDA = sda;
770 }
771 
nrf_twis_scl_pin_get(NRF_TWIS_Type const * p_reg)772 NRF_STATIC_INLINE uint32_t nrf_twis_scl_pin_get(NRF_TWIS_Type const * p_reg)
773 {
774     return p_reg->PSEL.SCL;
775 }
776 
nrf_twis_sda_pin_get(NRF_TWIS_Type const * p_reg)777 NRF_STATIC_INLINE uint32_t nrf_twis_sda_pin_get(NRF_TWIS_Type const * p_reg)
778 {
779     return p_reg->PSEL.SDA;
780 }
781 
nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg,uint8_t * p_buf,size_t length)782 NRF_STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg, uint8_t * p_buf, size_t length)
783 {
784 #if NRF_TWIS_HAS_DMA_REG
785     p_reg->DMA.RX.PTR    = (uint32_t)p_buf;
786     p_reg->DMA.RX.MAXCNT = (uint32_t)length;
787 #else
788     p_reg->RXD.PTR    = (uint32_t)p_buf;
789     p_reg->RXD.MAXCNT = length;
790 #endif
791 }
792 
nrf_twis_rx_buffer_get(NRF_TWIS_Type const * p_reg)793 NRF_STATIC_INLINE uint8_t * nrf_twis_rx_buffer_get(NRF_TWIS_Type const * p_reg)
794 {
795 #if NRF_TWIS_HAS_DMA_REG
796     return (uint8_t *)p_reg->DMA.RX.PTR;
797 #else
798     return (uint8_t *)p_reg->RXD.PTR;
799 #endif
800 }
801 
nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg,uint8_t * p_buf,size_t length)802 NRF_STATIC_INLINE void nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg, uint8_t * p_buf, size_t length)
803 {
804     nrf_twis_rx_buffer_set(p_reg, p_buf, length);
805     nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARERX);
806 }
807 
nrf_twis_rx_amount_get(NRF_TWIS_Type const * p_reg)808 NRF_STATIC_INLINE size_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * p_reg)
809 {
810 #if NRF_TWIS_HAS_DMA_REG
811     return p_reg->DMA.RX.AMOUNT;
812 #else
813     return p_reg->RXD.AMOUNT;
814 #endif
815 }
816 
nrf_twis_tx_buffer_set(NRF_TWIS_Type * p_reg,uint8_t const * p_buf,size_t length)817 NRF_STATIC_INLINE void nrf_twis_tx_buffer_set(NRF_TWIS_Type * p_reg,
818                                               uint8_t const * p_buf,
819                                               size_t          length)
820 {
821 #if NRF_TWIS_HAS_DMA_REG
822     p_reg->DMA.TX.PTR    = (uint32_t)p_buf;
823     p_reg->DMA.TX.MAXCNT = (uint32_t)length;
824 #else
825     p_reg->TXD.PTR    = (uint32_t)p_buf;
826     p_reg->TXD.MAXCNT = length;
827 #endif
828 }
829 
nrf_twis_tx_buffer_get(NRF_TWIS_Type const * p_reg)830 NRF_STATIC_INLINE uint8_t * nrf_twis_tx_buffer_get(NRF_TWIS_Type const * p_reg)
831 {
832 #if NRF_TWIS_HAS_DMA_REG
833     return (uint8_t *)p_reg->DMA.TX.PTR;
834 #else
835     return (uint8_t *)p_reg->TXD.PTR;
836 #endif
837 }
838 
nrf_twis_tx_prepare(NRF_TWIS_Type * p_reg,uint8_t const * p_buf,size_t length)839 NRF_STATIC_INLINE void nrf_twis_tx_prepare(NRF_TWIS_Type * p_reg,
840                                            uint8_t const * p_buf,
841                                            size_t          length)
842 {
843     nrf_twis_tx_buffer_set(p_reg, p_buf, length);
844     nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARETX);
845 }
846 
nrf_twis_tx_amount_get(NRF_TWIS_Type const * p_reg)847 NRF_STATIC_INLINE size_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * p_reg)
848 {
849 #if NRF_TWIS_HAS_DMA_REG
850     return p_reg->DMA.TX.AMOUNT;
851 #else
852     return p_reg->TXD.AMOUNT;
853 #endif
854 }
855 
nrf_twis_address_set(NRF_TWIS_Type * p_reg,uint_fast8_t n,nrf_twis_address_t addr)856 NRF_STATIC_INLINE void nrf_twis_address_set(NRF_TWIS_Type *    p_reg,
857                                             uint_fast8_t       n,
858                                             nrf_twis_address_t addr)
859 {
860     NRFX_ASSERT((uint32_t)addr <= TWIS_ADDRESS_ADDRESS_Msk);
861     p_reg->ADDRESS[n] = (uint32_t)addr;
862 }
863 
nrf_twis_address_get(NRF_TWIS_Type const * p_reg,uint_fast8_t n)864 NRF_STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(NRF_TWIS_Type const * p_reg,
865                                                           uint_fast8_t          n)
866 {
867     return (nrf_twis_address_t)p_reg->ADDRESS[n];
868 }
869 
nrf_twis_config_address_set(NRF_TWIS_Type * p_reg,nrf_twis_config_addr_mask_t addr_mask)870 NRF_STATIC_INLINE void nrf_twis_config_address_set(NRF_TWIS_Type *             p_reg,
871                                                    nrf_twis_config_addr_mask_t addr_mask)
872 {
873     /* This is the only configuration in TWIS - just write it without masking. */
874     p_reg->CONFIG = (uint32_t)addr_mask;
875 }
876 
877 NRF_STATIC_INLINE
nrf_twis_config_address_get(NRF_TWIS_Type const * p_reg)878 nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * p_reg)
879 {
880     return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & NRF_TWIS_CONFIG_ADDRESS01_MASK);
881 }
882 
nrf_twis_orc_set(NRF_TWIS_Type * p_reg,uint8_t orc)883 NRF_STATIC_INLINE void nrf_twis_orc_set(NRF_TWIS_Type * p_reg, uint8_t orc)
884 {
885     p_reg->ORC = orc;
886 }
887 
nrf_twis_orc_get(NRF_TWIS_Type const * p_reg)888 NRF_STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * p_reg)
889 {
890     return (uint8_t)p_reg->ORC;
891 }
892 
893 #if NRF_TWIS_HAS_LIST_REG
nrf_twis_tx_list_enable(NRF_TWIS_Type * p_reg)894 NRF_STATIC_INLINE void nrf_twis_tx_list_enable(NRF_TWIS_Type * p_reg)
895 {
896     p_reg->TXD.LIST = TWIS_TXD_LIST_LIST_ArrayList << TWIS_TXD_LIST_LIST_Pos;
897 }
898 
nrf_twis_tx_list_disable(NRF_TWIS_Type * p_reg)899 NRF_STATIC_INLINE void nrf_twis_tx_list_disable(NRF_TWIS_Type * p_reg)
900 {
901     p_reg->TXD.LIST = TWIS_TXD_LIST_LIST_Disabled << TWIS_TXD_LIST_LIST_Pos;
902 }
903 
nrf_twis_rx_list_enable(NRF_TWIS_Type * p_reg)904 NRF_STATIC_INLINE void nrf_twis_rx_list_enable(NRF_TWIS_Type * p_reg)
905 {
906     p_reg->RXD.LIST = TWIS_RXD_LIST_LIST_ArrayList << TWIS_RXD_LIST_LIST_Pos;
907 }
908 
nrf_twis_rx_list_disable(NRF_TWIS_Type * p_reg)909 NRF_STATIC_INLINE void nrf_twis_rx_list_disable(NRF_TWIS_Type * p_reg)
910 {
911     p_reg->RXD.LIST = TWIS_RXD_LIST_LIST_Disabled << TWIS_RXD_LIST_LIST_Pos;
912 }
913 #endif
914 
915 #endif /* NRF_DECLARE_ONLY */
916 
917 
918 #ifdef __cplusplus
919 }
920 #endif
921 
922 #endif /* NRF_TWIS_H__ */
923