1 /*
2 * Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_TWIM_H__
35 #define NRF_TWIM_H__
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 #if defined(NRF54H20_XXAA)
44 #define NRF_TWIM_CLOCKPIN_SDA_NEEDED 1
45 #endif
46
47 #if defined(HALTIUM_XXAA)
48 #define NRF_TWIM_CLOCKPIN_SCL_NEEDED 1
49 #endif
50
51 /**
52 * @defgroup nrf_twim_hal TWIM HAL
53 * @{
54 * @ingroup nrf_twim
55 * @brief Hardware access layer for managing the TWIM peripheral.
56 */
57
58 /**
59 * @brief Macro getting pointer to the structure of registers of the TWIM peripheral.
60 *
61 * @param[in] idx TWIM instance index.
62 *
63 * @return Pointer to the structure of registers of the TWIM peripheral.
64 */
65 #define NRF_TWIM_INST_GET(idx) NRFX_CONCAT(NRF_, TWIM, idx)
66
67 #if defined(TWIM_FREQUENCY_FREQUENCY_K1000) || defined(__NRFX_DOXYGEN__)
68 /** @brief Symbol indicating whether 1000 kHz clock frequency is available. */
69 #define NRF_TWIM_HAS_1000_KHZ_FREQ 1
70 #else
71 #define NRF_TWIM_HAS_1000_KHZ_FREQ 0
72 #endif
73
74 #if defined(TWIM_TXD_LIST_LIST_ArrayList) || defined(TWIM_DMA_TX_LIST_TYPE_ArrayList) || \
75 defined(__NRFX_DOXYGEN__)
76 /** @brief Symbol indicating whether EasyDMA array list feature is present. */
77 #define NRF_TWIM_HAS_ARRAY_LIST 1
78 #else
79 #define NRF_TWIM_HAS_ARRAY_LIST 0
80 #endif
81
82 #if defined(TWIM_DMA_RX_PTR_PTR_Msk) || defined(__NRFX_DOXYGEN__)
83 /** @brief Symbol indicating whether dedicated DMA register is present. */
84 #define NRF_TWIM_HAS_DMA_REG 1
85 #else
86 #define NRF_TWIM_HAS_DMA_REG 0
87 #endif
88
89 #if defined(TWIM_DMA_RX_CURRENTAMOUNT_AMOUNT_Msk) || defined(__NRFX_DOXYGEN__)
90 /** @brief Symbol indicating whether DMA CURRENTAMOUNT registers are present. */
91 #define NRF_TWIM_HAS_DMA_CURRENTAMOUNT_REG 1
92 #else
93 #define NRF_TWIM_HAS_DMA_CURRENTAMOUNT_REG 0
94 #endif
95
96 #if (defined(TWIM_TASKS_DMA_RX_START_START_Msk) && defined(TWIM_EVENTS_DMA_RX_END_END_Msk)) || \
97 defined(__NRFX_DOXYGEN__)
98 /** @brief Symbol indicating whether TWIM DMA tasks and events are present. */
99 #define NRF_TWIM_HAS_DMA_TASKS_EVENTS 1
100 #else
101 #define NRF_TWIM_HAS_DMA_TASKS_EVENTS 0
102 #endif
103
104 #if defined(TWIM_SHORTS_LASTTX_DMA_RX_START_Msk) || defined(__NRFX_DOXYGEN__)
105 /** @brief Symbol indicating whether TWIM DMA shortcuts are present. */
106 #define NRF_TWIM_HAS_DMA_SHORTS 1
107 #else
108 #define NRF_TWIM_HAS_DMA_SHORTS 0
109 #endif
110
111 #if (defined(TWIM_EVENTS_RXBUSERROR_EVENTS_RXBUSERROR_Msk) || \
112 defined(TWIM_EVENTS_DMA_RX_BUSERROR_BUSERROR_Msk)) || defined(__NRFX_DOXYGEN__)
113 /** @brief Symbol indicating whether TWIM BUSERROR events are present. */
114 #define NRF_TWIM_HAS_BUS_ERROR_EVENTS 1
115 #else
116 #define NRF_TWIM_HAS_BUS_ERROR_EVENTS 0
117 #endif
118
119 #if NRF_TWIM_HAS_DMA_REG
120 /** @brief Max number of RX patterns. */
121 #define NRF_TWIM_DMA_RX_PATTERN_MAX_COUNT TWIM_DMA_RX_MATCH_CANDIDATE_MaxCount
122 #endif
123
124 /** @brief TWIM tasks. */
125 typedef enum
126 {
127 #if NRF_TWIM_HAS_DMA_TASKS_EVENTS
128 NRF_TWIM_TASK_STARTRX = offsetof(NRF_TWIM_Type, TASKS_DMA.RX.START), ///< Start TWI receive operation using easyDMA to load the values.
129 NRF_TWIM_TASK_STOPRX = offsetof(NRF_TWIM_Type, TASKS_DMA.RX.STOP), ///< Stop TWI receive operation using easyDMA. This does not trigger an END event.
130 NRF_TWIM_TASK_STARTTX = offsetof(NRF_TWIM_Type, TASKS_DMA.TX.START), ///< Start TWI transmit operation using easyDMA to load the values.
131 NRF_TWIM_TASK_STOPTX = offsetof(NRF_TWIM_Type, TASKS_DMA.TX.STOP), ///< Stop TWI transmit operation using easyDMA to load the values.
132 NRF_TWIM_TASK_ENABLERXMATCH0 = offsetof(NRF_TWIM_Type, TASKS_DMA.RX.ENABLEMATCH[0]), ///< Enable TWI pattern matching functionality for pattern 0.
133 NRF_TWIM_TASK_ENABLERXMATCH1 = offsetof(NRF_TWIM_Type, TASKS_DMA.RX.ENABLEMATCH[1]), ///< Enable TWI pattern matching functionality for pattern 1.
134 NRF_TWIM_TASK_ENABLERXMATCH2 = offsetof(NRF_TWIM_Type, TASKS_DMA.RX.ENABLEMATCH[2]), ///< Enable TWI pattern matching functionality for pattern 2.
135 NRF_TWIM_TASK_ENABLERXMATCH3 = offsetof(NRF_TWIM_Type, TASKS_DMA.RX.ENABLEMATCH[3]), ///< Enable TWI pattern matching functionality for pattern 3.
136 NRF_TWIM_TASK_DISABLERXMATCH0 = offsetof(NRF_TWIM_Type, TASKS_DMA.RX.DISABLEMATCH[0]), ///< Disable TWI pattern matching functionality for pattern 0.
137 NRF_TWIM_TASK_DISABLERXMATCH1 = offsetof(NRF_TWIM_Type, TASKS_DMA.RX.DISABLEMATCH[1]), ///< Disable TWI pattern matching functionality for pattern 1.
138 NRF_TWIM_TASK_DISABLERXMATCH2 = offsetof(NRF_TWIM_Type, TASKS_DMA.RX.DISABLEMATCH[2]), ///< Disable TWI pattern matching functionality for pattern 2.
139 NRF_TWIM_TASK_DISABLERXMATCH3 = offsetof(NRF_TWIM_Type, TASKS_DMA.RX.DISABLEMATCH[3]), ///< Disable TWI pattern matching functionality for pattern 3.
140 #else
141 NRF_TWIM_TASK_STARTRX = offsetof(NRF_TWIM_Type, TASKS_STARTRX), ///< Start TWI receive sequence.
142 NRF_TWIM_TASK_STARTTX = offsetof(NRF_TWIM_Type, TASKS_STARTTX), ///< Start TWI transmit sequence.
143 #endif
144 NRF_TWIM_TASK_STOP = offsetof(NRF_TWIM_Type, TASKS_STOP), ///< Stop TWI transaction.
145 NRF_TWIM_TASK_SUSPEND = offsetof(NRF_TWIM_Type, TASKS_SUSPEND), ///< Suspend TWI transaction.
146 NRF_TWIM_TASK_RESUME = offsetof(NRF_TWIM_Type, TASKS_RESUME) ///< Resume TWI transaction.
147 } nrf_twim_task_t;
148
149 /** @brief TWIM events. */
150 typedef enum
151 {
152 NRF_TWIM_EVENT_STOPPED = offsetof(NRF_TWIM_Type, EVENTS_STOPPED), ///< TWI stopped.
153 NRF_TWIM_EVENT_ERROR = offsetof(NRF_TWIM_Type, EVENTS_ERROR), ///< TWI error.
154 NRF_TWIM_EVENT_SUSPENDED = offsetof(NRF_TWIM_Type, EVENTS_SUSPENDED), ///< TWI suspended.
155 #if NRF_TWIM_HAS_DMA_TASKS_EVENTS
156 NRF_TWIM_EVENT_ENDRX = offsetof(NRF_TWIM_Type, EVENTS_DMA.RX.END), ///< Receive sequence finished.
157 NRF_TWIM_EVENT_RXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_DMA.RX.READY), ///< Receive sequence started.
158 NRF_TWIM_EVENT_RXMATCH0 = offsetof(NRF_TWIM_Type, EVENTS_DMA.RX.MATCH[0]), ///< Pattern match for pattern 0 detected.
159 NRF_TWIM_EVENT_RXMATCH1 = offsetof(NRF_TWIM_Type, EVENTS_DMA.RX.MATCH[1]), ///< Pattern match for pattern 1 detected.
160 NRF_TWIM_EVENT_RXMATCH2 = offsetof(NRF_TWIM_Type, EVENTS_DMA.RX.MATCH[2]), ///< Pattern match for pattern 2 detected.
161 NRF_TWIM_EVENT_RXMATCH3 = offsetof(NRF_TWIM_Type, EVENTS_DMA.RX.MATCH[3]), ///< Pattern match for pattern 3 detected.
162 NRF_TWIM_EVENT_ENDTX = offsetof(NRF_TWIM_Type, EVENTS_DMA.TX.END), ///< Transmit sequence finished.
163 NRF_TWIM_EVENT_TXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_DMA.TX.READY), ///< Transmit sequence started.
164 #if NRF_TWIM_HAS_BUS_ERROR_EVENTS
165 NRF_TWIM_EVENT_RXBUSERROR = offsetof(NRF_TWIM_Type, EVENTS_DMA.RX.BUSERROR), ///< Memory bus error occurred during the RX transfer.
166 NRF_TWIM_EVENT_TXBUSERROR = offsetof(NRF_TWIM_Type, EVENTS_DMA.TX.BUSERROR), ///< Memory bus error occurred during the TX transfer.
167 #endif
168 #else
169 NRF_TWIM_EVENT_RXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_RXSTARTED), ///< Receive sequence started.
170 NRF_TWIM_EVENT_TXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_TXSTARTED), ///< Transmit sequence started.
171 #if NRF_TWIM_HAS_BUS_ERROR_EVENTS
172 NRF_TWIM_EVENT_RXBUSERROR = offsetof(NRF_TWIM_Type, EVENTS_RXBUSERROR), ///< Memory bus error occurred during the RX transfer.
173 NRF_TWIM_EVENT_TXBUSERROR = offsetof(NRF_TWIM_Type, EVENTS_TXBUSERROR), ///< Memory bus error occurred during the TX transfer.
174 #endif
175 #endif // NRF_TWIM_HAS_DMA_TASKS_EVENTS
176 NRF_TWIM_EVENT_LASTRX = offsetof(NRF_TWIM_Type, EVENTS_LASTRX), ///< Byte boundary, starting to receive the last byte.
177 NRF_TWIM_EVENT_LASTTX = offsetof(NRF_TWIM_Type, EVENTS_LASTTX) ///< Byte boundary, starting to transmit the last byte.
178 } nrf_twim_event_t;
179
180 /** @brief TWIM shortcuts. */
181 typedef enum
182 {
183 NRF_TWIM_SHORT_LASTTX_SUSPEND_MASK = TWIM_SHORTS_LASTTX_SUSPEND_Msk, ///< Shortcut between LASTTX event and SUSPEND task.
184 NRF_TWIM_SHORT_LASTTX_STOP_MASK = TWIM_SHORTS_LASTTX_STOP_Msk, ///< Shortcut between LASTTX event and STOP task.
185 NRF_TWIM_SHORT_LASTRX_STOP_MASK = TWIM_SHORTS_LASTRX_STOP_Msk, ///< Shortcut between LASTRX event and STOP task.
186 #if NRF_TWIM_HAS_DMA_SHORTS
187 NRF_TWIM_SHORT_LASTTX_STARTRX_MASK = TWIM_SHORTS_LASTTX_DMA_RX_START_Msk, ///< Shortcut between LASTTX event and STARTRX task.
188 NRF_TWIM_SHORT_LASTRX_STARTTX_MASK = TWIM_SHORTS_LASTRX_DMA_TX_START_Msk, ///< Shortcut between LASTRX event and STARTTX task.
189 #else
190 NRF_TWIM_SHORT_LASTTX_STARTRX_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk, ///< Shortcut between LASTTX event and STARTRX task.
191 NRF_TWIM_SHORT_LASTRX_STARTTX_MASK = TWIM_SHORTS_LASTRX_STARTTX_Msk, ///< Shortcut between LASTRX event and STARTTX task.
192 #endif
193 #if NRF_TWIM_HAS_DMA_TASKS_EVENTS
194 NRF_TWIM_SHORT_RXMATCH0_ENABLERXMATCH1_MASK = TWIM_SHORTS_DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1_Msk, ///< Shortcut between DMA.RX.MATCH0 event and DMA.RX.ENABLEMATCH1 task.
195 NRF_TWIM_SHORT_RXMATCH1_ENABLERXMATCH2_MASK = TWIM_SHORTS_DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2_Msk, ///< Shortcut between DMA.RX.MATCH1 event and DMA.RX.ENABLEMATCH2 task.
196 NRF_TWIM_SHORT_RXMATCH2_ENABLERXMATCH3_MASK = TWIM_SHORTS_DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3_Msk, ///< Shortcut between DMA.RX.MATCH2 event and DMA.RX.ENABLEMATCH0 task.
197 NRF_TWIM_SHORT_RXMATCH3_ENABLERXMATCH0_MASK = TWIM_SHORTS_DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0_Msk, ///< Shortcut between DMA.RX.MATCH3 event and DMA.RX.ENABLEMATCH1 task.
198 NRF_TWIM_SHORT_RXMATCH0_DISABLERXMATCH0_MASK = TWIM_SHORTS_DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0_Msk, ///< Shortcut between DMA.RX.MATCH0 event and DMA.RX.DISABLEMATCH0 task.
199 NRF_TWIM_SHORT_RXMATCH1_DISABLERXMATCH1_MASK = TWIM_SHORTS_DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1_Msk, ///< Shortcut between DMA.RX.MATCH1 event and DMA.RX.DISABLEMATCH1 task.
200 NRF_TWIM_SHORT_RXMATCH2_DISABLERXMATCH2_MASK = TWIM_SHORTS_DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2_Msk, ///< Shortcut between DMA.RX.MATCH2 event and DMA.RX.DISABLEMATCH2 task.
201 NRF_TWIM_SHORT_RXMATCH3_DISABLERXMATCH3_MASK = TWIM_SHORTS_DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3_Msk, ///< Shortcut between DMA.RX.MATCH3 event and DMA.RX.DISABLEMATCH3 task.
202 #endif
203 NRF_TWIM_ALL_SHORTS_MASK =
204 #if NRF_TWIM_HAS_DMA_SHORTS
205 TWIM_SHORTS_LASTTX_DMA_RX_START_Msk |
206 TWIM_SHORTS_LASTRX_DMA_TX_START_Msk |
207 #else
208 TWIM_SHORTS_LASTTX_STARTRX_Msk |
209 TWIM_SHORTS_LASTRX_STARTTX_Msk |
210 #endif
211 #if NRF_TWIM_HAS_DMA_TASKS_EVENTS
212 TWIM_SHORTS_DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1_Msk |
213 TWIM_SHORTS_DMA_RX_MATCH1_DMA_RX_ENABLEMATCH2_Msk |
214 TWIM_SHORTS_DMA_RX_MATCH2_DMA_RX_ENABLEMATCH3_Msk |
215 TWIM_SHORTS_DMA_RX_MATCH3_DMA_RX_ENABLEMATCH0_Msk |
216 TWIM_SHORTS_DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0_Msk |
217 TWIM_SHORTS_DMA_RX_MATCH1_DMA_RX_DISABLEMATCH1_Msk |
218 TWIM_SHORTS_DMA_RX_MATCH2_DMA_RX_DISABLEMATCH2_Msk |
219 TWIM_SHORTS_DMA_RX_MATCH3_DMA_RX_DISABLEMATCH3_Msk |
220 #endif
221 TWIM_SHORTS_LASTTX_SUSPEND_Msk |
222 TWIM_SHORTS_LASTTX_STOP_Msk |
223 TWIM_SHORTS_LASTRX_STOP_Msk ///< All TWIM shortcuts.
224 } nrf_twim_short_mask_t;
225
226 /** @brief TWIM interrupts. */
227 typedef enum
228 {
229 NRF_TWIM_INT_STOPPED_MASK = TWIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
230 NRF_TWIM_INT_ERROR_MASK = TWIM_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event.
231 NRF_TWIM_INT_SUSPENDED_MASK = TWIM_INTENSET_SUSPENDED_Msk, ///< Interrupt on SUSPENDED event.
232 #if NRF_TWIM_HAS_DMA_TASKS_EVENTS
233 NRF_TWIM_INT_RXSTARTED_MASK = TWIM_INTENSET_DMARXREADY_Msk, ///< Interrupt on RXSTARTED event.
234 NRF_TWIM_INT_TXSTARTED_MASK = TWIM_INTENSET_DMATXREADY_Msk, ///< Interrupt on TXSTARTED event.
235 NRF_TWIM_INT_ENDRX_MASK = TWIM_INTENSET_DMARXEND_Msk, ///< Interrupt on DMA.RX.END event.
236 NRF_TWIM_INT_RXREADY_MASK = TWIM_INTENSET_DMARXREADY_Msk, ///< Interrupt on DMA.RX.READY event.
237 NRF_TWIM_INT_RXBUSERROR_MASK = TWIM_INTENSET_DMARXBUSERROR_Msk, ///< Interrupt on DMA.RX.BUSERROR event.
238 NRF_TWIM_INT_RXMATCH0_MASK = TWIM_INTENSET_DMARXMATCH0_Msk, ///< Interrupt on DMA.RX.MATCH0 event.
239 NRF_TWIM_INT_RXMATCH1_MASK = TWIM_INTENSET_DMARXMATCH1_Msk, ///< Interrupt on DMA.RX.MATCH1 event.
240 NRF_TWIM_INT_RXMATCH2_MASK = TWIM_INTENSET_DMARXMATCH2_Msk, ///< Interrupt on DMA.RX.MATCH2 event.
241 NRF_TWIM_INT_RXMATCH3_MASK = TWIM_INTENSET_DMARXMATCH3_Msk, ///< Interrupt on DMA.RX.MATCH3 event.
242 NRF_TWIM_INT_ENDTX_MASK = TWIM_INTENSET_DMATXEND_Msk, ///< Interrupt on DMA.TX.END event.
243 NRF_TWIM_INT_TXREADY_MASK = TWIM_INTENSET_DMATXREADY_Msk, ///< Interrupt on DMA.TX.READY event.
244 NRF_TWIM_INT_TXBUSERROR_MASK = TWIM_INTENSET_DMATXBUSERROR_Msk, ///< Interrupt on DMA.TX.BUSERROR event.
245 #else
246 NRF_TWIM_INT_RXSTARTED_MASK = TWIM_INTENSET_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event.
247 NRF_TWIM_INT_TXSTARTED_MASK = TWIM_INTENSET_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event.
248 #endif
249 NRF_TWIM_INT_LASTRX_MASK = TWIM_INTENSET_LASTRX_Msk, ///< Interrupt on LASTRX event.
250 NRF_TWIM_INT_LASTTX_MASK = TWIM_INTENSET_LASTTX_Msk, ///< Interrupt on LASTTX event.
251 NRF_TWIM_ALL_INTS_MASK = NRF_TWIM_INT_STOPPED_MASK |
252 NRF_TWIM_INT_ERROR_MASK |
253 NRF_TWIM_INT_SUSPENDED_MASK |
254 NRF_TWIM_INT_RXSTARTED_MASK |
255 NRF_TWIM_INT_TXSTARTED_MASK |
256 #if NRF_TWIM_HAS_DMA_TASKS_EVENTS
257 NRF_TWIM_INT_ENDRX_MASK |
258 NRF_TWIM_INT_RXREADY_MASK |
259 NRF_TWIM_INT_RXBUSERROR_MASK |
260 NRF_TWIM_INT_RXMATCH0_MASK |
261 NRF_TWIM_INT_RXMATCH1_MASK |
262 NRF_TWIM_INT_RXMATCH2_MASK |
263 NRF_TWIM_INT_RXMATCH3_MASK |
264 NRF_TWIM_INT_ENDTX_MASK |
265 NRF_TWIM_INT_TXREADY_MASK |
266 NRF_TWIM_INT_TXBUSERROR_MASK |
267 #endif
268 NRF_TWIM_INT_LASTRX_MASK |
269 NRF_TWIM_INT_LASTTX_MASK ///< All TWIM interrupts.
270 } nrf_twim_int_mask_t;
271
272 /** @brief TWIM master clock frequency. */
273 typedef enum
274 {
275 NRF_TWIM_FREQ_100K = TWIM_FREQUENCY_FREQUENCY_K100, ///< 100 kbps.
276 NRF_TWIM_FREQ_250K = TWIM_FREQUENCY_FREQUENCY_K250, ///< 250 kbps.
277 NRF_TWIM_FREQ_400K = TWIM_FREQUENCY_FREQUENCY_K400, ///< 400 kbps.
278 #if NRF_TWIM_HAS_1000_KHZ_FREQ
279 NRF_TWIM_FREQ_1000K = TWIM_FREQUENCY_FREQUENCY_K1000 ///< 1000 kbps.
280 #endif
281 } nrf_twim_frequency_t;
282
283 /** @brief TWIM error source. */
284 typedef enum
285 {
286 NRF_TWIM_ERROR_ADDRESS_NACK = TWIM_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address.
287 NRF_TWIM_ERROR_DATA_NACK = TWIM_ERRORSRC_DNACK_Msk, ///< NACK received after sending a data byte.
288 NRF_TWIM_ERROR_OVERRUN = TWIM_ERRORSRC_OVERRUN_Msk ///< Overrun error.
289 /**< A new byte was received before the previous byte was
290 * handled by peripheral. (previous data is lost). */
291 } nrf_twim_error_t;
292
293
294 /**
295 * @brief Function for activating the specified TWIM task.
296 *
297 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
298 * @param[in] task Task to be activated.
299 */
300 NRF_STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
301 nrf_twim_task_t task);
302
303 /**
304 * @brief Function for getting the address of the specified TWIM task register.
305 *
306 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
307 * @param[in] task The specified task.
308 *
309 * @return Address of the specified task register.
310 */
311 NRF_STATIC_INLINE uint32_t nrf_twim_task_address_get(NRF_TWIM_Type const * p_reg,
312 nrf_twim_task_t task);
313
314 /**
315 * @brief Function for clearing the specified TWIM event.
316 *
317 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
318 * @param[in] event Event to clear.
319 */
320 NRF_STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
321 nrf_twim_event_t event);
322
323 /**
324 * @brief Function for retrieving the state of the TWIM event.
325 *
326 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
327 * @param[in] event Event to be checked.
328 *
329 * @retval true The event has been generated.
330 * @retval false The event has not been generated.
331 */
332 NRF_STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type const * p_reg,
333 nrf_twim_event_t event);
334
335 /**
336 * @brief Function for getting the address of the specified TWIM event register.
337 *
338 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
339 * @param[in] event The specified event.
340 *
341 * @return Address of the specified event register.
342 */
343 NRF_STATIC_INLINE uint32_t nrf_twim_event_address_get(NRF_TWIM_Type const * p_reg,
344 nrf_twim_event_t event);
345
346 /**
347 * @brief Function for enabling the specified shortcuts.
348 *
349 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
350 * @param[in] mask Shortcuts to be enabled.
351 */
352 NRF_STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
353 uint32_t mask);
354
355 /**
356 * @brief Function for disabling the specified shortcuts.
357 *
358 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
359 * @param[in] mask Shortcuts to be disabled.
360 */
361 NRF_STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
362 uint32_t mask);
363
364 /**
365 * @brief Function for enabling the specified interrupts.
366 *
367 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
368 * @param[in] mask Mask of interrupts to be enabled.
369 * Use @ref nrf_twim_int_mask_t values for bit masking.
370 */
371 NRF_STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
372 uint32_t mask);
373
374 /**
375 * @brief Function for disabling the specified interrupts.
376 *
377 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
378 * @param[in] mask Mask of interrupts to be disabled.
379 * Use @ref nrf_twim_int_mask_t values for bit masking.
380 */
381 NRF_STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
382 uint32_t mask);
383
384 /**
385 * @brief Function for checking if the specified interrupts are enabled.
386 *
387 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
388 * @param[in] mask Mask of interrupts to be checked.
389 * Use @ref nrf_twim_int_mask_t values for bit masking.
390 *
391 * @return Mask of enabled interrupts.
392 */
393 NRF_STATIC_INLINE uint32_t nrf_twim_int_enable_check(NRF_TWIM_Type const * p_reg, uint32_t mask);
394
395 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
396 /**
397 * @brief Function for setting the subscribe configuration for a given
398 * TWIM task.
399 *
400 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
401 * @param[in] task Task for which to set the configuration.
402 * @param[in] channel Channel through which to subscribe events.
403 */
404 NRF_STATIC_INLINE void nrf_twim_subscribe_set(NRF_TWIM_Type * p_reg,
405 nrf_twim_task_t task,
406 uint8_t channel);
407
408 /**
409 * @brief Function for clearing the subscribe configuration for a given
410 * TWIM task.
411 *
412 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
413 * @param[in] task Task for which to clear the configuration.
414 */
415 NRF_STATIC_INLINE void nrf_twim_subscribe_clear(NRF_TWIM_Type * p_reg,
416 nrf_twim_task_t task);
417
418 /**
419 * @brief Function for setting the publish configuration for a given
420 * TWIM event.
421 *
422 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
423 * @param[in] event Event for which to set the configuration.
424 * @param[in] channel Channel through which to publish the event.
425 */
426 NRF_STATIC_INLINE void nrf_twim_publish_set(NRF_TWIM_Type * p_reg,
427 nrf_twim_event_t event,
428 uint8_t channel);
429
430 /**
431 * @brief Function for clearing the publish configuration for a given
432 * TWIM event.
433 *
434 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
435 * @param[in] event Event for which to clear the configuration.
436 */
437 NRF_STATIC_INLINE void nrf_twim_publish_clear(NRF_TWIM_Type * p_reg,
438 nrf_twim_event_t event);
439 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
440
441 /**
442 * @brief Function for enabling the TWIM peripheral.
443 *
444 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
445 */
446 NRF_STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg);
447
448 /**
449 * @brief Function for disabling the TWIM peripheral.
450 *
451 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
452 */
453 NRF_STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg);
454
455 /**
456 * @brief Function for configuring TWI pins.
457 *
458 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
459 * @param[in] scl_pin SCL pin number.
460 * @param[in] sda_pin SDA pin number.
461 */
462 NRF_STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg,
463 uint32_t scl_pin,
464 uint32_t sda_pin);
465
466 /**
467 * @brief Function for retrieving the SCL pin selection.
468 *
469 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
470 *
471 * @return SCL pin selection.
472 */
473 NRF_STATIC_INLINE uint32_t nrf_twim_scl_pin_get(NRF_TWIM_Type const * p_reg);
474
475 /**
476 * @brief Function for retrieving the SDA pin selection.
477 *
478 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
479 *
480 * @return SDA pin selection.
481 */
482 NRF_STATIC_INLINE uint32_t nrf_twim_sda_pin_get(NRF_TWIM_Type const * p_reg);
483
484 /**
485 * @brief Function for setting the TWI master clock frequency.
486 *
487 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
488 * @param[in] frequency TWI frequency.
489 */
490 NRF_STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
491 nrf_twim_frequency_t frequency);
492
493 /**
494 * @brief Function for checking the TWI error source.
495 *
496 * The error flags are cleared after reading.
497 *
498 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
499 *
500 * @return Mask with error source flags.
501 */
502 NRF_STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg);
503
504 /**
505 * @brief Function for setting the address to be used in TWI transfers.
506 *
507 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
508 * @param[in] address Address to be used in transfers.
509 */
510 NRF_STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg,
511 uint8_t address);
512
513 /**
514 * @brief Function for getting the address to be used in TWI transfers.
515 *
516 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
517 *
518 * @return Address to be used in TWI transfers.
519 */
520 NRF_STATIC_INLINE uint8_t nrf_twim_address_get(NRF_TWIM_Type const * p_reg);
521
522 /**
523 * @brief Function for setting the transmit buffer.
524 *
525 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
526 * @param[in] p_buffer Pointer to the buffer with data to send.
527 * @param[in] length Maximum number of data bytes to transmit.
528 */
529 NRF_STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
530 uint8_t const * p_buffer,
531 size_t length);
532
533 /**
534 * @brief Function for setting the receive buffer.
535 *
536 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
537 * @param[in] p_buffer Pointer to the buffer for received data.
538 * @param[in] length Maximum number of data bytes to receive.
539 */
540 NRF_STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
541 uint8_t * p_buffer,
542 size_t length);
543
544 /**
545 * @brief Function for setting the specified shortcuts.
546 *
547 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
548 * @param[in] mask Shortcuts to be set.
549 */
550 NRF_STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
551 uint32_t mask);
552
553 /**
554 * @brief Function for getting the shortcut setting.
555 *
556 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
557 *
558 * @return Current shortcut configuration.
559 */
560 NRF_STATIC_INLINE uint32_t nrf_twim_shorts_get(NRF_TWIM_Type const * p_reg);
561
562 /**
563 * @brief Function for getting the amount of transmitted bytes.
564 *
565 * @note In case of NACK error, includes the NACK'ed byte.
566 * @note Number of bytes are updated after the END event and each MATCH event.
567 *
568 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
569 *
570 * @return Amount of transmitted bytes.
571 */
572 NRF_STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type const * p_reg);
573
574 /**
575 * @brief Function for getting the amount of received bytes in the last transaction.
576 *
577 * @note In case of NACK error, includes the NACK'ed byte.
578 * @note Number of bytes are updated after the END event and each MATCH event.
579 *
580 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
581 *
582 * @return Amount of received bytes.
583 */
584 NRF_STATIC_INLINE size_t nrf_twim_rxd_amount_get(NRF_TWIM_Type const * p_reg);
585
586 #if NRF_TWIM_HAS_DMA_CURRENTAMOUNT_REG
587 /**
588 * @brief Function for getting the amount of transmitted bytes in the current transaction.
589 *
590 * @note Number of bytes is continuously updated during transmission.
591 *
592 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
593 *
594 * @return Amount of transmitted bytes.
595 */
596 NRF_STATIC_INLINE size_t nrf_twim_txd_curr_amount_get(NRF_TWIM_Type const * p_reg);
597
598 /**
599 * @brief Function for getting the amount of received bytes in the current transaction.
600 *
601 * @note Number of bytes is continuously updated during reception.
602 *
603 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
604 *
605 * @return Amount of received bytes.
606 */
607 NRF_STATIC_INLINE size_t nrf_twim_rxd_curr_amount_get(NRF_TWIM_Type const * p_reg);
608 #endif
609
610 #if NRF_TWIM_HAS_ARRAY_LIST
611 /**
612 * @brief Function for enabling the TX list feature.
613 *
614 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
615 */
616 NRF_STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg);
617
618 /**
619 * @brief Function for disabling the TX list feature.
620 *
621 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
622 */
623 NRF_STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg);
624
625 /**
626 * @brief Function for enabling the RX list feature.
627 *
628 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
629 */
630 NRF_STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg);
631
632 /**
633 * @brief Function for disabling the RX list feature.
634 *
635 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
636 */
637 NRF_STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg);
638 #endif
639
640 #if NRF_TWIM_HAS_DMA_REG
641 /**
642 * @brief Function for enabling individual pattern match filters.
643 *
644 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
645 * @param[in] index Index of pattern match filter.
646 * @param[in] enable True if pattern match filter is to be enabled, false otherwise.
647 */
648 NRF_STATIC_INLINE void nrf_twim_rx_pattern_match_enable_set(NRF_TWIM_Type * p_reg,
649 uint8_t index,
650 bool enable);
651
652 /**
653 * @brief Function for checking if the specified pattern match filter is enabled.
654 *
655 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
656 * @param[in] index Index of pattern match filter.
657 *
658 * @retval true Pattern match filter is enabled.
659 * @retval false Pattern match filter is disabled.
660 */
661 NRF_STATIC_INLINE bool nrf_twim_rx_pattern_match_enable_check(NRF_TWIM_Type const * p_reg,
662 uint8_t index);
663
664 /**
665 * @brief Function for enabling one-shot operation for the specified match filter.
666 *
667 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
668 * @param[in] index Index of pattern match filter.
669 */
670 NRF_STATIC_INLINE void nrf_twim_rx_pattern_match_one_shot_enable(NRF_TWIM_Type * p_reg,
671 uint8_t index);
672
673 /**
674 * @brief Function for disabling one-shot operation for the specified match filter.
675 *
676 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
677 * @param[in] index Index of pattern match filter.
678 */
679 NRF_STATIC_INLINE void nrf_twim_rx_pattern_match_one_shot_disable(NRF_TWIM_Type * p_reg,
680 uint8_t index);
681
682 /**
683 * @brief Function for checking if specified pattern match filter is configured as one-shot.
684 *
685 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
686 * @param[in] index Index of pattern match filter.
687 *
688 * @retval true Pattern match filter is configured as one-shot.
689 * @retval false Pattern match filter is configured as continuous.
690 */
691 NRF_STATIC_INLINE bool nrf_twim_rx_pattern_match_one_shot_check(NRF_TWIM_Type const * p_reg,
692 uint8_t index);
693
694 /**
695 * @brief Function for setting the pattern to be looked for by the specified match filter.
696 *
697 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
698 * @param[in] index Index of pattern match filter.
699 * @param[in] pattern Pattern to be looked for.
700 * Match will trigger the corresponding event, if enabled.
701 */
702 NRF_STATIC_INLINE void nrf_twim_rx_pattern_match_candidate_set(NRF_TWIM_Type * p_reg,
703 uint8_t index,
704 uint32_t pattern);
705
706 /**
707 * @brief Function for getting the pattern that the specified match filter is looking for.
708 *
709 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
710 * @param[in] index Index of pattern match filter.
711 *
712 * @return Pattern that the specified match filter is looking for.
713 */
714 NRF_STATIC_INLINE uint32_t nrf_twim_rx_pattern_match_candidate_get(NRF_TWIM_Type const * p_reg,
715 uint8_t index);
716 #endif // NRF_TWIM_HAS_DMA_REG
717
718 #if NRF_TWIM_HAS_BUS_ERROR_EVENTS
719 /**
720 * @brief Function for enabling RX transaction termination on the detection of a BUSERROR event.
721 *
722 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
723 * @param[in] enable True if the RX transaction termination is to be enabled, false otherwise.
724 */
725 NRF_STATIC_INLINE void nrf_twim_rx_terminate_on_bus_error_enable_set(NRF_TWIM_Type * p_reg,
726 bool enable);
727
728 /**
729 * @brief Function for checking if the RX transaction termination on the detection
730 * of a BUSERROR event is enabled.
731 *
732 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
733 *
734 * @retval true Transaction termination on BUSERROR event is enabled.
735 * @retval false Transaction termination on BUSERROR event is disabled.
736 */
737 NRF_STATIC_INLINE bool nrf_twim_rx_terminate_on_bus_error_check(NRF_TWIM_Type const * p_reg);
738
739 /**
740 * @brief Function for enabling TX transaction termination on the detection of a BUSERROR event.
741 *
742 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
743 * @param[in] enable True if the TX transaction termination is to be enabled, false otherwise.
744 */
745 NRF_STATIC_INLINE void nrf_twim_tx_terminate_on_bus_error_enable_set(NRF_TWIM_Type * p_reg,
746 bool enable);
747
748 /**
749 * @brief Function for checking if the TX transaction termination on the detection
750 * of a BUSERROR event is enabled.
751 *
752 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
753 *
754 * @retval true Transaction termination on BUSERROR event is enabled.
755 * @retval false Transaction termination on BUSERROR event is disabled.
756 */
757 NRF_STATIC_INLINE bool nrf_twim_tx_terminate_on_bus_error_check(NRF_TWIM_Type const * p_reg);
758 #endif
759
760 #ifndef NRF_DECLARE_ONLY
761
nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,nrf_twim_task_t task)762 NRF_STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
763 nrf_twim_task_t task)
764 {
765 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
766 }
767
nrf_twim_task_address_get(NRF_TWIM_Type const * p_reg,nrf_twim_task_t task)768 NRF_STATIC_INLINE uint32_t nrf_twim_task_address_get(NRF_TWIM_Type const * p_reg,
769 nrf_twim_task_t task)
770 {
771 return nrf_task_event_address_get(p_reg, task);
772 }
773
nrf_twim_event_clear(NRF_TWIM_Type * p_reg,nrf_twim_event_t event)774 NRF_STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
775 nrf_twim_event_t event)
776 {
777 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
778 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
779 }
780
nrf_twim_event_check(NRF_TWIM_Type const * p_reg,nrf_twim_event_t event)781 NRF_STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type const * p_reg,
782 nrf_twim_event_t event)
783 {
784 return nrf_event_check(p_reg, event);
785 }
786
nrf_twim_event_address_get(NRF_TWIM_Type const * p_reg,nrf_twim_event_t event)787 NRF_STATIC_INLINE uint32_t nrf_twim_event_address_get(NRF_TWIM_Type const * p_reg,
788 nrf_twim_event_t event)
789 {
790 return nrf_task_event_address_get(p_reg, event);
791 }
792
nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,uint32_t mask)793 NRF_STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
794 uint32_t mask)
795 {
796 p_reg->SHORTS |= mask;
797 }
798
nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,uint32_t mask)799 NRF_STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
800 uint32_t mask)
801 {
802 p_reg->SHORTS &= ~(mask);
803 }
804
nrf_twim_int_enable(NRF_TWIM_Type * p_reg,uint32_t mask)805 NRF_STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
806 uint32_t mask)
807 {
808 p_reg->INTENSET = mask;
809 }
810
nrf_twim_int_disable(NRF_TWIM_Type * p_reg,uint32_t mask)811 NRF_STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
812 uint32_t mask)
813 {
814 p_reg->INTENCLR = mask;
815 }
816
nrf_twim_int_enable_check(NRF_TWIM_Type const * p_reg,uint32_t mask)817 NRF_STATIC_INLINE uint32_t nrf_twim_int_enable_check(NRF_TWIM_Type const * p_reg, uint32_t mask)
818 {
819 return p_reg->INTENSET & mask;
820 }
821
822 #if defined(DPPI_PRESENT)
nrf_twim_subscribe_set(NRF_TWIM_Type * p_reg,nrf_twim_task_t task,uint8_t channel)823 NRF_STATIC_INLINE void nrf_twim_subscribe_set(NRF_TWIM_Type * p_reg,
824 nrf_twim_task_t task,
825 uint8_t channel)
826 {
827 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
828 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
829 }
830
nrf_twim_subscribe_clear(NRF_TWIM_Type * p_reg,nrf_twim_task_t task)831 NRF_STATIC_INLINE void nrf_twim_subscribe_clear(NRF_TWIM_Type * p_reg,
832 nrf_twim_task_t task)
833 {
834 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
835 }
836
nrf_twim_publish_set(NRF_TWIM_Type * p_reg,nrf_twim_event_t event,uint8_t channel)837 NRF_STATIC_INLINE void nrf_twim_publish_set(NRF_TWIM_Type * p_reg,
838 nrf_twim_event_t event,
839 uint8_t channel)
840 {
841 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
842 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
843 }
844
nrf_twim_publish_clear(NRF_TWIM_Type * p_reg,nrf_twim_event_t event)845 NRF_STATIC_INLINE void nrf_twim_publish_clear(NRF_TWIM_Type * p_reg,
846 nrf_twim_event_t event)
847 {
848 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
849 }
850 #endif // defined(DPPI_PRESENT)
851
nrf_twim_enable(NRF_TWIM_Type * p_reg)852 NRF_STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg)
853 {
854 p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos);
855 }
856
nrf_twim_disable(NRF_TWIM_Type * p_reg)857 NRF_STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg)
858 {
859 p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos);
860 }
861
nrf_twim_pins_set(NRF_TWIM_Type * p_reg,uint32_t scl_pin,uint32_t sda_pin)862 NRF_STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg,
863 uint32_t scl_pin,
864 uint32_t sda_pin)
865 {
866 p_reg->PSEL.SCL = scl_pin;
867 p_reg->PSEL.SDA = sda_pin;
868 }
869
nrf_twim_scl_pin_get(NRF_TWIM_Type const * p_reg)870 NRF_STATIC_INLINE uint32_t nrf_twim_scl_pin_get(NRF_TWIM_Type const * p_reg)
871 {
872 return p_reg->PSEL.SCL;
873 }
874
nrf_twim_sda_pin_get(NRF_TWIM_Type const * p_reg)875 NRF_STATIC_INLINE uint32_t nrf_twim_sda_pin_get(NRF_TWIM_Type const * p_reg)
876 {
877 return p_reg->PSEL.SDA;
878 }
879
nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,nrf_twim_frequency_t frequency)880 NRF_STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
881 nrf_twim_frequency_t frequency)
882 {
883 p_reg->FREQUENCY = frequency;
884 }
885
nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg)886 NRF_STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg)
887 {
888 uint32_t error_source = p_reg->ERRORSRC;
889
890 // [error flags are cleared by writing '1' on their position]
891 p_reg->ERRORSRC = error_source;
892
893 return error_source;
894 }
895
nrf_twim_address_set(NRF_TWIM_Type * p_reg,uint8_t address)896 NRF_STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg,
897 uint8_t address)
898 {
899 p_reg->ADDRESS = address;
900 }
901
nrf_twim_address_get(NRF_TWIM_Type const * p_reg)902 NRF_STATIC_INLINE uint8_t nrf_twim_address_get(NRF_TWIM_Type const * p_reg)
903 {
904 return (uint8_t)(p_reg->ADDRESS & TWIM_ADDRESS_ADDRESS_Msk);
905 }
906
nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,uint8_t const * p_buffer,size_t length)907 NRF_STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
908 uint8_t const * p_buffer,
909 size_t length)
910 {
911 #if NRF_TWIM_HAS_DMA_REG
912 p_reg->DMA.TX.PTR = (uint32_t)p_buffer;
913 p_reg->DMA.TX.MAXCNT = length;
914 #else
915 p_reg->TXD.PTR = (uint32_t)p_buffer;
916 p_reg->TXD.MAXCNT = length;
917 #endif
918 }
919
nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,uint8_t * p_buffer,size_t length)920 NRF_STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
921 uint8_t * p_buffer,
922 size_t length)
923 {
924 #if NRF_TWIM_HAS_DMA_REG
925 p_reg->DMA.RX.PTR = (uint32_t)p_buffer;
926 p_reg->DMA.RX.MAXCNT = length;
927 #else
928 p_reg->RXD.PTR = (uint32_t)p_buffer;
929 p_reg->RXD.MAXCNT = length;
930 #endif
931 }
932
nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,uint32_t mask)933 NRF_STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
934 uint32_t mask)
935 {
936 p_reg->SHORTS = mask;
937 }
938
nrf_twim_shorts_get(NRF_TWIM_Type const * p_reg)939 NRF_STATIC_INLINE uint32_t nrf_twim_shorts_get(NRF_TWIM_Type const * p_reg)
940 {
941 return p_reg->SHORTS;
942 }
943
nrf_twim_txd_amount_get(NRF_TWIM_Type const * p_reg)944 NRF_STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type const * p_reg)
945 {
946 #if NRF_TWIM_HAS_DMA_REG
947 return p_reg->DMA.TX.AMOUNT;
948 #else
949 return p_reg->TXD.AMOUNT;
950 #endif
951 }
952
nrf_twim_rxd_amount_get(NRF_TWIM_Type const * p_reg)953 NRF_STATIC_INLINE size_t nrf_twim_rxd_amount_get(NRF_TWIM_Type const * p_reg)
954 {
955 #if NRF_TWIM_HAS_DMA_REG
956 return p_reg->DMA.RX.AMOUNT;
957 #else
958 return p_reg->RXD.AMOUNT;
959 #endif
960 }
961
962 #if NRF_TWIM_HAS_DMA_CURRENTAMOUNT_REG
nrf_twim_txd_curr_amount_get(NRF_TWIM_Type const * p_reg)963 NRF_STATIC_INLINE size_t nrf_twim_txd_curr_amount_get(NRF_TWIM_Type const * p_reg)
964 {
965 return p_reg->DMA.TX.CURRENTAMOUNT;
966 }
967
nrf_twim_rxd_curr_amount_get(NRF_TWIM_Type const * p_reg)968 NRF_STATIC_INLINE size_t nrf_twim_rxd_curr_amount_get(NRF_TWIM_Type const * p_reg)
969 {
970 return p_reg->DMA.RX.CURRENTAMOUNT;
971 }
972 #endif
973
974 #if NRF_TWIM_HAS_ARRAY_LIST
nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg)975 NRF_STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg)
976 {
977 #if NRF_TWIM_HAS_DMA_REG
978 p_reg->DMA.TX.LIST = TWIM_DMA_TX_LIST_TYPE_ArrayList << TWIM_DMA_TX_LIST_TYPE_Pos;
979 #else
980 p_reg->TXD.LIST = TWIM_TXD_LIST_LIST_ArrayList << TWIM_TXD_LIST_LIST_Pos;
981 #endif
982 }
983
nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg)984 NRF_STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg)
985 {
986 #if NRF_TWIM_HAS_DMA_REG
987 p_reg->DMA.TX.LIST = TWIM_DMA_TX_LIST_TYPE_Disabled << TWIM_DMA_TX_LIST_TYPE_Pos;
988 #else
989 p_reg->TXD.LIST = TWIM_TXD_LIST_LIST_Disabled << TWIM_TXD_LIST_LIST_Pos;
990 #endif
991 }
992
nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg)993 NRF_STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg)
994 {
995 #if NRF_TWIM_HAS_DMA_REG
996 p_reg->DMA.RX.LIST = TWIM_DMA_RX_LIST_TYPE_ArrayList << TWIM_DMA_RX_LIST_TYPE_Pos;
997 #else
998 p_reg->RXD.LIST = TWIM_RXD_LIST_LIST_ArrayList << TWIM_RXD_LIST_LIST_Pos;
999 #endif
1000 }
1001
nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg)1002 NRF_STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg)
1003 {
1004 #if NRF_TWIM_HAS_DMA_REG
1005 p_reg->DMA.RX.LIST = TWIM_DMA_RX_LIST_TYPE_Disabled << TWIM_DMA_RX_LIST_TYPE_Pos;
1006 #else
1007 p_reg->RXD.LIST = TWIM_RXD_LIST_LIST_Disabled << TWIM_RXD_LIST_LIST_Pos;
1008 #endif
1009 }
1010 #endif
1011
1012 #if NRF_TWIM_HAS_DMA_REG
nrf_twim_rx_pattern_match_enable_set(NRF_TWIM_Type * p_reg,uint8_t index,bool enable)1013 NRF_STATIC_INLINE void nrf_twim_rx_pattern_match_enable_set(NRF_TWIM_Type * p_reg,
1014 uint8_t index,
1015 bool enable)
1016 {
1017 NRFX_ASSERT(index < NRF_TWIM_DMA_RX_PATTERN_MAX_COUNT);
1018 switch (index)
1019 {
1020 case 0:
1021 p_reg->DMA.RX.MATCH.CONFIG = ((p_reg->DMA.RX.MATCH.CONFIG &
1022 ~TWIM_DMA_RX_MATCH_CONFIG_ENABLE0_Msk) |
1023 ((enable ?
1024 TWIM_DMA_RX_MATCH_CONFIG_ENABLE0_Enabled :
1025 TWIM_DMA_RX_MATCH_CONFIG_ENABLE0_Disabled)
1026 << TWIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos));
1027 break;
1028 case 1:
1029 p_reg->DMA.RX.MATCH.CONFIG = ((p_reg->DMA.RX.MATCH.CONFIG &
1030 ~TWIM_DMA_RX_MATCH_CONFIG_ENABLE1_Msk) |
1031 ((enable ?
1032 TWIM_DMA_RX_MATCH_CONFIG_ENABLE1_Enabled :
1033 TWIM_DMA_RX_MATCH_CONFIG_ENABLE1_Disabled)
1034 << TWIM_DMA_RX_MATCH_CONFIG_ENABLE1_Pos));
1035 break;
1036 case 2:
1037 p_reg->DMA.RX.MATCH.CONFIG = ((p_reg->DMA.RX.MATCH.CONFIG &
1038 ~TWIM_DMA_RX_MATCH_CONFIG_ENABLE2_Msk) |
1039 ((enable ?
1040 TWIM_DMA_RX_MATCH_CONFIG_ENABLE2_Enabled :
1041 TWIM_DMA_RX_MATCH_CONFIG_ENABLE2_Disabled)
1042 << TWIM_DMA_RX_MATCH_CONFIG_ENABLE2_Pos));
1043 break;
1044 case 3:
1045 p_reg->DMA.RX.MATCH.CONFIG = ((p_reg->DMA.RX.MATCH.CONFIG &
1046 ~TWIM_DMA_RX_MATCH_CONFIG_ENABLE3_Msk) |
1047 ((enable ?
1048 TWIM_DMA_RX_MATCH_CONFIG_ENABLE3_Enabled :
1049 TWIM_DMA_RX_MATCH_CONFIG_ENABLE3_Disabled)
1050 << TWIM_DMA_RX_MATCH_CONFIG_ENABLE3_Pos));
1051 break;
1052 default:
1053 NRFX_ASSERT(false);
1054 break;
1055 }
1056 }
1057
nrf_twim_rx_pattern_match_enable_check(NRF_TWIM_Type const * p_reg,uint8_t index)1058 NRF_STATIC_INLINE bool nrf_twim_rx_pattern_match_enable_check(NRF_TWIM_Type const * p_reg,
1059 uint8_t index)
1060 {
1061 NRFX_ASSERT(index < NRF_TWIM_DMA_RX_PATTERN_MAX_COUNT);
1062 switch (index)
1063 {
1064 case 0:
1065 return ((p_reg->DMA.RX.MATCH.CONFIG & TWIM_DMA_RX_MATCH_CONFIG_ENABLE0_Msk)
1066 >> TWIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos) ==
1067 TWIM_DMA_RX_MATCH_CONFIG_ENABLE0_Enabled;
1068 case 1:
1069 return ((p_reg->DMA.RX.MATCH.CONFIG & TWIM_DMA_RX_MATCH_CONFIG_ENABLE1_Msk)
1070 >> TWIM_DMA_RX_MATCH_CONFIG_ENABLE1_Pos) ==
1071 TWIM_DMA_RX_MATCH_CONFIG_ENABLE1_Enabled;
1072 case 2:
1073 return ((p_reg->DMA.RX.MATCH.CONFIG & TWIM_DMA_RX_MATCH_CONFIG_ENABLE2_Msk)
1074 >> TWIM_DMA_RX_MATCH_CONFIG_ENABLE2_Pos) ==
1075 TWIM_DMA_RX_MATCH_CONFIG_ENABLE2_Enabled;
1076 case 3:
1077 return ((p_reg->DMA.RX.MATCH.CONFIG & TWIM_DMA_RX_MATCH_CONFIG_ENABLE3_Msk)
1078 >> TWIM_DMA_RX_MATCH_CONFIG_ENABLE3_Pos) ==
1079 TWIM_DMA_RX_MATCH_CONFIG_ENABLE3_Enabled;
1080 default:
1081 NRFX_ASSERT(false);
1082 return 0;
1083 }
1084 }
1085
nrf_twim_rx_pattern_match_one_shot_enable(NRF_TWIM_Type * p_reg,uint8_t index)1086 NRF_STATIC_INLINE void nrf_twim_rx_pattern_match_one_shot_enable(NRF_TWIM_Type * p_reg,
1087 uint8_t index)
1088 {
1089 NRFX_ASSERT(index < NRF_TWIM_DMA_RX_PATTERN_MAX_COUNT);
1090 switch (index)
1091 {
1092 case 0:
1093 p_reg->DMA.RX.MATCH.CONFIG |= TWIM_DMA_RX_MATCH_CONFIG_ONESHOT0_Msk;
1094 break;
1095 case 1:
1096 p_reg->DMA.RX.MATCH.CONFIG |= TWIM_DMA_RX_MATCH_CONFIG_ONESHOT1_Msk;
1097 break;
1098 case 2:
1099 p_reg->DMA.RX.MATCH.CONFIG |= TWIM_DMA_RX_MATCH_CONFIG_ONESHOT2_Msk;
1100 break;
1101 case 3:
1102 p_reg->DMA.RX.MATCH.CONFIG |= TWIM_DMA_RX_MATCH_CONFIG_ONESHOT3_Msk;
1103 break;
1104 default:
1105 NRFX_ASSERT(false);
1106 break;
1107 }
1108 }
1109
nrf_twim_rx_pattern_match_one_shot_disable(NRF_TWIM_Type * p_reg,uint8_t index)1110 NRF_STATIC_INLINE void nrf_twim_rx_pattern_match_one_shot_disable(NRF_TWIM_Type * p_reg,
1111 uint8_t index)
1112 {
1113 NRFX_ASSERT(index < NRF_TWIM_DMA_RX_PATTERN_MAX_COUNT);
1114 switch (index)
1115 {
1116 case 0:
1117 p_reg->DMA.RX.MATCH.CONFIG &= ~(TWIM_DMA_RX_MATCH_CONFIG_ONESHOT0_Msk);
1118 break;
1119 case 1:
1120 p_reg->DMA.RX.MATCH.CONFIG &= ~(TWIM_DMA_RX_MATCH_CONFIG_ONESHOT1_Msk);
1121 break;
1122 case 2:
1123 p_reg->DMA.RX.MATCH.CONFIG &= ~(TWIM_DMA_RX_MATCH_CONFIG_ONESHOT2_Msk);
1124 break;
1125 case 3:
1126 p_reg->DMA.RX.MATCH.CONFIG &= ~(TWIM_DMA_RX_MATCH_CONFIG_ONESHOT3_Msk);
1127 break;
1128 default:
1129 NRFX_ASSERT(false);
1130 break;
1131 }
1132 }
1133
nrf_twim_rx_pattern_match_one_shot_check(NRF_TWIM_Type const * p_reg,uint8_t index)1134 NRF_STATIC_INLINE bool nrf_twim_rx_pattern_match_one_shot_check(NRF_TWIM_Type const * p_reg,
1135 uint8_t index)
1136 {
1137 NRFX_ASSERT(index < NRF_TWIM_DMA_RX_PATTERN_MAX_COUNT);
1138 switch (index)
1139 {
1140 case 0:
1141 return ((p_reg->DMA.RX.MATCH.CONFIG & TWIM_DMA_RX_MATCH_CONFIG_ONESHOT0_Msk)
1142 >> TWIM_DMA_RX_MATCH_CONFIG_ONESHOT0_Pos) ==
1143 TWIM_DMA_RX_MATCH_CONFIG_ONESHOT0_Oneshot;
1144 case 1:
1145 return ((p_reg->DMA.RX.MATCH.CONFIG & TWIM_DMA_RX_MATCH_CONFIG_ONESHOT1_Msk)
1146 >> TWIM_DMA_RX_MATCH_CONFIG_ONESHOT1_Pos) ==
1147 TWIM_DMA_RX_MATCH_CONFIG_ONESHOT1_Oneshot;
1148 case 2:
1149 return ((p_reg->DMA.RX.MATCH.CONFIG & TWIM_DMA_RX_MATCH_CONFIG_ONESHOT2_Msk)
1150 >> TWIM_DMA_RX_MATCH_CONFIG_ONESHOT2_Pos) ==
1151 TWIM_DMA_RX_MATCH_CONFIG_ONESHOT2_Oneshot;
1152 case 3:
1153 return ((p_reg->DMA.RX.MATCH.CONFIG & TWIM_DMA_RX_MATCH_CONFIG_ONESHOT3_Msk)
1154 >> TWIM_DMA_RX_MATCH_CONFIG_ONESHOT3_Pos) ==
1155 TWIM_DMA_RX_MATCH_CONFIG_ONESHOT3_Oneshot;
1156 default:
1157 NRFX_ASSERT(false);
1158 return 0;
1159 }
1160 }
1161
nrf_twim_rx_pattern_match_candidate_set(NRF_TWIM_Type * p_reg,uint8_t index,uint32_t pattern)1162 NRF_STATIC_INLINE void nrf_twim_rx_pattern_match_candidate_set(NRF_TWIM_Type * p_reg,
1163 uint8_t index,
1164 uint32_t pattern)
1165 {
1166 NRFX_ASSERT(index < NRF_TWIM_DMA_RX_PATTERN_MAX_COUNT);
1167 p_reg->DMA.RX.MATCH.CANDIDATE[index] = pattern;
1168 }
1169
nrf_twim_rx_pattern_match_candidate_get(NRF_TWIM_Type const * p_reg,uint8_t index)1170 NRF_STATIC_INLINE uint32_t nrf_twim_rx_pattern_match_candidate_get(NRF_TWIM_Type const * p_reg,
1171 uint8_t index)
1172 {
1173 NRFX_ASSERT(index < NRF_TWIM_DMA_RX_PATTERN_MAX_COUNT);
1174 return p_reg->DMA.RX.MATCH.CANDIDATE[index];
1175 }
1176 #endif // NRF_TWIM_HAS_DMA_REG
1177
1178 #if NRF_TWIM_HAS_BUS_ERROR_EVENTS
nrf_twim_rx_terminate_on_bus_error_enable_set(NRF_TWIM_Type * p_reg,bool enable)1179 NRF_STATIC_INLINE void nrf_twim_rx_terminate_on_bus_error_enable_set(NRF_TWIM_Type * p_reg,
1180 bool enable)
1181 {
1182 p_reg->DMA.RX.TERMINATEONBUSERROR = (enable ? TWIM_DMA_RX_TERMINATEONBUSERROR_ENABLE_Enabled :
1183 TWIM_DMA_RX_TERMINATEONBUSERROR_ENABLE_Disabled)
1184 << TWIM_DMA_RX_TERMINATEONBUSERROR_ENABLE_Pos;
1185 }
1186
nrf_twim_rx_terminate_on_bus_error_check(NRF_TWIM_Type const * p_reg)1187 NRF_STATIC_INLINE bool nrf_twim_rx_terminate_on_bus_error_check(NRF_TWIM_Type const * p_reg)
1188 {
1189 return ((p_reg->DMA.RX.TERMINATEONBUSERROR & TWIM_DMA_RX_TERMINATEONBUSERROR_ENABLE_Msk)
1190 >> TWIM_DMA_RX_TERMINATEONBUSERROR_ENABLE_Pos) ==
1191 TWIM_DMA_RX_TERMINATEONBUSERROR_ENABLE_Enabled;
1192 }
1193
nrf_twim_tx_terminate_on_bus_error_enable_set(NRF_TWIM_Type * p_reg,bool enable)1194 NRF_STATIC_INLINE void nrf_twim_tx_terminate_on_bus_error_enable_set(NRF_TWIM_Type * p_reg,
1195 bool enable)
1196 {
1197 p_reg->DMA.TX.TERMINATEONBUSERROR = (enable ? TWIM_DMA_TX_TERMINATEONBUSERROR_ENABLE_Enabled :
1198 TWIM_DMA_TX_TERMINATEONBUSERROR_ENABLE_Disabled)
1199 << TWIM_DMA_TX_TERMINATEONBUSERROR_ENABLE_Pos;
1200 }
1201
nrf_twim_tx_terminate_on_bus_error_check(NRF_TWIM_Type const * p_reg)1202 NRF_STATIC_INLINE bool nrf_twim_tx_terminate_on_bus_error_check(NRF_TWIM_Type const * p_reg)
1203 {
1204 return ((p_reg->DMA.TX.TERMINATEONBUSERROR & TWIM_DMA_TX_TERMINATEONBUSERROR_ENABLE_Msk)
1205 >> TWIM_DMA_TX_TERMINATEONBUSERROR_ENABLE_Pos) ==
1206 TWIM_DMA_TX_TERMINATEONBUSERROR_ENABLE_Enabled;
1207 }
1208 #endif // NRF_TWIM_HAS_BUS_ERROR_EVENTS
1209
1210 #endif // NRF_DECLARE_ONLY
1211
1212 /** @} */
1213
1214 #ifdef __cplusplus
1215 }
1216 #endif
1217
1218 #endif // NRF_TWIM_H__
1219
