1 /*
2 * Copyright (c) 2014 - 2024, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_TIMER_H__
35 #define NRF_TIMER_H__
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 /**
44 * @defgroup nrf_timer_hal TIMER HAL
45 * @{
46 * @ingroup nrf_timer
47 * @brief Hardware access layer for managing the TIMER peripheral.
48 */
49
50 /**
51 * @brief Macro getting pointer to the structure of registers of the TIMER peripheral.
52 *
53 * @param[in] idx TIMER instance index.
54 *
55 * @return Pointer to the structure of registers of the TIMER peripheral.
56 */
57 #define NRF_TIMER_INST_GET(idx) NRFX_CONCAT(NRF_, TIMER, idx)
58
59 #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__)
60 /** @brief Symbol indicating whether timer has capture/compare channel 4. */
61 #define NRF_TIMER_HAS_CC4 1
62 #else
63 #define NRF_TIMER_HAS_CC4 0
64 #endif
65
66 #if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
67 /** @brief Symbol indicating whether timer has capture/compare channel 5. */
68 #define NRF_TIMER_HAS_CC5 1
69 #else
70 #define NRF_TIMER_HAS_CC5 0
71 #endif
72
73 #if defined(TIMER_INTENSET_COMPARE6_Msk) || defined(__NRFX_DOXYGEN__)
74 /** @brief Symbol indicating whether timer has capture/compare channel 6. */
75 #define NRF_TIMER_HAS_CC6 1
76 #else
77 #define NRF_TIMER_HAS_CC6 0
78 #endif
79
80 #if defined(TIMER_INTENSET_COMPARE7_Msk) || defined(__NRFX_DOXYGEN__)
81 /** @brief Symbol indicating whether timer has capture/compare channel 7. */
82 #define NRF_TIMER_HAS_CC7 1
83 #else
84 #define NRF_TIMER_HAS_CC7 0
85 #endif
86
87 #if defined(TIMER_MODE_MODE_LowPowerCounter) || defined(__NRFX_DOXYGEN__)
88 /** @brief Symbol indicating whether timer supports low power mode. */
89 #define NRF_TIMER_HAS_LOW_POWER_MODE 1
90 #else
91 #define NRF_TIMER_HAS_LOW_POWER_MODE 0
92 #endif
93
94 #if defined(TIMER_ONESHOTEN_ONESHOTEN_Msk) || defined(__NRFX_DOXYGEN__)
95 /** @brief Symbol indicating whether timer supports one-shot operation. */
96 #define NRF_TIMER_HAS_ONE_SHOT 1
97 #else
98 #define NRF_TIMER_HAS_ONE_SHOT 0
99 #endif
100
101 /** @brief Base frequency value 320 MHz for TIMER. */
102 #define NRF_TIMER_BASE_FREQUENCY_320MHZ (NRFX_MHZ_TO_HZ(320UL))
103 /** @brief Base frequency value 128 MHz for TIMER. */
104 #define NRF_TIMER_BASE_FREQUENCY_128MHZ (NRFX_MHZ_TO_HZ(128UL))
105 /** @brief Base frequency value 64 MHz for TIMER. */
106 #define NRF_TIMER_BASE_FREQUENCY_64MHZ (NRFX_MHZ_TO_HZ(64UL))
107 /** @brief Base frequency value 32 MHz for TIMER. */
108 #define NRF_TIMER_BASE_FREQUENCY_32MHZ (NRFX_MHZ_TO_HZ(32UL))
109 /** @brief Base frequency value 16 MHz for TIMER. */
110 #define NRF_TIMER_BASE_FREQUENCY_16MHZ (NRFX_MHZ_TO_HZ(16UL))
111
112 #if defined(TIMER_PRESCALER_PRESCALER_Max) || defined(__NRFX_DOXYGEN__)
113 /** @brief Maximum value of PRESCALER register. */
114 #define NRF_TIMER_PRESCALER_MAX TIMER_PRESCALER_PRESCALER_Max
115 #else
116 #define NRF_TIMER_PRESCALER_MAX 9
117 #endif
118
119 /**
120 * @brief Macro for getting the maximum bit resolution of the specified timer instance.
121 *
122 * @param[in] id Index of the specified timer instance.
123 *
124 * @retval Maximum bit resolution of the specified timer instance.
125 */
126 #define TIMER_MAX_SIZE(id) NRFX_CONCAT_3(TIMER, id, _MAX_SIZE)
127
128 /**
129 * @brief Macro for validating the correctness of the bit width resolution setting.
130 *
131 * @param[in] id Index of the specified timer instance.
132 * @param[in] bit_width Bit width resolution value to be checked.
133 *
134 * @retval true Timer instance supports the specified bit width resolution value.
135 * @retval false Timer instance does not support the specified bit width resolution value.
136 */
137 #define TIMER_BIT_WIDTH_MAX(id, bit_width) \
138 (TIMER_MAX_SIZE(id) == 8 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) : \
139 (TIMER_MAX_SIZE(id) == 16 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
140 (bit_width == NRF_TIMER_BIT_WIDTH_16) : \
141 (TIMER_MAX_SIZE(id) == 24 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
142 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
143 (bit_width == NRF_TIMER_BIT_WIDTH_24) : \
144 (TIMER_MAX_SIZE(id) == 32 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
145 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
146 (bit_width == NRF_TIMER_BIT_WIDTH_24) || \
147 (bit_width == NRF_TIMER_BIT_WIDTH_32) : \
148 false))))
149
150 /**
151 * @brief Macro for checking correctness of bit width configuration for the specified timer.
152 *
153 * @param[in] p_reg Timer instance register.
154 * @param[in] bit_width Bit width resolution value to be checked.
155 *
156 * @retval true Timer instance supports the specified bit width resolution value.
157 * @retval false Timer instance does not support the specified bit width resolution value.
158 */
159 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) \
160 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER0), \
161 (((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width))), (false)) || \
162 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER1), \
163 (((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width))), (false)) || \
164 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER2), \
165 (((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width))), (false)) || \
166 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER3), \
167 (((p_reg == NRF_TIMER3) && TIMER_BIT_WIDTH_MAX(3, bit_width))), (false)) || \
168 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER4), \
169 (((p_reg == NRF_TIMER4) && TIMER_BIT_WIDTH_MAX(4, bit_width))), (false)) || \
170 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER00), \
171 (((p_reg == NRF_TIMER00) && TIMER_BIT_WIDTH_MAX(00, bit_width))), (false)) || \
172 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER10), \
173 (((p_reg == NRF_TIMER10) && TIMER_BIT_WIDTH_MAX(10, bit_width))), (false)) || \
174 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER20), \
175 (((p_reg == NRF_TIMER20) && TIMER_BIT_WIDTH_MAX(20, bit_width))), (false)) || \
176 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER21), \
177 (((p_reg == NRF_TIMER21) && TIMER_BIT_WIDTH_MAX(21, bit_width))), (false)) || \
178 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER22), \
179 (((p_reg == NRF_TIMER22) && TIMER_BIT_WIDTH_MAX(22, bit_width))), (false)) || \
180 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER23), \
181 (((p_reg == NRF_TIMER23) && TIMER_BIT_WIDTH_MAX(23, bit_width))), (false)) || \
182 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER24), \
183 (((p_reg == NRF_TIMER24) && TIMER_BIT_WIDTH_MAX(24, bit_width))), (false)) || \
184 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER020), \
185 (((p_reg == NRF_TIMER020) && TIMER_BIT_WIDTH_MAX(020, bit_width))), (false)) || \
186 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER021), \
187 (((p_reg == NRF_TIMER021) && TIMER_BIT_WIDTH_MAX(021, bit_width))), (false)) || \
188 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER022), \
189 (((p_reg == NRF_TIMER022) && TIMER_BIT_WIDTH_MAX(022, bit_width))), (false)) || \
190 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER120), \
191 (((p_reg == NRF_TIMER120) && TIMER_BIT_WIDTH_MAX(120, bit_width))), (false)) || \
192 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER130), \
193 (((p_reg == NRF_TIMER130) && TIMER_BIT_WIDTH_MAX(130, bit_width))), (false)) || \
194 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER131), \
195 (((p_reg == NRF_TIMER131) && TIMER_BIT_WIDTH_MAX(131, bit_width))), (false)) || \
196 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER132), \
197 (((p_reg == NRF_TIMER132) && TIMER_BIT_WIDTH_MAX(132, bit_width))), (false)) || \
198 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER133), \
199 (((p_reg == NRF_TIMER133) && TIMER_BIT_WIDTH_MAX(133, bit_width))), (false)) || \
200 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER134), \
201 (((p_reg == NRF_TIMER134) && TIMER_BIT_WIDTH_MAX(134, bit_width))), (false)) || \
202 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER135), \
203 (((p_reg == NRF_TIMER135) && TIMER_BIT_WIDTH_MAX(135, bit_width))), (false)) || \
204 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER136), \
205 (((p_reg == NRF_TIMER136) && TIMER_BIT_WIDTH_MAX(136, bit_width))), (false)) || \
206 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER137), \
207 (((p_reg == NRF_TIMER137) && TIMER_BIT_WIDTH_MAX(137, bit_width))), (false)))
208
209 #if !defined(NRF_TIMER_IS_320MHZ_TIMER)
210 /** @brief Macro for checking whether the base frequency for the specified timer is 320 MHz. */
211 #define NRF_TIMER_IS_320MHZ_TIMER(p_reg) \
212 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER120), (p_reg == NRF_TIMER120), (false)) || \
213 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER121), (p_reg == NRF_TIMER121), (false)))
214 #endif
215
216 #if !defined(NRF_TIMER_IS_128MHZ_TIMER)
217 /** @brief Macro for checking whether the base frequency for the specified timer is 128 MHz. */
218 #define NRF_TIMER_IS_128MHZ_TIMER(p_reg) \
219 (NRFX_COND_CODE_1(NRFX_IS_ENABLED(NRF_CPU_FREQ_IS_128MHZ), \
220 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER00), (p_reg == NRF_TIMER00), (false))), \
221 (false)))
222 #endif
223
224 #if !defined(NRF_TIMER_IS_64MHZ_TIMER)
225 /** @brief Macro for checking whether the base frequency for the specified timer is 64 MHz. */
226 #define NRF_TIMER_IS_64MHZ_TIMER(p_reg) \
227 (NRFX_COND_CODE_1(NRFX_IS_ENABLED(NRF_CPU_FREQ_IS_64MHZ), \
228 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER00), (p_reg == NRF_TIMER00), (false))), \
229 (false)))
230 #endif
231
232 #if !defined(NRF_TIMER_IS_32MHZ_TIMER)
233 /** @brief Macro for checking whether the base frequency for the specified timer is 32 MHz. */
234 #define NRF_TIMER_IS_32MHZ_TIMER(p_reg) \
235 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER020), (p_reg == NRF_TIMER020), (false)) || \
236 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER021), (p_reg == NRF_TIMER021), (false)) || \
237 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER022), (p_reg == NRF_TIMER022), (false)) || \
238 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER10), (p_reg == NRF_TIMER10), (false)))
239 #endif
240
241 /**
242 * @brief Macro for getting base frequency value in Hz for the specified timer.
243 *
244 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
245 */
246 #define NRF_TIMER_BASE_FREQUENCY_GET(p_reg) \
247 ((NRF_TIMER_IS_320MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_320MHZ): \
248 ((NRF_TIMER_IS_128MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_128MHZ): \
249 ((NRF_TIMER_IS_64MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_64MHZ) : \
250 ((NRF_TIMER_IS_32MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_32MHZ) : \
251 (NRF_TIMER_BASE_FREQUENCY_16MHZ)))))
252
253 /**
254 * @brief Macro for computing prescaler value for given base frequency and desired frequency.
255 *
256 * @warning Not every combination of base frequency and desired frequency is supported.
257 *
258 * @param[in] base_freq Base clock frequency for timer in Hz.
259 * @param[in] frequency Desired frequency value in Hz.
260 */
261 #define NRF_TIMER_PRESCALER_CALCULATE(base_freq, frequency) \
262 NRF_CTZ((uint32_t)(base_freq) / (uint32_t)(frequency))
263
264 /**
265 * @brief Macro for checking whether specified frequency can be achived for given timer instance.
266 *
267 * @note Macro is using compile time assertion.
268 *
269 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
270 * @param[in] frequency Desired frequency value in Hz.
271 */
272 #define NRF_TIMER_FREQUENCY_STATIC_CHECK(p_reg, frequency) \
273 NRFX_STATIC_ASSERT( \
274 (NRF_TIMER_BASE_FREQUENCY_GET(p_reg) == frequency) || \
275 ((NRF_TIMER_BASE_FREQUENCY_GET(p_reg) % frequency == 0) && \
276 NRFX_IS_POWER_OF_TWO(NRF_TIMER_BASE_FREQUENCY_GET(p_reg) / (uint32_t)frequency) && \
277 ((NRF_TIMER_BASE_FREQUENCY_GET(p_reg) / frequency) <= (1 << NRF_TIMER_PRESCALER_MAX))))
278
279 /**
280 * @brief Macro for getting the number of capture/compare channels available
281 * in a given timer instance.
282 *
283 * @param[in] id Index of the specified timer instance.
284 */
285 #define NRF_TIMER_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(TIMER, id, _CC_NUM)
286
287 /** @brief Symbol specifying maximum number of available compare channels. */
288 #define NRF_TIMER_CC_COUNT_MAX NRFX_ARRAY_SIZE(((NRF_TIMER_Type*)0)->EVENTS_COMPARE)
289
290 /** @brief Symbol for creating the interrupt bitmask for all compare channels. */
291 #define NRF_TIMER_ALL_CHANNELS_INT_MASK \
292 ((uint32_t)((1 << NRF_TIMER_CC_COUNT_MAX) - 1) << TIMER_INTENSET_COMPARE0_Pos)
293
294 /** @brief Timer tasks. */
295 typedef enum
296 {
297 NRF_TIMER_TASK_START = offsetof(NRF_TIMER_Type, TASKS_START), ///< Task for starting the timer.
298 NRF_TIMER_TASK_STOP = offsetof(NRF_TIMER_Type, TASKS_STOP), ///< Task for stopping the timer.
299 NRF_TIMER_TASK_COUNT = offsetof(NRF_TIMER_Type, TASKS_COUNT), ///< Task for incrementing the timer (in counter mode).
300 NRF_TIMER_TASK_CLEAR = offsetof(NRF_TIMER_Type, TASKS_CLEAR), ///< Task for resetting the timer value.
301 NRF_TIMER_TASK_SHUTDOWN = offsetof(NRF_TIMER_Type, TASKS_SHUTDOWN), ///< Task for powering off the timer.
302 NRF_TIMER_TASK_CAPTURE0 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[0]), ///< Task for capturing the timer value on channel 0.
303 NRF_TIMER_TASK_CAPTURE1 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[1]), ///< Task for capturing the timer value on channel 1.
304 NRF_TIMER_TASK_CAPTURE2 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[2]), ///< Task for capturing the timer value on channel 2.
305 NRF_TIMER_TASK_CAPTURE3 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[3]), ///< Task for capturing the timer value on channel 3.
306 #if NRF_TIMER_HAS_CC4
307 NRF_TIMER_TASK_CAPTURE4 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[4]), ///< Task for capturing the timer value on channel 4.
308 #endif
309 #if NRF_TIMER_HAS_CC5
310 NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5.
311 #endif
312 #if NRF_TIMER_HAS_CC6
313 NRF_TIMER_TASK_CAPTURE6 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[6]), ///< Task for capturing the timer value on channel 6.
314 #endif
315 #if NRF_TIMER_HAS_CC7
316 NRF_TIMER_TASK_CAPTURE7 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[7]), ///< Task for capturing the timer value on channel 7.
317 #endif
318 } nrf_timer_task_t;
319
320 /** @brief Timer events. */
321 typedef enum
322 {
323 NRF_TIMER_EVENT_COMPARE0 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[0]), ///< Event from compare channel 0.
324 NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1.
325 NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2.
326 NRF_TIMER_EVENT_COMPARE3 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[3]), ///< Event from compare channel 3.
327 #if NRF_TIMER_HAS_CC4
328 NRF_TIMER_EVENT_COMPARE4 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[4]), ///< Event from compare channel 4.
329 #endif
330 #if NRF_TIMER_HAS_CC5
331 NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5.
332 #endif
333 #if NRF_TIMER_HAS_CC6
334 NRF_TIMER_EVENT_COMPARE6 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[6]), ///< Event from compare channel 6.
335 #endif
336 #if NRF_TIMER_HAS_CC7
337 NRF_TIMER_EVENT_COMPARE7 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[7]), ///< Event from compare channel 7.
338 #endif
339 } nrf_timer_event_t;
340
341 /** @brief Types of timer shortcuts. */
342 typedef enum
343 {
344 NRF_TIMER_SHORT_COMPARE0_STOP_MASK = TIMER_SHORTS_COMPARE0_STOP_Msk, ///< Shortcut for stopping the timer based on compare 0.
345 NRF_TIMER_SHORT_COMPARE1_STOP_MASK = TIMER_SHORTS_COMPARE1_STOP_Msk, ///< Shortcut for stopping the timer based on compare 1.
346 NRF_TIMER_SHORT_COMPARE2_STOP_MASK = TIMER_SHORTS_COMPARE2_STOP_Msk, ///< Shortcut for stopping the timer based on compare 2.
347 NRF_TIMER_SHORT_COMPARE3_STOP_MASK = TIMER_SHORTS_COMPARE3_STOP_Msk, ///< Shortcut for stopping the timer based on compare 3.
348 #if NRF_TIMER_HAS_CC4
349 NRF_TIMER_SHORT_COMPARE4_STOP_MASK = TIMER_SHORTS_COMPARE4_STOP_Msk, ///< Shortcut for stopping the timer based on compare 4.
350 #endif
351 #if NRF_TIMER_HAS_CC5
352 NRF_TIMER_SHORT_COMPARE5_STOP_MASK = TIMER_SHORTS_COMPARE5_STOP_Msk, ///< Shortcut for stopping the timer based on compare 5.
353 #endif
354 #if NRF_TIMER_HAS_CC6
355 NRF_TIMER_SHORT_COMPARE6_STOP_MASK = TIMER_SHORTS_COMPARE6_STOP_Msk, ///< Shortcut for stopping the timer based on compare 6.
356 #endif
357 #if NRF_TIMER_HAS_CC7
358 NRF_TIMER_SHORT_COMPARE7_STOP_MASK = TIMER_SHORTS_COMPARE7_STOP_Msk, ///< Shortcut for stopping the timer based on compare 7.
359 #endif
360 NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK = TIMER_SHORTS_COMPARE0_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 0.
361 NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK = TIMER_SHORTS_COMPARE1_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 1.
362 NRF_TIMER_SHORT_COMPARE2_CLEAR_MASK = TIMER_SHORTS_COMPARE2_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 2.
363 NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK = TIMER_SHORTS_COMPARE3_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 3.
364 #if NRF_TIMER_HAS_CC4
365 NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK = TIMER_SHORTS_COMPARE4_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 4.
366 #endif
367 #if NRF_TIMER_HAS_CC5
368 NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK = TIMER_SHORTS_COMPARE5_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 5.
369 #endif
370 #if NRF_TIMER_HAS_CC6
371 NRF_TIMER_SHORT_COMPARE6_CLEAR_MASK = TIMER_SHORTS_COMPARE6_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 6.
372 #endif
373 #if NRF_TIMER_HAS_CC7
374 NRF_TIMER_SHORT_COMPARE7_CLEAR_MASK = TIMER_SHORTS_COMPARE7_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 7.
375 #endif
376 } nrf_timer_short_mask_t;
377
378 /** @brief Timer modes. */
379 typedef enum
380 {
381 NRF_TIMER_MODE_TIMER = TIMER_MODE_MODE_Timer, ///< Timer mode: timer.
382 NRF_TIMER_MODE_COUNTER = TIMER_MODE_MODE_Counter, ///< Timer mode: counter.
383 #if NRF_TIMER_HAS_LOW_POWER_MODE
384 NRF_TIMER_MODE_LOW_POWER_COUNTER = TIMER_MODE_MODE_LowPowerCounter, ///< Timer mode: low-power counter.
385 #endif
386 } nrf_timer_mode_t;
387
388 /** @brief Timer bit width. */
389 typedef enum
390 {
391 NRF_TIMER_BIT_WIDTH_8 = TIMER_BITMODE_BITMODE_08Bit, ///< Timer bit width 8 bit.
392 NRF_TIMER_BIT_WIDTH_16 = TIMER_BITMODE_BITMODE_16Bit, ///< Timer bit width 16 bit.
393 NRF_TIMER_BIT_WIDTH_24 = TIMER_BITMODE_BITMODE_24Bit, ///< Timer bit width 24 bit.
394 NRF_TIMER_BIT_WIDTH_32 = TIMER_BITMODE_BITMODE_32Bit ///< Timer bit width 32 bit.
395 } nrf_timer_bit_width_t;
396
397 /** @brief Timer prescalers. */
398 typedef enum
399 {
400 NRF_TIMER_FREQ_16MHz = 0, ///< Timer frequency 16 MHz.
401 NRF_TIMER_FREQ_8MHz, ///< Timer frequency 8 MHz.
402 NRF_TIMER_FREQ_4MHz, ///< Timer frequency 4 MHz.
403 NRF_TIMER_FREQ_2MHz, ///< Timer frequency 2 MHz.
404 NRF_TIMER_FREQ_1MHz, ///< Timer frequency 1 MHz.
405 NRF_TIMER_FREQ_500kHz, ///< Timer frequency 500 kHz.
406 NRF_TIMER_FREQ_250kHz, ///< Timer frequency 250 kHz.
407 NRF_TIMER_FREQ_125kHz, ///< Timer frequency 125 kHz.
408 NRF_TIMER_FREQ_62500Hz, ///< Timer frequency 62500 Hz.
409 NRF_TIMER_FREQ_31250Hz ///< Timer frequency 31250 Hz.
410 } nrf_timer_frequency_t;
411
412 /** @brief Timer capture/compare channels. */
413 typedef enum
414 {
415 NRF_TIMER_CC_CHANNEL0 = 0, ///< Timer capture/compare channel 0.
416 NRF_TIMER_CC_CHANNEL1, ///< Timer capture/compare channel 1.
417 NRF_TIMER_CC_CHANNEL2, ///< Timer capture/compare channel 2.
418 NRF_TIMER_CC_CHANNEL3, ///< Timer capture/compare channel 3.
419 #if NRF_TIMER_HAS_CC4
420 NRF_TIMER_CC_CHANNEL4, ///< Timer capture/compare channel 4.
421 #endif
422 #if NRF_TIMER_HAS_CC5
423 NRF_TIMER_CC_CHANNEL5, ///< Timer capture/compare channel 5.
424 #endif
425 #if NRF_TIMER_HAS_CC6
426 NRF_TIMER_CC_CHANNEL6, ///< Timer capture/compare channel 6.
427 #endif
428 #if NRF_TIMER_HAS_CC7
429 NRF_TIMER_CC_CHANNEL7, ///< Timer capture/compare channel 7.
430 #endif
431 } nrf_timer_cc_channel_t;
432
433 /** @brief Timer interrupts. */
434 typedef enum
435 {
436 NRF_TIMER_INT_COMPARE0_MASK = TIMER_INTENSET_COMPARE0_Msk, ///< Timer interrupt from compare event on channel 0.
437 NRF_TIMER_INT_COMPARE1_MASK = TIMER_INTENSET_COMPARE1_Msk, ///< Timer interrupt from compare event on channel 1.
438 NRF_TIMER_INT_COMPARE2_MASK = TIMER_INTENSET_COMPARE2_Msk, ///< Timer interrupt from compare event on channel 2.
439 NRF_TIMER_INT_COMPARE3_MASK = TIMER_INTENSET_COMPARE3_Msk, ///< Timer interrupt from compare event on channel 3.
440 #if NRF_TIMER_HAS_CC4
441 NRF_TIMER_INT_COMPARE4_MASK = TIMER_INTENSET_COMPARE4_Msk, ///< Timer interrupt from compare event on channel 4.
442 #endif
443 #if NRF_TIMER_HAS_CC5
444 NRF_TIMER_INT_COMPARE5_MASK = TIMER_INTENSET_COMPARE5_Msk, ///< Timer interrupt from compare event on channel 5.
445 #endif
446 #if NRF_TIMER_HAS_CC6
447 NRF_TIMER_INT_COMPARE6_MASK = TIMER_INTENSET_COMPARE6_Msk, ///< Timer interrupt from compare event on channel 6.
448 #endif
449 #if NRF_TIMER_HAS_CC7
450 NRF_TIMER_INT_COMPARE7_MASK = TIMER_INTENSET_COMPARE7_Msk, ///< Timer interrupt from compare event on channel 7.
451 #endif
452 } nrf_timer_int_mask_t;
453
454
455 /**
456 * @brief Function for setting the prescaler factor.
457 *
458 * @note Prescaler value is expressed as \f$ 2^{prescaler\_factor} \f$.
459 *
460 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
461 * @param[in] prescaler_factor Prescaler factor.
462 */
463 NRF_STATIC_INLINE void nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg, uint32_t prescaler_factor);
464
465 /**
466 * @brief Function for retrieving the prescaler factor.
467 *
468 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
469 *
470 * @return Prescaler factor.
471 */
472 NRF_STATIC_INLINE uint32_t nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg);
473
474 /**
475 * @brief Function for activating the specified timer task.
476 *
477 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
478 * @param[in] task Task to be activated.
479 */
480 NRF_STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
481 nrf_timer_task_t task);
482
483 /**
484 * @brief Function for getting the address of the specified timer task register.
485 *
486 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
487 * @param[in] task The specified task.
488 *
489 * @return Address of the specified task register.
490 */
491 NRF_STATIC_INLINE uint32_t nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,
492 nrf_timer_task_t task);
493
494 /**
495 * @brief Function for clearing the specified timer event.
496 *
497 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
498 * @param[in] event Event to clear.
499 */
500 NRF_STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
501 nrf_timer_event_t event);
502
503 /**
504 * @brief Function for retrieving the state of the TIMER event.
505 *
506 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
507 * @param[in] event Event to be checked.
508 *
509 * @retval true The event has been generated.
510 * @retval false The event has not been generated.
511 */
512 NRF_STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type const * p_reg,
513 nrf_timer_event_t event);
514
515 /**
516 * @brief Function for getting the address of the specified timer event register.
517 *
518 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
519 * @param[in] event The specified event.
520 *
521 * @return Address of the specified event register.
522 */
523 NRF_STATIC_INLINE uint32_t nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,
524 nrf_timer_event_t event);
525
526 /**
527 * @brief Function for enabling the specified shortcuts.
528 *
529 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
530 * @param[in] mask Shortcuts to be enabled.
531 */
532 NRF_STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
533 uint32_t mask);
534
535 /**
536 * @brief Function for disabling the specified shortcuts.
537 *
538 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
539 * @param[in] mask Shortcuts to be disabled.
540 */
541 NRF_STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
542 uint32_t mask);
543
544 /**
545 * @brief Function for setting the specified shortcuts.
546 *
547 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
548 * @param[in] mask Shortcuts to be set.
549 */
550 NRF_STATIC_INLINE void nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,
551 uint32_t mask);
552
553 /**
554 * @brief Function for getting COMPARE_CLEAR short mask for the specified channel.
555 *
556 * @param[in] channel Channel.
557 *
558 * @return Short mask.
559 */
560 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_clear_get(uint8_t channel);
561
562 /**
563 * @brief Function for getting COMPARE_STOP short mask for the specified channel.
564 *
565 * @param[in] channel Channel.
566 *
567 * @return Short mask.
568 */
569 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_stop_get(uint8_t channel);
570
571 /**
572 * @brief Function for enabling the specified interrupts.
573 *
574 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
575 * @param[in] mask Mask of interrupts to be enabled.
576 * Use @ref nrf_timer_int_mask_t values for bit masking.
577 */
578 NRF_STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
579 uint32_t mask);
580
581 /**
582 * @brief Function for disabling the specified interrupts.
583 *
584 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
585 * @param[in] mask Mask of interrupts to be disabled.
586 * Use @ref nrf_timer_int_mask_t values for bit masking.
587 */
588 NRF_STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
589 uint32_t mask);
590
591 /**
592 * @brief Function for checking if the specified interrupts are enabled.
593 *
594 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
595 * @param[in] mask Mask of interrupts to be checked.
596 * Use @ref nrf_timer_int_mask_t values for bit masking.
597 *
598 * @return Mask of enabled interrupts.
599 */
600 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask);
601
602 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
603 /**
604 * @brief Function for setting the subscribe configuration for a given
605 * TIMER task.
606 *
607 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
608 * @param[in] task Task for which to set the configuration.
609 * @param[in] channel Channel through which to subscribe events.
610 */
611 NRF_STATIC_INLINE void nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,
612 nrf_timer_task_t task,
613 uint8_t channel);
614
615 /**
616 * @brief Function for clearing the subscribe configuration for a given
617 * TIMER task.
618 *
619 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
620 * @param[in] task Task for which to clear the configuration.
621 */
622 NRF_STATIC_INLINE void nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,
623 nrf_timer_task_t task);
624
625 /**
626 * @brief Function for setting the publish configuration for a given
627 * TIMER event.
628 *
629 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
630 * @param[in] event Event for which to set the configuration.
631 * @param[in] channel Channel through which to publish the event.
632 */
633 NRF_STATIC_INLINE void nrf_timer_publish_set(NRF_TIMER_Type * p_reg,
634 nrf_timer_event_t event,
635 uint8_t channel);
636
637 /**
638 * @brief Function for clearing the publish configuration for a given
639 * TIMER event.
640 *
641 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
642 * @param[in] event Event for which to clear the configuration.
643 */
644 NRF_STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
645 nrf_timer_event_t event);
646 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
647
648 /**
649 * @brief Function for setting the timer mode.
650 *
651 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
652 * @param[in] mode Timer mode.
653 */
654 NRF_STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
655 nrf_timer_mode_t mode);
656
657 /**
658 * @brief Function for retrieving the timer mode.
659 *
660 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
661 *
662 * @return Timer mode.
663 */
664 NRF_STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type const * p_reg);
665
666 /**
667 * @brief Function for setting the timer bit width.
668 *
669 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
670 * @param[in] bit_width Timer bit width.
671 */
672 NRF_STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
673 nrf_timer_bit_width_t bit_width);
674
675 /**
676 * @brief Function for retrieving the timer bit width.
677 *
678 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
679 *
680 * @return Timer bit width.
681 */
682 NRF_STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg);
683
684 /**
685 * @brief Function for setting the capture/compare register for the specified channel.
686 *
687 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
688 * @param[in] cc_channel The specified capture/compare channel.
689 * @param[in] cc_value Value to write to the capture/compare register.
690 */
691 NRF_STATIC_INLINE void nrf_timer_cc_set(NRF_TIMER_Type * p_reg,
692 nrf_timer_cc_channel_t cc_channel,
693 uint32_t cc_value);
694
695 /**
696 * @brief Function for retrieving the capture/compare value for a specified channel.
697 *
698 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
699 * @param[in] cc_channel The specified capture/compare channel.
700 *
701 * @return Value from the specified capture/compare register.
702 */
703 NRF_STATIC_INLINE uint32_t nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,
704 nrf_timer_cc_channel_t cc_channel);
705
706 /**
707 * @brief Function for getting the specified timer capture task.
708 *
709 * @param[in] channel Capture channel.
710 *
711 * @return Capture task.
712 */
713 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint8_t channel);
714
715 /**
716 * @brief Function for getting the specified timer compare event.
717 *
718 * @param[in] channel Compare channel.
719 *
720 * @return Compare event.
721 */
722 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint8_t channel);
723
724 /**
725 * @brief Function for getting the specified timer compare interrupt.
726 *
727 * @param[in] channel Compare channel.
728 *
729 * @return Compare interrupt.
730 */
731 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint8_t channel);
732
733 /**
734 * @brief Function for calculating the number of timer ticks for a given time
735 * (in microseconds) and timer frequency.
736 *
737 * @param[in] time_us Time in microseconds.
738 * @param[in] frequency Timer frequency.
739 *
740 * @return Number of timer ticks.
741 */
742 NRF_STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
743 nrf_timer_frequency_t frequency);
744
745 /**
746 * @brief Function for calculating the number of timer ticks for a given time
747 * (in milliseconds) and timer frequency.
748 *
749 * @param[in] time_ms Time in milliseconds.
750 * @param[in] frequency Timer frequency.
751 *
752 * @return Number of timer ticks.
753 */
754 NRF_STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
755 nrf_timer_frequency_t frequency);
756
757 #if NRF_TIMER_HAS_ONE_SHOT
758 /**
759 * @brief Function for enabling one-shot operation for the specified capture/compare channel.
760 *
761 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
762 * @param[in] cc_channel Capture/compare channel.
763 */
764 NRF_STATIC_INLINE void nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,
765 nrf_timer_cc_channel_t cc_channel);
766
767 /**
768 * @brief Function for disabling one-shot operation for the specified capture/compare channel.
769 *
770 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
771 * @param[in] cc_channel Capture/compare channel.
772 */
773 NRF_STATIC_INLINE void nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,
774 nrf_timer_cc_channel_t cc_channel);
775
776 #endif // NRF_TIMER_HAS_ONE_SHOT
777
778 #ifndef NRF_DECLARE_ONLY
779
nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,nrf_timer_task_t task)780 NRF_STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
781 nrf_timer_task_t task)
782 {
783 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
784 }
785
nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,nrf_timer_task_t task)786 NRF_STATIC_INLINE uint32_t nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,
787 nrf_timer_task_t task)
788 {
789 return nrf_task_event_address_get(p_reg, task);
790 }
791
nrf_timer_event_clear(NRF_TIMER_Type * p_reg,nrf_timer_event_t event)792 NRF_STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
793 nrf_timer_event_t event)
794 {
795 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
796 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
797 }
798
nrf_timer_event_check(NRF_TIMER_Type const * p_reg,nrf_timer_event_t event)799 NRF_STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type const * p_reg,
800 nrf_timer_event_t event)
801 {
802 return nrf_event_check(p_reg, event);
803 }
804
nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,nrf_timer_event_t event)805 NRF_STATIC_INLINE uint32_t nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,
806 nrf_timer_event_t event)
807 {
808 return nrf_task_event_address_get(p_reg, event);
809 }
810
nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,uint32_t mask)811 NRF_STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
812 uint32_t mask)
813 {
814 p_reg->SHORTS |= mask;
815 }
816
nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,uint32_t mask)817 NRF_STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
818 uint32_t mask)
819 {
820 p_reg->SHORTS &= ~(mask);
821 }
822
nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,uint32_t mask)823 NRF_STATIC_INLINE void nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,
824 uint32_t mask)
825 {
826 p_reg->SHORTS = mask;
827 }
828
nrf_timer_short_compare_clear_get(uint8_t channel)829 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_clear_get(uint8_t channel)
830 {
831 return (nrf_timer_short_mask_t)((uint32_t)NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK << channel);
832 }
833
nrf_timer_short_compare_stop_get(uint8_t channel)834 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_stop_get(uint8_t channel)
835 {
836 return (nrf_timer_short_mask_t)((uint32_t)NRF_TIMER_SHORT_COMPARE0_STOP_MASK << channel);
837 }
838
nrf_timer_int_enable(NRF_TIMER_Type * p_reg,uint32_t mask)839 NRF_STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
840 uint32_t mask)
841 {
842 p_reg->INTENSET = mask;
843 }
844
nrf_timer_int_disable(NRF_TIMER_Type * p_reg,uint32_t mask)845 NRF_STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
846 uint32_t mask)
847 {
848 p_reg->INTENCLR = mask;
849 }
850
nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg,uint32_t mask)851 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask)
852 {
853 return p_reg->INTENSET & mask;
854 }
855
856 #if defined(DPPI_PRESENT)
nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,nrf_timer_task_t task,uint8_t channel)857 NRF_STATIC_INLINE void nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,
858 nrf_timer_task_t task,
859 uint8_t channel)
860 {
861 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
862 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
863 }
864
nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,nrf_timer_task_t task)865 NRF_STATIC_INLINE void nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,
866 nrf_timer_task_t task)
867 {
868 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
869 }
870
nrf_timer_publish_set(NRF_TIMER_Type * p_reg,nrf_timer_event_t event,uint8_t channel)871 NRF_STATIC_INLINE void nrf_timer_publish_set(NRF_TIMER_Type * p_reg,
872 nrf_timer_event_t event,
873 uint8_t channel)
874 {
875 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
876 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
877 }
878
nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,nrf_timer_event_t event)879 NRF_STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
880 nrf_timer_event_t event)
881 {
882 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
883 }
884 #endif // defined(DPPI_PRESENT)
885
nrf_timer_mode_set(NRF_TIMER_Type * p_reg,nrf_timer_mode_t mode)886 NRF_STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
887 nrf_timer_mode_t mode)
888 {
889 p_reg->MODE = (p_reg->MODE & ~TIMER_MODE_MODE_Msk) |
890 ((mode << TIMER_MODE_MODE_Pos) & TIMER_MODE_MODE_Msk);
891 }
892
nrf_timer_mode_get(NRF_TIMER_Type const * p_reg)893 NRF_STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type const * p_reg)
894 {
895 return (nrf_timer_mode_t)(p_reg->MODE);
896 }
897
nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,nrf_timer_bit_width_t bit_width)898 NRF_STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
899 nrf_timer_bit_width_t bit_width)
900 {
901 p_reg->BITMODE = (p_reg->BITMODE & ~TIMER_BITMODE_BITMODE_Msk) |
902 ((bit_width << TIMER_BITMODE_BITMODE_Pos) &
903 TIMER_BITMODE_BITMODE_Msk);
904 }
905
nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg)906 NRF_STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg)
907 {
908 return (nrf_timer_bit_width_t)(p_reg->BITMODE);
909 }
910
nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg,uint32_t prescaler_factor)911 NRF_STATIC_INLINE void nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg, uint32_t prescaler_factor)
912 {
913 NRFX_ASSERT(prescaler_factor <= NRF_TIMER_PRESCALER_MAX);
914 p_reg->PRESCALER = prescaler_factor;
915 }
916
nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg)917 NRF_STATIC_INLINE uint32_t nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg)
918 {
919 return p_reg->PRESCALER;
920 }
921
nrf_timer_cc_set(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value)922 NRF_STATIC_INLINE void nrf_timer_cc_set(NRF_TIMER_Type * p_reg,
923 nrf_timer_cc_channel_t cc_channel,
924 uint32_t cc_value)
925 {
926 p_reg->CC[cc_channel] = cc_value;
927 }
928
nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,nrf_timer_cc_channel_t cc_channel)929 NRF_STATIC_INLINE uint32_t nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,
930 nrf_timer_cc_channel_t cc_channel)
931 {
932 return (uint32_t)p_reg->CC[cc_channel];
933 }
934
nrf_timer_capture_task_get(uint8_t channel)935 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint8_t channel)
936 {
937 return (nrf_timer_task_t)NRFX_OFFSETOF(NRF_TIMER_Type, TASKS_CAPTURE[channel]);
938 }
939
nrf_timer_compare_event_get(uint8_t channel)940 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint8_t channel)
941 {
942 return (nrf_timer_event_t)NRFX_OFFSETOF(NRF_TIMER_Type, EVENTS_COMPARE[channel]);
943 }
944
nrf_timer_compare_int_get(uint8_t channel)945 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint8_t channel)
946 {
947 return (nrf_timer_int_mask_t)
948 ((uint32_t)NRF_TIMER_INT_COMPARE0_MASK << channel);
949 }
950
nrf_timer_us_to_ticks(uint32_t time_us,nrf_timer_frequency_t frequency)951 NRF_STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
952 nrf_timer_frequency_t frequency)
953 {
954 // The "frequency" parameter here is actually the prescaler value, and the
955 // timer runs at the following frequency: f = 16 MHz / 2^prescaler.
956 uint32_t prescaler = (uint32_t)frequency;
957 uint64_t ticks = ((time_us * 16ULL) >> prescaler);
958 NRFX_ASSERT(ticks <= UINT32_MAX);
959 return (uint32_t)ticks;
960 }
961
nrf_timer_ms_to_ticks(uint32_t time_ms,nrf_timer_frequency_t frequency)962 NRF_STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
963 nrf_timer_frequency_t frequency)
964 {
965 // The "frequency" parameter here is actually the prescaler value, and the
966 // timer runs at the following frequency: f = 16000 kHz / 2^prescaler.
967 uint32_t prescaler = (uint32_t)frequency;
968 uint64_t ticks = ((time_ms * 16000ULL) >> prescaler);
969 NRFX_ASSERT(ticks <= UINT32_MAX);
970 return (uint32_t)ticks;
971 }
972
973 #if NRF_TIMER_HAS_ONE_SHOT
nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel)974 NRF_STATIC_INLINE void nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,
975 nrf_timer_cc_channel_t cc_channel)
976 {
977 p_reg->ONESHOTEN[cc_channel] = TIMER_ONESHOTEN_ONESHOTEN_Msk;
978 }
979
nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel)980 NRF_STATIC_INLINE void nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,
981 nrf_timer_cc_channel_t cc_channel)
982 {
983 p_reg->ONESHOTEN[cc_channel] = 0;
984 }
985 #endif // NRF_TIMER_HAS_ONE_SHOT
986
987 #endif // NRF_DECLARE_ONLY
988
989 /** @} */
990
991 #ifdef __cplusplus
992 }
993 #endif
994
995 #endif // NRF_TIMER_H__
996
