1 /*
2 * Copyright (c) 2023 - 2024, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_TBM_H__
35 #define NRF_TBM_H__
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 /**
44 * @defgroup nrf_tbm_hal TBM HAL
45 * @{
46 * @ingroup nrf_tbm
47 * @brief Hardware access layer for managing the Trace Buffer Monitor (TBM) peripheral.
48 */
49
50 /** @brief TBM tasks. */
51 typedef enum
52 {
53 NRF_TBM_TASK_START = offsetof(NRF_TBM_Type, TASKS_START), ///< Start counter.
54 NRF_TBM_TASK_STOP = offsetof(NRF_TBM_Type, TASKS_STOP), ///< Stop counter.
55 NRF_TBM_TASK_FLUSH = offsetof(NRF_TBM_Type, TASKS_FLUSH), ///< Stop counter, keep counter value.
56 } nrf_tbm_task_t;
57
58 /** @brief TBM events. */
59 typedef enum
60 {
61 NRF_TBM_EVENT_HALFFULL = offsetof(NRF_TBM_Type, EVENTS_HALFFULL), ///< Buffer half-full.
62 NRF_TBM_EVENT_FULL = offsetof(NRF_TBM_Type, EVENTS_FULL), ///< Buffer full.
63 NRF_TBM_EVENT_FLUSH = offsetof(NRF_TBM_Type, EVENTS_FLUSH), ///< Stopped due to flush.
64 } nrf_tbm_event_t;
65
66 /** @brief TBM interrupts. */
67 typedef enum
68 {
69 NRF_TBM_INT_HALFFULL_MASK = TBM_INTENSET_HALFFULL_Msk, ///< Interrupt on HALFFULL event.
70 NRF_TBM_INT_FULL_MASK = TBM_INTENSET_FULL_Msk, ///< Interrupt on FULL event.
71 NRF_TBM_INT_FLUSH_MASK = TBM_INTENSET_FLUSH_Msk, ///< Interrupt on FLUSH event.
72 } nrf_tbm_int_mask_t;
73
74 /**
75 * @brief Function for activating the specified TBM task.
76 *
77 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
78 * @param[in] task Task to be activated.
79 */
80 NRF_STATIC_INLINE void nrf_tbm_task_trigger(NRF_TBM_Type * p_reg, nrf_tbm_task_t task);
81
82 /**
83 * @brief Function for clearing the specified TBM event.
84 *
85 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
86 * @param[in] event Event to be cleared.
87 */
88 NRF_STATIC_INLINE void nrf_tbm_event_clear(NRF_TBM_Type * p_reg, nrf_tbm_event_t event);
89
90 /**
91 * @brief Function for retrieving the state of the TBM event.
92 *
93 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
94 * @param[in] event Event to be checked.
95 *
96 * @retval true The event has been generated.
97 * @retval false The event has not been generated.
98 */
99 NRF_STATIC_INLINE bool nrf_tbm_event_check(NRF_TBM_Type const * p_reg,
100 nrf_tbm_event_t event);
101
102 /**
103 * @brief Function for enabling the specified interrupts.
104 *
105 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
106 * @param[in] mask Mask of interrupts to be enabled.
107 * Use @ref nrf_tbm_int_mask_t values for bit masking.
108 */
109 NRF_STATIC_INLINE void nrf_tbm_int_enable(NRF_TBM_Type * p_reg, uint32_t mask);
110
111 /**
112 * @brief Function for setting the configuration of interrupts.
113 *
114 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
115 * @param[in] mask Mask of interrupts to be set.
116 * Use @ref nrf_tbm_int_mask_t values for bit masking.
117 */
118 NRF_STATIC_INLINE void nrf_tbm_int_set(NRF_TBM_Type * p_reg, uint32_t mask);
119
120 /**
121 * @brief Function for disabling the specified interrupts.
122 *
123 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
124 * @param[in] mask Mask of interrupts to be disabled.
125 * Use @ref nrf_tbm_int_mask_t values for bit masking.
126 */
127 NRF_STATIC_INLINE void nrf_tbm_int_disable(NRF_TBM_Type * p_reg, uint32_t mask);
128
129 /**
130 * @brief Function for checking if the specified interrupts are enabled.
131 *
132 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
133 * @param[in] mask Mask of interrupts to be checked.
134 * Use @ref nrf_tbm_int_mask_t values for bit masking.
135 *
136 * @return Mask of enabled interrupts.
137 */
138 NRF_STATIC_INLINE uint32_t nrf_tbm_int_enable_check(NRF_TBM_Type const * p_reg, uint32_t mask);
139
140 /**
141 * @brief Function for retrieving the state of pending interrupts.
142 *
143 * @note States of pending interrupt are saved as a bitmask.
144 * One set at particular position means that interrupt for event is pending.
145 *
146 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
147 *
148 * @return Bitmask with information about pending interrupts.
149 * Use @ref nrf_tbm_int_mask_t values for bit masking.
150 */
151 NRF_STATIC_INLINE uint32_t nrf_tbm_int_pending_get(NRF_TBM_Type const * p_reg);
152
153 /**
154 * @brief Function for setting the buffer size.
155 *
156 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
157 * @param[in] size Size in 32 bit words.
158 */
159 NRF_STATIC_INLINE void nrf_tbm_buffersize_set(NRF_TBM_Type * p_reg, uint32_t size);
160
161 /**
162 * @brief Function for getting current count value.
163 *
164 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
165 *
166 * @return Current count value.
167 */
168 NRF_STATIC_INLINE uint32_t nrf_tbm_count_get(NRF_TBM_Type * p_reg);
169
170 #ifndef NRF_DECLARE_ONLY
nrf_tbm_task_trigger(NRF_TBM_Type * p_reg,nrf_tbm_task_t task)171 NRF_STATIC_INLINE void nrf_tbm_task_trigger(NRF_TBM_Type * p_reg, nrf_tbm_task_t task)
172 {
173 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
174 }
175
nrf_tbm_event_clear(NRF_TBM_Type * p_reg,nrf_tbm_event_t event)176 NRF_STATIC_INLINE void nrf_tbm_event_clear(NRF_TBM_Type * p_reg, nrf_tbm_event_t event)
177 {
178 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
179 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
180 }
181
nrf_tbm_event_check(NRF_TBM_Type const * p_reg,nrf_tbm_event_t event)182 NRF_STATIC_INLINE bool nrf_tbm_event_check(NRF_TBM_Type const * p_reg,
183 nrf_tbm_event_t event)
184 {
185 return nrf_event_check(p_reg, event);
186 }
187
nrf_tbm_int_enable(NRF_TBM_Type * p_reg,uint32_t mask)188 NRF_STATIC_INLINE void nrf_tbm_int_enable(NRF_TBM_Type * p_reg, uint32_t mask)
189 {
190 p_reg->INTENSET = mask;
191 }
192
nrf_tbm_int_set(NRF_TBM_Type * p_reg,uint32_t mask)193 NRF_STATIC_INLINE void nrf_tbm_int_set(NRF_TBM_Type * p_reg, uint32_t mask)
194 {
195 p_reg->INTEN = mask;
196 }
197
nrf_tbm_int_disable(NRF_TBM_Type * p_reg,uint32_t mask)198 NRF_STATIC_INLINE void nrf_tbm_int_disable(NRF_TBM_Type * p_reg, uint32_t mask)
199 {
200 p_reg->INTENCLR = mask;
201 }
202
nrf_tbm_int_enable_check(NRF_TBM_Type const * p_reg,uint32_t mask)203 NRF_STATIC_INLINE uint32_t nrf_tbm_int_enable_check(NRF_TBM_Type const * p_reg, uint32_t mask)
204 {
205 return p_reg->INTENSET & mask;
206 }
207
nrf_tbm_int_pending_get(NRF_TBM_Type const * p_reg)208 NRF_STATIC_INLINE uint32_t nrf_tbm_int_pending_get(NRF_TBM_Type const * p_reg)
209 {
210 return p_reg->INTPEND;
211 }
212
nrf_tbm_buffersize_set(NRF_TBM_Type * p_reg,uint32_t size)213 NRF_STATIC_INLINE void nrf_tbm_buffersize_set(NRF_TBM_Type * p_reg, uint32_t size)
214 {
215 p_reg->BUFFERSIZE = size;
216 }
217
nrf_tbm_count_get(NRF_TBM_Type * p_reg)218 NRF_STATIC_INLINE uint32_t nrf_tbm_count_get(NRF_TBM_Type * p_reg)
219 {
220 return p_reg->COUNT;
221 }
222
223 #endif // NRF_DECLARE_ONLY
224
225 /** @} */
226
227 #ifdef __cplusplus
228 }
229 #endif
230
231 #endif // NRF_TBM_H__
232