1 /*
2 * Copyright (c) 2023 - 2024, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_LRCCONF_H__
35 #define NRF_LRCCONF_H__
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42 /**
43 * @defgroup nrf_lrcconf_hal LRCCONF HAL
44 * @{
45 * @ingroup nrf_lrc
46 * @brief Hardware access layer for managing the Local Resource Controller Configuration (LRCCONF) peripheral.
47 */
48
49 /** @brief Number of clocks supported by LRCCONF. */
50 #define NRF_LRCCONF_CLK_COUNT LRCCONF_CLKSTAT_MaxCount
51
52 /** @brief Size of AXI bridge waitstates array. */
53 #define NRF_LRCCONF_AXI_WAITSTATES_ARRAY_SIZE LRCCONF_AX2XWAITSTATES_MaxCount
54
55 #if defined(LRCCONF_TASKS_REQHFXO_TASKS_REQHFXO_Msk) || defined(__NRFX_DOXYGEN__)
56 /** @brief Symbol indicating whether HFXO requesting is present. */
57 #define NRF_LRCCONF_HAS_HFXO 1
58 #else
59 #define NRF_LRCCONF_HAS_HFXO 0
60 #endif
61
62 /** @brief Tasks. */
63 typedef enum
64 {
65 NRF_LRCCONF_TASK_CLKSTART_0 = offsetof(NRF_LRCCONF_Type, TASKS_REQCLKSRC[0]), /**< Request the clock source for clock 0. */
66 NRF_LRCCONF_TASK_CLKSTART_1 = offsetof(NRF_LRCCONF_Type, TASKS_REQCLKSRC[1]), /**< Request the clock source for clock 1. */
67 NRF_LRCCONF_TASK_CLKSTART_2 = offsetof(NRF_LRCCONF_Type, TASKS_REQCLKSRC[2]), /**< Request the clock source for clock 2. */
68 NRF_LRCCONF_TASK_CLKSTART_3 = offsetof(NRF_LRCCONF_Type, TASKS_REQCLKSRC[3]), /**< Request the clock source for clock 3. */
69 NRF_LRCCONF_TASK_CLKSTART_4 = offsetof(NRF_LRCCONF_Type, TASKS_REQCLKSRC[4]), /**< Request the clock source for clock 4. */
70 NRF_LRCCONF_TASK_CLKSTART_5 = offsetof(NRF_LRCCONF_Type, TASKS_REQCLKSRC[5]), /**< Request the clock source for clock 5. */
71 NRF_LRCCONF_TASK_CLKSTART_6 = offsetof(NRF_LRCCONF_Type, TASKS_REQCLKSRC[6]), /**< Request the clock source for clock 6. */
72 NRF_LRCCONF_TASK_CLKSTART_7 = offsetof(NRF_LRCCONF_Type, TASKS_REQCLKSRC[7]), /**< Request the clock source for clock 7. */
73 NRF_LRCCONF_TASK_CLKSTOP_0 = offsetof(NRF_LRCCONF_Type, TASKS_STOPREQCLKSRC[0]), /**< Stop requesting the clock source for clock 0. */
74 NRF_LRCCONF_TASK_CLKSTOP_1 = offsetof(NRF_LRCCONF_Type, TASKS_STOPREQCLKSRC[1]), /**< Stop requesting the clock source for clock 1. */
75 NRF_LRCCONF_TASK_CLKSTOP_2 = offsetof(NRF_LRCCONF_Type, TASKS_STOPREQCLKSRC[2]), /**< Stop requesting the clock source for clock 2. */
76 NRF_LRCCONF_TASK_CLKSTOP_3 = offsetof(NRF_LRCCONF_Type, TASKS_STOPREQCLKSRC[3]), /**< Stop requesting the clock source for clock 3. */
77 NRF_LRCCONF_TASK_CLKSTOP_4 = offsetof(NRF_LRCCONF_Type, TASKS_STOPREQCLKSRC[4]), /**< Stop requesting the clock source for clock 4. */
78 NRF_LRCCONF_TASK_CLKSTOP_5 = offsetof(NRF_LRCCONF_Type, TASKS_STOPREQCLKSRC[5]), /**< Stop requesting the clock source for clock 5. */
79 NRF_LRCCONF_TASK_CLKSTOP_6 = offsetof(NRF_LRCCONF_Type, TASKS_STOPREQCLKSRC[6]), /**< Stop requesting the clock source for clock 6. */
80 NRF_LRCCONF_TASK_CLKSTOP_7 = offsetof(NRF_LRCCONF_Type, TASKS_STOPREQCLKSRC[7]), /**< Stop requesting the clock source for clock 7. */
81 NRF_LRCCONF_TASK_CONSTLAT_ENABLE = offsetof(NRF_LRCCONF_Type, TASKS_CONSTLAT.ENABLE), /**< Enable constant latency mode. */
82 NRF_LRCCONF_TASK_CONSTLAT_DISABLE = offsetof(NRF_LRCCONF_Type, TASKS_CONSTLAT.DISABLE), /**< Disable constant latency mode. */
83 NRF_LRCCONF_TASK_SYSTEMOFFNOTREADY = offsetof(NRF_LRCCONF_Type, TASKS_SYSTEMOFF.NOTREADY), /**< Indicate being not ready to system off .*/
84 NRF_LRCCONF_TASK_SYSTEMOFFREADY = offsetof(NRF_LRCCONF_Type, TASKS_SYSTEMOFF.READY), /**< Indicate being ready to system off .*/
85 #if NRF_LRCCONF_HAS_HFXO
86 NRF_LRCCONF_TASK_REQHFXO = offsetof(NRF_LRCCONF_Type, TASKS_REQHFXO), /**< Request HFXO. */
87 NRF_LRCCONF_TASK_STOPREQHFXO = offsetof(NRF_LRCCONF_Type, TASKS_STOPREQHFXO), /**< Stop requesting HFXO. */
88 #endif
89 } nrf_lrcconf_task_t;
90
91 /** @brief Events. */
92 typedef enum
93 {
94 NRF_LRCCONF_EVENT_CLKSTARTED_0 = offsetof(NRF_LRCCONF_Type, EVENTS_CLKSRCSTARTED[0]), /**< Clock 0 started. */
95 NRF_LRCCONF_EVENT_CLKSTARTED_1 = offsetof(NRF_LRCCONF_Type, EVENTS_CLKSRCSTARTED[1]), /**< Clock 1 started. */
96 NRF_LRCCONF_EVENT_CLKSTARTED_2 = offsetof(NRF_LRCCONF_Type, EVENTS_CLKSRCSTARTED[2]), /**< Clock 2 started. */
97 NRF_LRCCONF_EVENT_CLKSTARTED_3 = offsetof(NRF_LRCCONF_Type, EVENTS_CLKSRCSTARTED[3]), /**< Clock 3 started. */
98 NRF_LRCCONF_EVENT_CLKSTARTED_4 = offsetof(NRF_LRCCONF_Type, EVENTS_CLKSRCSTARTED[4]), /**< Clock 4 started. */
99 NRF_LRCCONF_EVENT_CLKSTARTED_5 = offsetof(NRF_LRCCONF_Type, EVENTS_CLKSRCSTARTED[5]), /**< Clock 5 started. */
100 NRF_LRCCONF_EVENT_CLKSTARTED_6 = offsetof(NRF_LRCCONF_Type, EVENTS_CLKSRCSTARTED[6]), /**< Clock 6 started. */
101 NRF_LRCCONF_EVENT_CLKSTARTED_7 = offsetof(NRF_LRCCONF_Type, EVENTS_CLKSRCSTARTED[7]), /**< Clock 7 started. */
102 #if NRF_LRCCONF_HAS_HFXO
103 NRF_LRCCONF_EVENT_HFXOSTARTED = offsetof(NRF_LRCCONF_Type, EVENTS_HFXOSTARTED), /**< HFXO started. */
104 #endif
105 } nrf_lrcconf_event_t;
106
107 /** @brief Clock sources. */
108 typedef enum
109 {
110 NRF_LRCCONF_CLK_SRC_OPEN_LOOP = LRCCONF_CLKSTAT_SRC_SRC_OpenLoop, /**< Open loop mode. */
111 NRF_LRCCONF_CLK_SRC_CLOSED_LOOP = LRCCONF_CLKSTAT_SRC_SRC_ClosedLoop, /**< Closed loop mode. */
112 } nrf_lrcconf_clk_src_t;
113
114 /** @brief Power domain mask. */
115 typedef enum
116 {
117 NRF_LRCCONF_POWER_MAIN = LRCCONF_POWERON_MAIN_Msk, /**< Mask for main power domain. */
118 NRF_LRCCONF_POWER_DOMAIN_0 = LRCCONF_POWERON_ACTIVE0_Msk, /**< Mask for power domain 0. */
119 NRF_LRCCONF_POWER_DOMAIN_1 = LRCCONF_POWERON_ACTIVE1_Msk, /**< Mask for power domain 1. */
120 NRF_LRCCONF_POWER_DOMAIN_2 = LRCCONF_POWERON_ACTIVE2_Msk, /**< Mask for power domain 2. */
121 NRF_LRCCONF_POWER_DOMAIN_3 = LRCCONF_POWERON_ACTIVE3_Msk, /**< Mask for power domain 3. */
122 NRF_LRCCONF_POWER_DOMAIN_4 = LRCCONF_POWERON_ACTIVE4_Msk, /**< Mask for power domain 4. */
123 NRF_LRCCONF_POWER_DOMAIN_5 = LRCCONF_POWERON_ACTIVE5_Msk, /**< Mask for power domain 5. */
124 NRF_LRCCONF_POWER_DOMAIN_6 = LRCCONF_POWERON_ACTIVE6_Msk, /**< Mask for power domain 6. */
125 NRF_LRCCONF_POWER_DOMAIN_7 = LRCCONF_POWERON_ACTIVE7_Msk, /**< Mask for power domain 7. */
126 } nrf_lrcconf_power_domain_mask_t;
127
128 /**
129 * @brief Function for starting a task.
130 *
131 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
132 * @param[in] task Requested task.
133 */
134 NRF_STATIC_INLINE void nrf_lrcconf_task_trigger(NRF_LRCCONF_Type * p_reg, nrf_lrcconf_task_t task);
135
136 /**
137 * @brief Function for returning the address of a task.
138 *
139 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
140 * @param[in] task Requested task.
141 *
142 * @return Address of the requested task register.
143 */
144 NRF_STATIC_INLINE uint32_t nrf_lrcconf_task_address_get(NRF_LRCCONF_Type const * p_reg,
145 nrf_lrcconf_task_t task);
146
147 /**
148 * @brief Function for returning the address of an event.
149 *
150 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
151 * @param[in] event Requested event.
152 *
153 * @return Address of the requested event register.
154 */
155 NRF_STATIC_INLINE uint32_t nrf_lrcconf_event_address_get(NRF_LRCCONF_Type const * p_reg,
156 nrf_lrcconf_event_t event);
157
158 /**
159 * @brief Function for clearing an event.
160 *
161 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
162 * @param[in] event Event to be cleared.
163 */
164 NRF_STATIC_INLINE void nrf_lrcconf_event_clear(NRF_LRCCONF_Type * p_reg,
165 nrf_lrcconf_event_t event);
166
167 /**
168 * @brief Function for retrieving the state of the specified event.
169 *
170 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
171 * @param[in] event Event to be checked.
172 *
173 * @retval true The event has been generated.
174 * @retval false The event has not been generated.
175 */
176 NRF_STATIC_INLINE bool nrf_lrcconf_event_check(NRF_LRCCONF_Type const * p_reg,
177 nrf_lrcconf_event_t event);
178
179 /**
180 * @brief Function for getting CLKSTART task by its index.
181 *
182 * @param[in] index Index of the CLKSTART task.
183 *
184 * @return CLKSTART task.
185 */
186 NRF_STATIC_INLINE nrf_lrcconf_task_t nrf_lrcconf_clkstart_task_get(uint8_t index);
187
188 /**
189 * @brief Function for getting CLKSTOP task by its index.
190 *
191 * @param[in] index Index of the CLKSTOP task.
192 *
193 * @return CLKSTOP task.
194 */
195 NRF_STATIC_INLINE nrf_lrcconf_task_t nrf_lrcconf_clkstop_task_get(uint8_t index);
196
197 /**
198 * @brief Function for getting CLKSTARTED event by its index.
199 *
200 * @param[in] index Index of the CLKSTARTED event.
201 *
202 * @return CLKSTARTED event.
203 */
204 NRF_STATIC_INLINE nrf_lrcconf_event_t nrf_lrcconf_clkstarted_event_get(uint8_t index);
205
206 /**
207 * @brief Function for getting power domain on mask by its index.
208 *
209 * @param[in] index Index of the domain.
210 *
211 * @return Enum value for domain.
212 */
213 NRF_STATIC_INLINE
214 nrf_lrcconf_power_domain_mask_t nrf_lrcconf_power_domain_on_get(uint8_t index);
215
216 /**
217 * @brief Function for retrieving the status indicating whether TASK_CLKSTART task has been
218 * triggered.
219 *
220 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
221 * @param[in] clock Clock index.
222 *
223 * @retval true Clock start task has been triggered.
224 * @retval false Clock start task has not been triggered.
225 */
226 NRF_STATIC_INLINE bool nrf_lrcconf_clock_run_status_check(NRF_LRCCONF_Type const * p_reg,
227 uint8_t clock);
228
229 /**
230 * @brief Function for retrieving the source of the specified clock.
231 *
232 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
233 * @param[in] clock Clock index.
234 *
235 * @return Clock source.
236 */
237 NRF_STATIC_INLINE
238 nrf_lrcconf_clk_src_t nrf_lrcconf_clock_source_get(NRF_LRCCONF_Type const * p_reg,
239 uint8_t clock);
240 /**
241 * @brief Function for setting the specified clock to remain running.
242 *
243 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
244 * @param[in] clock Clock index.
245 * @param[in] alwaysrun True if forcing the clock to remain on is to be enabled, false otherwise.
246 */
247 NRF_STATIC_INLINE void nrf_lrcconf_clock_always_run_force_set(NRF_LRCCONF_Type * p_reg,
248 uint8_t clock,
249 bool alwaysrun);
250
251 /**
252 * @brief Function for checking if the specified clock is configured to remain running.
253 *
254 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
255 * @param[in] clock Clock index.
256 *
257 * @retval true The clock is configured to remain on.
258 * @retval false The clock is not configured to remain on.
259 */
260 NRF_STATIC_INLINE bool nrf_lrcconf_clock_always_run_check(NRF_LRCCONF_Type const * p_reg,
261 uint8_t clock);
262
263 /**
264 * @brief Function for setting the source of the specified clock.
265 *
266 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
267 * @param[in] clock Clock index.
268 * @param[in] source Clock source to be set.
269 */
270 NRF_STATIC_INLINE void nrf_lrcconf_clock_source_set(NRF_LRCCONF_Type * p_reg,
271 uint8_t clock,
272 nrf_lrcconf_clk_src_t source);
273
274 /**
275 * @brief Function for checking the status of constant latency.
276 *
277 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
278 *
279 * @retval true Constant latency enabled.
280 * @retval false Constant latency disabled, low power enabled.
281 */
282 NRF_STATIC_INLINE bool nrf_lrcconf_constlatstat_check(NRF_LRCCONF_Type const * p_reg);
283
284 /**
285 * @brief Function for setting the power domain to remain on.
286 *
287 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
288 * @param[in] domain_mask Mask of power domains to remain on.
289 * @param[in] alwayson True if forcing the power domain to remain on is to be enabled,
290 * false otherwise.
291 */
292 NRF_STATIC_INLINE
293 void nrf_lrcconf_poweron_force_set(NRF_LRCCONF_Type * p_reg,
294 nrf_lrcconf_power_domain_mask_t domain_mask,
295 bool alwayson);
296
297 /**
298 * @brief Function for checking if the power domain is configured to remain on.
299 *
300 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
301 * @param[in] domain Power domain to be checked.
302 *
303 * @retval true The domain is configured to remain on.
304 * @retval false The domain is not configured to remain on.
305 */
306 NRF_STATIC_INLINE
307 bool nrf_lrcconf_poweron_force_check(NRF_LRCCONF_Type const * p_reg,
308 nrf_lrcconf_power_domain_mask_t domain);
309
310 /**
311 * @brief Function for setting the power domain to be retained in System ON idle.
312 *
313 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
314 * @param[in] domain_mask Mask of power domains to be retained.
315 * @param[in] retain True if power domain retention is to be enabled, flase otherwise.
316 */
317 NRF_STATIC_INLINE
318 void nrf_lrcconf_retain_set(NRF_LRCCONF_Type * p_reg,
319 nrf_lrcconf_power_domain_mask_t domain_mask,
320 bool retain);
321
322 /**
323 * @brief Function for checking if the power domain is configured to be retained in System ON idle.
324 *
325 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
326 * @param[in] domain Power domain to be checked.
327 *
328 * @retval true The domain is configured to be retained.
329 * @retval false The domain is not configured to be retained.
330 */
331 NRF_STATIC_INLINE
332 bool nrf_lrcconf_retain_check(NRF_LRCCONF_Type const * p_reg,
333 nrf_lrcconf_power_domain_mask_t domain);
334
335 /**
336 * @brief Function for setting the waitstates for the AXI bridge connection.
337 *
338 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
339 * @param[in] domain Functional domain identifier.
340 * @param[in] waitstates_num Number of waitstates.
341 */
342 NRF_STATIC_INLINE void nrf_lrcconf_axi_waitstates_set(NRF_LRCCONF_Type * p_reg,
343 uint8_t domain,
344 uint8_t waitstates_num);
345
346 /**
347 * @brief Function for getting the waitstates for the AXI bridge connection.
348 *
349 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
350 * @param[in] domain Functional domain identifier.
351 *
352 * @return Number of waitstates
353 */
354 NRF_STATIC_INLINE uint8_t nrf_lrcconf_axi_waitstates_get(NRF_LRCCONF_Type const * p_reg,
355 uint8_t domain);
356 #ifndef NRF_DECLARE_ONLY
357
nrf_lrcconf_task_trigger(NRF_LRCCONF_Type * p_reg,nrf_lrcconf_task_t task)358 NRF_STATIC_INLINE void nrf_lrcconf_task_trigger(NRF_LRCCONF_Type * p_reg, nrf_lrcconf_task_t task)
359 {
360 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
361 }
362
nrf_lrcconf_task_address_get(NRF_LRCCONF_Type const * p_reg,nrf_lrcconf_task_t task)363 NRF_STATIC_INLINE uint32_t nrf_lrcconf_task_address_get(NRF_LRCCONF_Type const * p_reg,
364 nrf_lrcconf_task_t task)
365 {
366 return (uint32_t)p_reg + (uint32_t)task;
367 }
368
nrf_lrcconf_event_address_get(NRF_LRCCONF_Type const * p_reg,nrf_lrcconf_event_t event)369 NRF_STATIC_INLINE uint32_t nrf_lrcconf_event_address_get(NRF_LRCCONF_Type const * p_reg,
370 nrf_lrcconf_event_t event)
371 {
372 return (uint32_t)p_reg + (uint32_t)event;
373 }
374
nrf_lrcconf_event_clear(NRF_LRCCONF_Type * p_reg,nrf_lrcconf_event_t event)375 NRF_STATIC_INLINE void nrf_lrcconf_event_clear(NRF_LRCCONF_Type * p_reg,
376 nrf_lrcconf_event_t event)
377 {
378 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
379 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
380 }
381
nrf_lrcconf_event_check(NRF_LRCCONF_Type const * p_reg,nrf_lrcconf_event_t event)382 NRF_STATIC_INLINE bool nrf_lrcconf_event_check(NRF_LRCCONF_Type const * p_reg,
383 nrf_lrcconf_event_t event)
384 {
385 return nrf_event_check(p_reg, event);
386 }
387
nrf_lrcconf_clkstart_task_get(uint8_t index)388 NRF_STATIC_INLINE nrf_lrcconf_task_t nrf_lrcconf_clkstart_task_get(uint8_t index)
389 {
390 NRFX_ASSERT(index < NRF_LRCCONF_CLK_COUNT);
391 return (nrf_lrcconf_task_t)(NRFX_OFFSETOF(NRF_LRCCONF_Type, TASKS_REQCLKSRC[index]));
392 }
393
nrf_lrcconf_clkstop_task_get(uint8_t index)394 NRF_STATIC_INLINE nrf_lrcconf_task_t nrf_lrcconf_clkstop_task_get(uint8_t index)
395 {
396 NRFX_ASSERT(index < NRF_LRCCONF_CLK_COUNT);
397 return (nrf_lrcconf_task_t)(NRFX_OFFSETOF(NRF_LRCCONF_Type, TASKS_STOPREQCLKSRC[index]));
398 }
399
nrf_lrcconf_clkstarted_event_get(uint8_t index)400 NRF_STATIC_INLINE nrf_lrcconf_event_t nrf_lrcconf_clkstarted_event_get(uint8_t index)
401 {
402 NRFX_ASSERT(index < NRF_LRCCONF_CLK_COUNT);
403 return (nrf_lrcconf_event_t)(NRFX_OFFSETOF(NRF_LRCCONF_Type, EVENTS_CLKSRCSTARTED[index]));
404 }
405
406 NRF_STATIC_INLINE
nrf_lrcconf_power_domain_on_get(uint8_t index)407 nrf_lrcconf_power_domain_mask_t nrf_lrcconf_power_domain_on_get(uint8_t index)
408 {
409 NRFX_ASSERT(index < 8);
410 return (nrf_lrcconf_power_domain_mask_t)(LRCCONF_POWERON_ACTIVE0_Msk << index);
411 }
412
nrf_lrcconf_clock_run_status_check(NRF_LRCCONF_Type const * p_reg,uint8_t clock)413 NRF_STATIC_INLINE bool nrf_lrcconf_clock_run_status_check(NRF_LRCCONF_Type const * p_reg,
414 uint8_t clock)
415 {
416 NRFX_ASSERT(clock < NRF_LRCCONF_CLK_COUNT);
417 return p_reg->CLKSTAT[clock].RUN & LRCCONF_CLKSTAT_RUN_STATUS_Msk;
418 }
419
420 NRF_STATIC_INLINE
nrf_lrcconf_clock_source_get(NRF_LRCCONF_Type const * p_reg,uint8_t clock)421 nrf_lrcconf_clk_src_t nrf_lrcconf_clock_source_get(NRF_LRCCONF_Type const * p_reg,
422 uint8_t clock)
423 {
424 NRFX_ASSERT(clock < NRF_LRCCONF_CLK_COUNT);
425 return (nrf_lrcconf_clk_src_t)((p_reg->CLKSTAT[clock].SRC & LRCCONF_CLKSTAT_SRC_SRC_Msk) >>
426 LRCCONF_CLKSTAT_SRC_SRC_Pos);
427 }
428
nrf_lrcconf_clock_always_run_force_set(NRF_LRCCONF_Type * p_reg,uint8_t clock,bool alwaysrun)429 NRF_STATIC_INLINE void nrf_lrcconf_clock_always_run_force_set(NRF_LRCCONF_Type * p_reg,
430 uint8_t clock,
431 bool alwaysrun)
432 {
433 NRFX_ASSERT(clock < NRF_LRCCONF_CLK_COUNT);
434 p_reg->CLKCTRL[clock].ALWAYSRUN = alwaysrun ?
435 LRCCONF_CLKCTRL_ALWAYSRUN_FORCE_AlwaysRun :
436 LRCCONF_CLKCTRL_ALWAYSRUN_FORCE_Automatic;
437 }
438
nrf_lrcconf_clock_always_run_check(NRF_LRCCONF_Type const * p_reg,uint8_t clock)439 NRF_STATIC_INLINE bool nrf_lrcconf_clock_always_run_check(NRF_LRCCONF_Type const * p_reg,
440 uint8_t clock)
441 {
442 NRFX_ASSERT(clock < NRF_LRCCONF_CLK_COUNT);
443 return p_reg->CLKCTRL[clock].ALWAYSRUN & LRCCONF_CLKCTRL_ALWAYSRUN_FORCE_AlwaysRun;
444 }
445
nrf_lrcconf_clock_source_set(NRF_LRCCONF_Type * p_reg,uint8_t clock,nrf_lrcconf_clk_src_t source)446 NRF_STATIC_INLINE void nrf_lrcconf_clock_source_set(NRF_LRCCONF_Type * p_reg,
447 uint8_t clock,
448 nrf_lrcconf_clk_src_t source)
449 {
450 NRFX_ASSERT(clock < NRF_LRCCONF_CLK_COUNT);
451 p_reg->CLKCTRL[clock].SRC = ((p_reg->CLKCTRL[clock].SRC & ~LRCCONF_CLKCTRL_SRC_SRC_Msk) |
452 ((source << LRCCONF_CLKCTRL_SRC_SRC_Pos) & LRCCONF_CLKCTRL_SRC_SRC_Msk));
453 }
454
nrf_lrcconf_constlatstat_check(NRF_LRCCONF_Type const * p_reg)455 NRF_STATIC_INLINE bool nrf_lrcconf_constlatstat_check(NRF_LRCCONF_Type const * p_reg)
456 {
457 return p_reg->CONSTLATSTAT & LRCCONF_CONSTLATSTAT_STATUS_Msk;
458 }
459
460 NRF_STATIC_INLINE
nrf_lrcconf_poweron_force_set(NRF_LRCCONF_Type * p_reg,nrf_lrcconf_power_domain_mask_t domain_mask,bool alwayson)461 void nrf_lrcconf_poweron_force_set(NRF_LRCCONF_Type * p_reg,
462 nrf_lrcconf_power_domain_mask_t domain_mask,
463 bool alwayson)
464 {
465 p_reg->POWERON = ((p_reg->POWERON & ~domain_mask) | (alwayson ? domain_mask : 0));
466 }
467
468 NRF_STATIC_INLINE
nrf_lrcconf_poweron_force_check(NRF_LRCCONF_Type const * p_reg,nrf_lrcconf_power_domain_mask_t domain)469 bool nrf_lrcconf_poweron_force_check(NRF_LRCCONF_Type const * p_reg,
470 nrf_lrcconf_power_domain_mask_t domain)
471 {
472 return p_reg->POWERON & domain;
473 }
474
475 NRF_STATIC_INLINE
nrf_lrcconf_retain_set(NRF_LRCCONF_Type * p_reg,nrf_lrcconf_power_domain_mask_t domain_mask,bool retain)476 void nrf_lrcconf_retain_set(NRF_LRCCONF_Type * p_reg,
477 nrf_lrcconf_power_domain_mask_t domain_mask,
478 bool retain)
479 {
480 p_reg->RETAIN = ((p_reg->RETAIN & ~domain_mask) | (retain ? domain_mask : 0));
481 }
482
483 NRF_STATIC_INLINE
nrf_lrcconf_retain_check(NRF_LRCCONF_Type const * p_reg,nrf_lrcconf_power_domain_mask_t domain)484 bool nrf_lrcconf_retain_check(NRF_LRCCONF_Type const * p_reg,
485 nrf_lrcconf_power_domain_mask_t domain)
486 {
487 return p_reg->RETAIN & domain;
488 }
489
nrf_lrcconf_axi_waitstates_set(NRF_LRCCONF_Type * p_reg,uint8_t domain,uint8_t waitstates_num)490 NRF_STATIC_INLINE void nrf_lrcconf_axi_waitstates_set(NRF_LRCCONF_Type * p_reg,
491 uint8_t domain,
492 uint8_t waitstates_num)
493 {
494 NRFX_ASSERT(domain < NRF_LRCCONF_AXI_WAITSTATES_ARRAY_SIZE);
495 NRFX_ASSERT(waitstates_num <=
496 (LRCCONF_AX2XWAITSTATES_WAITSTATES_Msk >> LRCCONF_AX2XWAITSTATES_WAITSTATES_Pos));
497 p_reg->AX2XWAITSTATES[domain] = ((uint32_t)waitstates_num <<
498 LRCCONF_AX2XWAITSTATES_WAITSTATES_Pos) &
499 LRCCONF_AX2XWAITSTATES_WAITSTATES_Msk;
500 }
501
nrf_lrcconf_axi_waitstates_get(NRF_LRCCONF_Type const * p_reg,uint8_t domain)502 NRF_STATIC_INLINE uint8_t nrf_lrcconf_axi_waitstates_get(NRF_LRCCONF_Type const * p_reg,
503 uint8_t domain)
504 {
505 NRFX_ASSERT(domain < NRF_LRCCONF_AXI_WAITSTATES_ARRAY_SIZE);
506 return (uint8_t)((p_reg->AX2XWAITSTATES[domain] & LRCCONF_AX2XWAITSTATES_WAITSTATES_Msk) >>
507 LRCCONF_AX2XWAITSTATES_WAITSTATES_Pos);
508 }
509 #endif // NRF_DECLARE_ONLY
510
511 /** @} */
512
513 #ifdef __cplusplus
514 }
515 #endif
516
517 #endif // NRF_LRCCONF_H__
518
519
