1 /*
2  * Copyright (c) 2023 - 2024, Nordic Semiconductor ASA
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are met:
9  *
10  * 1. Redistributions of source code must retain the above copyright notice, this
11  *    list of conditions and the following disclaimer.
12  *
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * 3. Neither the name of the copyright holder nor the names of its
18  *    contributors may be used to endorse or promote products derived from this
19  *    software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #ifndef NRF_CTRLAP_H__
35 #define NRF_CTRLAP_H__
36 
37 #include <nrfx.h>
38 
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42 
43 /**
44  * @defgroup nrf_ctrlap_hal CTRL-AP HAL
45  * @{
46  * @ingroup nrf_ctrlap
47  * @brief   Hardware access layer for managing the Control Access Port (CTRL-AP) peripheral.
48  */
49 
50 /** @brief CTRLAP events. */
51 typedef enum
52 {
53     NRF_CTRLAP_EVENT_RXREADY = offsetof(NRF_CTRLAPPERI_Type, EVENTS_RXREADY), ///< New data from the peer is available.
54     NRF_CTRLAP_EVENT_TXDONE  = offsetof(NRF_CTRLAPPERI_Type, EVENTS_TXDONE),  ///< Data has been read by the peer.
55 } nrf_ctrlap_event_t;
56 
57 /** @brief CTRLAP interrupts. */
58 typedef enum
59 {
60     NRF_CTRLAP_INT_RXREADY_MASK = CTRLAPPERI_INTENSET_RXREADY_Msk, ///< Interrupt on RXREADY event.
61     NRF_CTRLAP_INT_TXDONE_MASK  = CTRLAPPERI_INTENSET_TXDONE_Msk,  ///< Interrupt on TXDONE event.
62 } nrf_ctrlap_int_mask_t;
63 
64 /** @brief CTRLAP device information. */
65 typedef struct
66 {
67     uint32_t partno;      ///< Part number of the device, this information is retained on system on idle.
68     uint32_t hw_revision; ///< Hardware Revision of the device, this information is retained on system on idle.
69     bool     ready;       ///< Set when INFO registers update is completed.
70 } nrf_ctrlap_info_t;
71 
72 /** @brief CTRLAP secure domain boot mode. */
73 typedef enum
74 {
75     NRF_CTRLAP_MODE_NORMAL        = CTRLAPPERI_MAILBOX_BOOTMODE_MODE_Normal,       ///< Normal mode of operation.
76     NRF_CTRLAP_MODE_ROM_OPERATION = CTRLAPPERI_MAILBOX_BOOTMODE_MODE_ROMOperation, ///< ROM operation mode.
77 } nrf_ctrlap_bootmode_t;
78 
79 /**
80  * @brief Function for clearing the specified CTRLAP event.
81  *
82  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
83  * @param[in] event Event to clear.
84  */
85 NRF_STATIC_INLINE void nrf_ctrlap_event_clear(NRF_CTRLAPPERI_Type * p_reg,
86                                               nrf_ctrlap_event_t    event);
87 
88 /**
89  * @brief Function for retrieving the state of the CTRLAP event.
90  *
91  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
92  * @param[in] event Event to be checked.
93  *
94  * @retval true  The event has been generated.
95  * @retval false The event has not been generated.
96  */
97 NRF_STATIC_INLINE bool nrf_ctrlap_event_check(NRF_CTRLAPPERI_Type const * p_reg,
98                                               nrf_ctrlap_event_t          event);
99 
100 /**
101  * @brief Function for getting the address of the specified CTRLAP event register.
102  *
103  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
104  * @param[in] event Requested event.
105  *
106  * @retval Address of the specified event register.
107  */
108 NRF_STATIC_INLINE uint32_t nrf_ctrlap_event_address_get(NRF_CTRLAPPERI_Type const * p_reg,
109                                                         nrf_ctrlap_event_t          event);
110 
111 /**
112  * @brief Function for enabling the specified interrupts.
113  *
114  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
115  * @param[in] mask  Mask of interrupts to be enabled.
116  *                  Use @ref nrf_ctrlap_int_mask_t values for bit masking.
117  */
118 NRF_STATIC_INLINE void nrf_ctrlap_int_enable(NRF_CTRLAPPERI_Type * p_reg, uint32_t mask);
119 
120 /**
121  * @brief Function for disabling the specified interrupts.
122  *
123  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
124  * @param[in] mask  Mask of interrupts to be disabled.
125  *                  Use @ref nrf_ctrlap_int_mask_t values for bit masking.
126  */
127 NRF_STATIC_INLINE void nrf_ctrlap_int_disable(NRF_CTRLAPPERI_Type * p_reg, uint32_t mask);
128 
129 /**
130  * @brief Function for checking if the specified interrupts are enabled.
131  *
132  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
133  * @param[in] mask  Mask of interrupts to be checked.
134  *                  Use @ref nrf_ctrlap_int_mask_t values for bit masking.
135  *
136  * @retval Mask of enabled interrupts.
137  */
138 NRF_STATIC_INLINE uint32_t nrf_ctrlap_int_enable_check(NRF_CTRLAPPERI_Type const * p_reg,
139                                                        uint32_t                    mask);
140 
141 /**
142  * @brief Function for retrieving the state of pending interrupts.
143  *
144  * @note States of pending interrupt are saved as a bitmask.
145  *       One set at particular position means that interrupt for event is pending.
146  *
147  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
148  *
149  * @retval Bitmask with information about pending interrupts.
150  *         Use @ref nrf_ctrlap_int_mask_t values for bit masking.
151  */
152 NRF_STATIC_INLINE uint32_t nrf_ctrlap_int_pending_get(NRF_CTRLAPPERI_Type const * p_reg);
153 
154 /**
155  * @brief Function for reading data sent from the debugger to the CPU.
156  *
157  * @note Reading from this register will clear pending status of RX.
158  *
159  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
160  *
161  * @retval Data sent from the debugger to the CPU.
162  */
163 NRF_STATIC_INLINE uint32_t nrf_ctrlap_mailbox_rxdata_get(NRF_CTRLAPPERI_Type const * p_reg);
164 
165 /**
166  * @brief Function for checking if data sent from the debugger to the CPU has been read.
167  *
168  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
169  *
170  * @retval true  Data pending in register RXDATA.
171  * @retval false No data pending in register RXDATA.
172  */
173 NRF_STATIC_INLINE bool nrf_ctrlap_mailbox_rxstatus_pending_check(NRF_CTRLAPPERI_Type const * p_reg);
174 
175 /**
176  * @brief Function for reading data sent from CPU to debugger.
177  *
178  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
179  *
180  * @retval Data sent from the CPU to the debugger.
181  */
182 NRF_STATIC_INLINE uint32_t nrf_ctrlap_mailbox_txdata_get(NRF_CTRLAPPERI_Type const * p_reg);
183 
184 /**
185  * @brief Function for writing data sent from CPU to debugger.
186  *
187  * @details Writing to this register will automatically set field @p DataPending in register @p TXSTATUS.
188  *
189  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
190  * @param[in] data  Data to send.
191  */
192 NRF_STATIC_INLINE void nrf_ctrlap_mailbox_txdata_set(NRF_CTRLAPPERI_Type * p_reg,
193                                                      uint32_t              data);
194 
195 /**
196  * @brief Function for checking if data sent from the CPU to the debugger has been read.
197  *
198  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
199  *
200  * @retval true  Data pending in register TXDATA.
201  * @retval false No data pending in register TXDATA.
202  */
203 NRF_STATIC_INLINE bool nrf_ctrlap_mailbox_txstatus_pending_check(NRF_CTRLAPPERI_Type const * p_reg);
204 
205 /**
206  * @brief Function for checking boot mode.
207  *
208  * @note If ROM operation mode is set the MAILBOX is used to communicate the secure ROM operations.
209  *
210  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
211  *
212  * @return Boot mode.
213  */
214 NRF_STATIC_INLINE nrf_ctrlap_bootmode_t
215 nrf_ctrlap_mailbox_bootmode_get(NRF_CTRLAPPERI_Type const * p_reg);
216 
217 /**
218  * @brief Function for setting the CTRLAP device information.
219  *
220  * @param[in] p_reg  Pointer to the structure of registers of the peripheral.
221  * @param[in] p_data Pointer to the device information structure.
222  */
223 NRF_STATIC_INLINE void nrf_ctrlap_info_set(NRF_CTRLAPPERI_Type  *    p_reg,
224                                            nrf_ctrlap_info_t const * p_data);
225 
226 /**
227  * @brief Function for getting the CTRLAP device information.
228  *
229  * @param[in]  p_reg  Pointer to the structure of registers of the peripheral.
230  * @param[out] p_data Pointer to the data structure to be filled with device information.
231  */
232 NRF_STATIC_INLINE void nrf_ctrlap_info_get(NRF_CTRLAPPERI_Type const * p_reg,
233                                            nrf_ctrlap_info_t *         p_data);
234 
235 #ifndef NRF_DECLARE_ONLY
236 
nrf_ctrlap_event_clear(NRF_CTRLAPPERI_Type * p_reg,nrf_ctrlap_event_t event)237 NRF_STATIC_INLINE void nrf_ctrlap_event_clear(NRF_CTRLAPPERI_Type * p_reg, nrf_ctrlap_event_t event)
238 {
239     *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
240     nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
241 }
242 
nrf_ctrlap_event_check(NRF_CTRLAPPERI_Type const * p_reg,nrf_ctrlap_event_t event)243 NRF_STATIC_INLINE bool nrf_ctrlap_event_check(NRF_CTRLAPPERI_Type const * p_reg,
244                                               nrf_ctrlap_event_t          event)
245 {
246     return nrf_event_check(p_reg, event);
247 }
248 
nrf_ctrlap_event_address_get(NRF_CTRLAPPERI_Type const * p_reg,nrf_ctrlap_event_t event)249 NRF_STATIC_INLINE uint32_t nrf_ctrlap_event_address_get(NRF_CTRLAPPERI_Type const * p_reg,
250                                                         nrf_ctrlap_event_t          event)
251 {
252     return ((uint32_t)p_reg + (uint32_t)event);
253 }
254 
nrf_ctrlap_int_enable(NRF_CTRLAPPERI_Type * p_reg,uint32_t mask)255 NRF_STATIC_INLINE void nrf_ctrlap_int_enable(NRF_CTRLAPPERI_Type * p_reg, uint32_t mask)
256 {
257     p_reg->INTENSET = mask;
258 }
259 
nrf_ctrlap_int_disable(NRF_CTRLAPPERI_Type * p_reg,uint32_t mask)260 NRF_STATIC_INLINE void nrf_ctrlap_int_disable(NRF_CTRLAPPERI_Type * p_reg, uint32_t mask)
261 {
262     p_reg->INTENCLR = mask;
263 }
264 
nrf_ctrlap_int_enable_check(NRF_CTRLAPPERI_Type const * p_reg,uint32_t mask)265 NRF_STATIC_INLINE uint32_t nrf_ctrlap_int_enable_check(NRF_CTRLAPPERI_Type const * p_reg,
266                                                        uint32_t                    mask)
267 {
268     return p_reg->INTENSET & mask;
269 }
270 
nrf_ctrlap_int_pending_get(NRF_CTRLAPPERI_Type const * p_reg)271 NRF_STATIC_INLINE uint32_t nrf_ctrlap_int_pending_get(NRF_CTRLAPPERI_Type const * p_reg)
272 {
273     return p_reg->INTPEND;
274 }
275 
nrf_ctrlap_mailbox_rxdata_get(NRF_CTRLAPPERI_Type const * p_reg)276 NRF_STATIC_INLINE uint32_t nrf_ctrlap_mailbox_rxdata_get(NRF_CTRLAPPERI_Type const * p_reg)
277 {
278     return p_reg->MAILBOX.RXDATA;
279 }
280 
nrf_ctrlap_mailbox_rxstatus_pending_check(NRF_CTRLAPPERI_Type const * p_reg)281 NRF_STATIC_INLINE bool nrf_ctrlap_mailbox_rxstatus_pending_check(NRF_CTRLAPPERI_Type const * p_reg)
282 {
283     return (bool)p_reg->MAILBOX.RXSTATUS;
284 }
285 
nrf_ctrlap_mailbox_txdata_get(NRF_CTRLAPPERI_Type const * p_reg)286 NRF_STATIC_INLINE uint32_t nrf_ctrlap_mailbox_txdata_get(NRF_CTRLAPPERI_Type const * p_reg)
287 {
288     return p_reg->MAILBOX.TXDATA;
289 }
290 
nrf_ctrlap_mailbox_txdata_set(NRF_CTRLAPPERI_Type * p_reg,uint32_t data)291 NRF_STATIC_INLINE void nrf_ctrlap_mailbox_txdata_set(NRF_CTRLAPPERI_Type * p_reg,
292                                                      uint32_t              data)
293 {
294     p_reg->MAILBOX.TXDATA = data;
295 }
296 
nrf_ctrlap_mailbox_txstatus_pending_check(NRF_CTRLAPPERI_Type const * p_reg)297 NRF_STATIC_INLINE bool nrf_ctrlap_mailbox_txstatus_pending_check(NRF_CTRLAPPERI_Type const * p_reg)
298 {
299     return (bool)p_reg->MAILBOX.TXSTATUS;
300 }
301 
302 NRF_STATIC_INLINE nrf_ctrlap_bootmode_t
nrf_ctrlap_mailbox_bootmode_get(NRF_CTRLAPPERI_Type const * p_reg)303 nrf_ctrlap_mailbox_bootmode_get(NRF_CTRLAPPERI_Type const * p_reg)
304 {
305     return (nrf_ctrlap_bootmode_t)p_reg->MAILBOX.BOOTMODE;
306 }
307 
nrf_ctrlap_info_set(NRF_CTRLAPPERI_Type * p_reg,nrf_ctrlap_info_t const * p_data)308 NRF_STATIC_INLINE void nrf_ctrlap_info_set(NRF_CTRLAPPERI_Type *     p_reg,
309                                            nrf_ctrlap_info_t const * p_data)
310 {
311     p_reg->INFO.PARTNO     = p_data->partno;
312     p_reg->INFO.HWREVISION = p_data->hw_revision;
313     p_reg->INFO.READY      = !p_data->ready;
314 }
315 
nrf_ctrlap_info_get(NRF_CTRLAPPERI_Type const * p_reg,nrf_ctrlap_info_t * p_data)316 NRF_STATIC_INLINE void nrf_ctrlap_info_get(NRF_CTRLAPPERI_Type const * p_reg,
317                                            nrf_ctrlap_info_t *         p_data)
318 {
319     p_data->partno      = p_reg->INFO.PARTNO;
320     p_data->hw_revision = p_reg->INFO.HWREVISION;
321     p_data->ready       = !p_reg->INFO.READY;
322 }
323 
324 #endif // NRF_DECLARE_ONLY
325 
326 /** @} */
327 
328 #ifdef __cplusplus
329 }
330 #endif
331 
332 #endif // NRF_CTRLAP_H__
333