1 /*
2 * Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_CLOCK_H__
35 #define NRF_CLOCK_H__
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 /**
44 * @defgroup nrf_clock_hal Clock HAL
45 * @{
46 * @ingroup nrf_clock
47 * @brief Hardware access layer for managing the CLOCK peripheral.
48 *
49 * This code can be used to manage low-frequency clock (LFCLK), high-frequency clock (HFCLK),
50 * high-frequency 192 MHz clock (HFCLK192M) and high-frequency audio clock (HFCLKAUDIO)
51 * settings.
52 */
53
54 #if defined(CLOCK_LFCLKSRC_BYPASS_Msk) && defined(CLOCK_LFCLKSRC_EXTERNAL_Msk)
55 // Enable support for external LFCLK sources. Read more in the Product Specification.
56 #define NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES
57 #endif
58
59 #if defined(CLOCK_INTENSET_DONE_Msk) || defined(__NRFX_DOXYGEN__)
60 /** @brief Symbol indicating whether the Low Frequency Clock calibration is present. */
61 #define NRF_CLOCK_HAS_CALIBRATION 1
62 #else
63 #define NRF_CLOCK_HAS_CALIBRATION 0
64 #endif
65
66 #if defined(CLOCK_CTIV_CTIV_Msk) || defined(__NRFX_DOXYGEN__)
67 /** @brief Symbol indicating whether the Low Frequency Clock calibration timer is present. */
68 #define NRF_CLOCK_HAS_CALIBRATION_TIMER 1
69 #else
70 #define NRF_CLOCK_HAS_CALIBRATION_TIMER 0
71 #endif
72
73 #if (defined(CLOCK_INTENSET_HFCLK192MSTARTED_Msk) && !defined(NRF5340_XXAA_NETWORK)) \
74 || defined(__NRFX_DOXYGEN__)
75 /** @brief Symbol indicating whether the 192 MHz clock is present. */
76 #define NRF_CLOCK_HAS_HFCLK192M 1
77 #else
78 #define NRF_CLOCK_HAS_HFCLK192M 0
79 #endif
80
81 #if (defined(CLOCK_INTENSET_HFCLKAUDIOSTARTED_Msk) && !defined(NRF5340_XXAA_NETWORK)) \
82 || defined(__NRFX_DOXYGEN__)
83 /** @brief Symbol indicating whether the Audio clock is present. */
84 #define NRF_CLOCK_HAS_HFCLKAUDIO 1
85 #else
86 #define NRF_CLOCK_HAS_HFCLKAUDIO 0
87 #endif
88
89 #if (defined(CLOCK_HFCLKCTRL_HCLK_Div1) && !defined(NRF5340_XXAA_NETWORK)) \
90 || defined(__NRFX_DOXYGEN__)
91 /** @brief Symbol indicating whether the HFCLK frequency configuration is present. */
92 #define NRF_CLOCK_HAS_HFCLK_DIV 1
93 #else
94 #define NRF_CLOCK_HAS_HFCLK_DIV 0
95 #endif
96
97 #if defined(CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Msk) || defined(CLOCK_LFCLK_ALWAYSRUN_ALWAYSRUN_Msk) || \
98 defined(__NRFX_DOXYGEN__)
99 /** @brief Symbol indicating whether the ALWAYSRUN register is present for LFCLK. */
100 #define NRF_CLOCK_HAS_LFCLK_ALWAYSRUN 1
101 #else
102 #define NRF_CLOCK_HAS_LFCLK_ALWAYSRUN 0
103 #endif
104
105 #if defined(CLOCK_HFCLKALWAYSRUN_ALWAYSRUN_Msk) || defined(__NRFX_DOXYGEN__)
106 /** @brief Symbol indicating whether the ALWAYSRUN register is present for HFCLK. */
107 #define NRF_CLOCK_HAS_HFCLK_ALWAYSRUN 1
108 #else
109 #define NRF_CLOCK_HAS_HFCLK_ALWAYSRUN 0
110 #endif
111
112 #if defined(CLOCK_HFCLKSRC_SRC_Msk) || defined(__NRFX_DOXYGEN__)
113 /** @brief Symbol indicating whether the HFCLKSRC register is present. */
114 #define NRF_CLOCK_HAS_HFCLKSRC 1
115 #else
116 #define NRF_CLOCK_HAS_HFCLKSRC 0
117 #endif
118
119 #if defined(CLOCK_TASKS_PLLSTART_TASKS_PLLSTART_Msk) || defined(__NRFX_DOXYGEN__)
120 /** @brief Symbol indicating whether the PLL section is present. */
121 #define NRF_CLOCK_HAS_PLL 1
122 #else
123 #define NRF_CLOCK_HAS_PLL 0
124 #endif
125
126 #if defined(CLOCK_TASKS_XOSTART_TASKS_XOSTART_Msk) || defined(__NRFX_DOXYGEN__)
127 /** @brief Symbol indicating whether XO registers are present. */
128 #define NRF_CLOCK_HAS_XO 1
129 #else
130 #define NRF_CLOCK_HAS_XO 0
131 #endif
132
133 #if defined(CLOCK_LFCLK_SRC_SRC_Msk) || defined(__NRFX_DOXYGEN__)
134 /** @brief Symbol indicating whether the CLOCK type contains LFCLK subtype. */
135 #define NRF_CLOCK_HAS_LFCLK_TYPE 1
136 #else
137 #define NRF_CLOCK_HAS_LFCLK_TYPE 0
138 #endif
139
140 #if NRF_CLOCK_HAS_LFCLK_TYPE
141 #define NRF_CLOCK_LFCLKRUN_STATUS_NotTriggered CLOCK_LFCLK_RUN_STATUS_NotTriggered /**< Task LFCLKSTART/HFCLKSTART has not been triggered definiton. */
142 #define NRF_CLOCK_LFCLKRUN_STATUS_Triggered CLOCK_LFCLK_RUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */
143 #define NRF_CLOCK_INTENSET_LFCLKSTARTED_Msk CLOCK_INTENSET_LFCLKSTARTED_Msk /**< Interrupt on LFCLKSTARTED event mask definition. */
144 #define NRF_LFCLKSRCCOPY LFCLK.SRCCOPY /**< LF clock SRCCOPY register definition. */
145 #define NRF_LFCLKRUN LFCLK.RUN /**< LF clock RUN register definition. */
146 #define NRF_LFCLKSTAT LFCLK.STAT /**< LF clock STAT register definition. */
147 #define NRF_LFCLKSRC LFCLK.SRC /**< LF clock SRC register definition. */
148 #define NRF_LFCLKALWAYSRUN LFCLK.ALWAYSRUN /**< LF clock ALWAYSRUN register definition. */
149 #define NRF_CLOCK_LFCLKSRCCOPY_SRC_Msk CLOCK_LFCLK_SRCCOPY_SRC_Msk /**< LF clock SRCCOPY status mask definition. */
150 #define NRF_CLOCK_LFCLKSRCCOPY_SRC_Pos CLOCK_LFCLK_SRCCOPY_SRC_Pos /**< LF clock SRCCOPY status position definition. */
151 #define NRF_CLOCK_LFCLKRUN_STATUS_Msk CLOCK_LFCLK_RUN_STATUS_Msk /**< LF clock RUN status mask definition. */
152 #define NRF_CLOCK_LFCLKRUN_STATUS_Pos CLOCK_LFCLK_RUN_STATUS_Pos /**< LF clock RUN status position definition. */
153 #define NRF_CLOCK_LFCLKSTAT_SRC_Msk CLOCK_LFCLK_STAT_SRC_Msk /**< LF clock STAT source mask definition. */
154 #define NRF_CLOCK_LFCLKSTAT_SRC_Pos CLOCK_LFCLK_STAT_SRC_Pos /**< LF clock STAT source position definition. */
155 #define NRF_CLOCK_LFCLKSTAT_STATE_Msk CLOCK_LFCLK_STAT_STATE_Msk /**< LF clock STAT state mask definition. */
156 #define NRF_CLOCK_LFCLKSTAT_STATE_Pos CLOCK_LFCLK_STAT_STATE_Pos /**< LF clock STAT state position definition. */
157 #define NRF_CLOCK_LFCLKSTAT_ALWAYSRUNNING_Msk CLOCK_LFCLK_STAT_ALWAYSRUNNING_Msk /**< LF clock STAT alwaysrunning position definition. */
158 #define NRF_CLOCK_LFCLKSTAT_ALWAYSRUNNING_Pos CLOCK_LFCLK_STAT_ALWAYSRUNNING_Pos /**< LF clock STAT alwaysrunning mask definition. */
159 #define NRF_CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Msk CLOCK_LFCLK_ALWAYSRUN_ALWAYSRUN_Msk /**< LF clock ALWAYSRUN position definition. */
160 #define NRF_CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Pos CLOCK_LFCLK_ALWAYSRUN_ALWAYSRUN_Pos /**< LF clock ALWAYSRUN mask definition. */
161 #else
162 #define NRF_CLOCK_LFCLKRUN_STATUS_NotTriggered CLOCK_LFCLKRUN_STATUS_NotTriggered
163 #define NRF_CLOCK_LFCLKRUN_STATUS_Triggered CLOCK_LFCLKRUN_STATUS_Triggered
164 #define NRF_CLOCK_INTENSET_LFCLKSTARTED_Msk CLOCK_INTENSET_LFCLKSTARTED_Msk
165 #define NRF_LFCLKSRCCOPY LFCLKSRCCOPY
166 #define NRF_LFCLKRUN LFCLKRUN
167 #define NRF_LFCLKSTAT LFCLKSTAT
168 #define NRF_LFCLKSRC LFCLKSRC
169 #define NRF_LFCLKALWAYSRUN LFCLKALWAYSRUN
170 #define NRF_CLOCK_LFCLKSRCCOPY_SRC_Msk CLOCK_LFCLKSRCCOPY_SRC_Msk
171 #define NRF_CLOCK_LFCLKSRCCOPY_SRC_Pos CLOCK_LFCLKSRCCOPY_SRC_Pos
172 #define NRF_CLOCK_LFCLKRUN_STATUS_Msk CLOCK_LFCLKRUN_STATUS_Msk
173 #define NRF_CLOCK_LFCLKRUN_STATUS_Pos CLOCK_LFCLKRUN_STATUS_Pos
174 #define NRF_CLOCK_LFCLKSTAT_SRC_Msk CLOCK_LFCLKSTAT_SRC_Msk
175 #define NRF_CLOCK_LFCLKSTAT_SRC_Pos CLOCK_LFCLKSTAT_SRC_Pos
176 #define NRF_CLOCK_LFCLKSTAT_STATE_Msk CLOCK_LFCLKSTAT_STATE_Msk
177 #define NRF_CLOCK_LFCLKSTAT_STATE_Pos CLOCK_LFCLKSTAT_STATE_Pos
178 #define NRF_CLOCK_LFCLKSTAT_ALWAYSRUNNING_Msk CLOCK_LFCLKSTAT_ALWAYSRUNNING_Msk
179 #define NRF_CLOCK_LFCLKSTAT_ALWAYSRUNNING_Pos CLOCK_LFCLKSTAT_ALWAYSRUNNING_Pos
180 #define NRF_CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Msk CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Msk
181 #define NRF_CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Pos CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Pos
182 #endif
183
184 #if NRF_CLOCK_HAS_XO
185 #define NRF_CLOCK_INTENSET_HFCLKSTARTED_Msk CLOCK_INTEN_XOSTARTED_Msk /**< HF clock bit mask in interrupt register. */
186 #define NRF_TASKS_HFCLKSTART TASKS_XOSTART /**< Task HF clock start definition. */
187 #define NRF_TASKS_HFCLKSTOP TASKS_XOSTOP /**< Task HF clock stop definition. */
188 #define NRF_EVENTS_HFCLKSTARTED EVENTS_XOSTARTED /**< Event HF clock startrd definition. */
189 #define NRF_HFCLKRUN XO.RUN /**< HF clock RUN register definition. */
190 #define NRF_HFCLKSTAT XO.STAT /**< HF clock STAT register definition. */
191 #define NRF_CLOCK_HFCLKRUN_STATUS_Msk CLOCK_XO_RUN_STATUS_Msk /**< HF clock RUN status mask definition. */
192 #define NRF_CLOCK_HFCLKRUN_STATUS_Pos CLOCK_XO_RUN_STATUS_Pos /**< HF clock RUN status position definition. */
193 #define NRF_CLOCK_HFCLKSTAT_STATE_Msk CLOCK_XO_STAT_STATE_Msk /**< HF clock STAT state mask definition. */
194 #define NRF_CLOCK_HFCLKSTAT_STATE_Pos CLOCK_XO_STAT_STATE_Pos /**< HF clock STAT state position definition. */
195 #else
196 #define NRF_CLOCK_INTENSET_HFCLKSTARTED_Msk CLOCK_INTENSET_HFCLKSTARTED_Msk
197 #define NRF_TASKS_HFCLKSTART TASKS_HFCLKSTART
198 #define NRF_TASKS_HFCLKSTOP TASKS_HFCLKSTOP
199 #define NRF_EVENTS_HFCLKSTARTED EVENTS_HFCLKSTARTED
200 #define NRF_HFCLKRUN HFCLKRUN
201 #define NRF_HFCLKSTAT HFCLKSTAT
202 #define NRF_CLOCK_HFCLKRUN_STATUS_Msk CLOCK_HFCLKRUN_STATUS_Msk
203 #define NRF_CLOCK_HFCLKRUN_STATUS_Pos CLOCK_HFCLKRUN_STATUS_Pos
204 #define NRF_CLOCK_HFCLKSTAT_STATE_Msk CLOCK_HFCLKSTAT_STATE_Msk
205 #define NRF_CLOCK_HFCLKSTAT_STATE_Pos CLOCK_HFCLKSTAT_STATE_Pos
206 #endif
207
208 /**
209 * @brief Low-frequency clock sources.
210 * @details Used by LFCLKSRC, LFCLKSTAT, and LFCLKSRCCOPY registers.
211 */
212 typedef enum
213 {
214 #if defined(CLOCK_LFCLKSRC_SRC_LFULP) || defined(__NRFX_DOXYGEN__)
215 NRF_CLOCK_LFCLK_LFULP = CLOCK_LFCLKSRC_SRC_LFULP, /**< Internal 32 kHz Ultra-low power oscillator. */
216 #endif
217
218 #if defined(CLOCK_LFCLKSRC_SRC_RC) || defined(__NRFX_DOXYGEN__)
219 NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_RC, /**< Internal 32 kHz RC oscillator. */
220 #elif NRF_CLOCK_HAS_LFCLK_TYPE
221 NRF_CLOCK_LFCLK_RC = CLOCK_LFCLK_SRC_SRC_LFRC, /**< Internal 32 kHz RC oscillator. */
222 #else
223 NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_LFRC, /**< Internal 32 kHz RC oscillator. */
224 #endif
225
226 #if defined(CLOCK_LFCLKSRC_SRC_Xtal) || defined(__NRFX_DOXYGEN__)
227 NRF_CLOCK_LFCLK_XTAL = CLOCK_LFCLKSRC_SRC_Xtal, /**< External 32 kHz crystal. */
228 #elif NRF_CLOCK_HAS_LFCLK_TYPE
229 NRF_CLOCK_LFCLK_XTAL = CLOCK_LFCLK_SRC_SRC_LFXO, /**< External 32 kHz crystal. */
230 #else
231 NRF_CLOCK_LFCLK_XTAL = CLOCK_LFCLKSRC_SRC_LFXO, /**< External 32 kHz crystal. */
232 #endif
233
234 #if defined(CLOCK_LFCLKSRC_SRC_Synth) || defined(__NRFX_DOXYGEN__)
235 NRF_CLOCK_LFCLK_SYNTH = CLOCK_LFCLKSRC_SRC_Synth, /**< Internal 32 kHz synthesized from HFCLK system clock. */
236 #elif NRF_CLOCK_HAS_LFCLK_TYPE
237 NRF_CLOCK_LFCLK_SYNTH = CLOCK_LFCLK_SRC_SRC_LFSYNT, /**< Internal 32 kHz synthesized from HFCLK system clock. */
238 #elif defined(CLOCK_LFCLKSRC_SRC_LFSYNT)
239 NRF_CLOCK_LFCLK_SYNTH = CLOCK_LFCLKSRC_SRC_LFSYNT, /**< Internal 32 kHz synthesized from HFCLK system clock. */
240 #endif
241
242 #if defined(NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES) || defined(__NRFX_DOXYGEN__)
243 /**
244 * External 32 kHz low swing signal. Used only with the LFCLKSRC register.
245 * For the others @ref NRF_CLOCK_LFCLK_XTAL is returned for this setting.
246 */
247 NRF_CLOCK_LFCLK_XTAL_LOW_SWING = (CLOCK_LFCLKSRC_SRC_Xtal |
248 (CLOCK_LFCLKSRC_EXTERNAL_Enabled << CLOCK_LFCLKSRC_EXTERNAL_Pos)),
249 /**
250 * External 32 kHz full swing signal. Used only with the LFCLKSRC register.
251 * For the others @ref NRF_CLOCK_LFCLK_XTAL is returned for this setting.
252 */
253 NRF_CLOCK_LFCLK_XTAL_FULL_SWING = (CLOCK_LFCLKSRC_SRC_Xtal |
254 (CLOCK_LFCLKSRC_BYPASS_Enabled << CLOCK_LFCLKSRC_BYPASS_Pos) |
255 (CLOCK_LFCLKSRC_EXTERNAL_Enabled << CLOCK_LFCLKSRC_EXTERNAL_Pos)),
256 #endif // defined(NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES) || defined(__NRFX_DOXYGEN__)
257 } nrf_clock_lfclk_t;
258
259 /**
260 * @brief High-frequency clock sources.
261 * @details Used by HFCLKSTAT and HFCLK192MSTAT registers.
262 */
263 typedef enum
264 {
265 #if defined(CLOCK_HFCLKSTAT_SRC_Xtal) || defined(__NRFX_DOXYGEN__)
266 NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_Xtal, /**< External 16 MHz/32 MHz crystal oscillator. */
267 #elif NRF_CLOCK_HAS_XO
268 NRF_CLOCK_HFCLK_HIGH_ACCURACY, /**< External 32 MHz crystal oscillator. */
269 #else
270 NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_HFXO, /**< External 32 MHz crystal oscillator. */
271 #endif
272
273 #if defined(CLOCK_HFCLKSTAT_SRC_RC) || defined(__NRFX_DOXYGEN__)
274 NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_RC, /**< Internal 16 MHz RC oscillator. */
275 #elif defined(CLOCK_HFCLKSTAT_SRC_HFINT)
276 NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_HFINT, /**< Internal 16 MHz RC oscillator. */
277 #else
278 NRF_CLOCK_HFCLK_LOW_ACCURACY, /**< Internal RC oscillator. */
279 #endif
280 } nrf_clock_hfclk_t;
281
282 /** @brief Clock domains. */
283 typedef enum
284 {
285 NRF_CLOCK_DOMAIN_LFCLK,
286 NRF_CLOCK_DOMAIN_HFCLK,
287 #if NRF_CLOCK_HAS_HFCLK192M
288 NRF_CLOCK_DOMAIN_HFCLK192M,
289 #endif
290 #if NRF_CLOCK_HAS_HFCLKAUDIO
291 NRF_CLOCK_DOMAIN_HFCLKAUDIO,
292 #endif
293 } nrf_clock_domain_t;
294
295 #if defined(CLOCK_FEATURE_HFCLK_DIVIDE_PRESENT) || NRF_CLOCK_HAS_HFCLK192M
296 /**
297 * @brief High-frequency clock frequency configuration.
298 * @details Used by HFCLKCTRL and HFCLK192MCTRL registers.
299 */
300 typedef enum
301 {
302 NRF_CLOCK_HFCLK_DIV_1 = CLOCK_HFCLKCTRL_HCLK_Div1, /**< Divide HFCLK/HFCLK192M by 1 */
303 NRF_CLOCK_HFCLK_DIV_2 = CLOCK_HFCLKCTRL_HCLK_Div2, /**< Divide HFCLK/HFCLK192M by 2 */
304 #if NRF_CLOCK_HAS_HFCLK192M
305 NRF_CLOCK_HFCLK_DIV_4 = CLOCK_HFCLK192MCTRL_HCLK192M_Div4, /**< Divide HFCLK192M by 4 */
306 #endif
307 } nrf_clock_hfclk_div_t;
308 #endif // defined(CLOCK_FEATURE_HFCLK_DIVIDE_PRESENT) || NRF_CLOCK_HAS_HFCLK192M
309
310 /**
311 * @brief Trigger status of task LFCLKSTART/HFCLKSTART.
312 *
313 * @note This enum is deprecated.
314 *
315 * @details Used by LFCLKRUN and HFCLKRUN registers.
316 */
317 typedef enum
318 {
319 NRF_CLOCK_START_TASK_NOT_TRIGGERED = NRF_CLOCK_LFCLKRUN_STATUS_NotTriggered, /**< Task LFCLKSTART/HFCLKSTART has not been triggered. */
320 NRF_CLOCK_START_TASK_TRIGGERED = NRF_CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */
321 } nrf_clock_start_task_status_t;
322
323 /** @brief Interrupts. */
324 typedef enum
325 {
326 NRF_CLOCK_INT_HF_STARTED_MASK = NRF_CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */
327 NRF_CLOCK_INT_LF_STARTED_MASK = NRF_CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */
328
329 #if NRF_CLOCK_HAS_PLL
330 NRFX_CLOCK_INT_PLL_STARTED_MASK = CLOCK_INTENSET_PLLSTARTED_Msk, /**< Interrupt on PLLSTARTED event. */
331 #endif
332 #if NRF_CLOCK_HAS_CALIBRATION
333 NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */
334 #endif
335 #if NRF_CLOCK_HAS_CALIBRATION_TIMER
336 NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk, /**< Interrupt on CTTO event. */
337 #endif
338 #if defined(CLOCK_INTENSET_CTSTARTED_Msk) || defined(__NRFX_DOXYGEN__)
339 NRF_CLOCK_INT_CTSTARTED_MASK = CLOCK_INTENSET_CTSTARTED_Msk, /**< Interrupt on CTSTARTED event. */
340 NRF_CLOCK_INT_CTSTOPPED_MASK = CLOCK_INTENSET_CTSTOPPED_Msk /**< Interrupt on CTSTOPPED event. */
341 #endif
342 #if NRF_CLOCK_HAS_HFCLKAUDIO
343 NRF_CLOCK_INT_HFAUDIO_STARTED_MASK = CLOCK_INTENSET_HFCLKAUDIOSTARTED_Msk, /**< Interrupt on HFCLKAUDIOSTARTED event. */
344 #endif
345
346 #if NRF_CLOCK_HAS_HFCLK192M
347 NRF_CLOCK_INT_HF192M_STARTED_MASK = CLOCK_INTENSET_HFCLK192MSTARTED_Msk, /**< Interrupt on HFCLK192MSTARTED event. */
348 #endif
349 } nrf_clock_int_mask_t;
350
351 /**
352 * @brief Tasks.
353 *
354 * @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running.
355 * The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running.
356 */
357 typedef enum
358 {
359 #if NRF_CLOCK_HAS_XO
360 NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_XOSTART), /**< Start HFCLK clock source. */
361 NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_XOSTOP), /**< Stop HFCLK clock source. */
362 #else
363 NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source. */
364 NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source. */
365 #endif
366 #if NRF_CLOCK_HAS_PLL
367 NRF_CLOCK_TASK_PLLSTART = offsetof(NRF_CLOCK_Type, TASKS_PLLSTART), /**< Start PLL and keep it running, regardless of the automatic clock requests. */
368 NRF_CLOCK_TASK_PLLSTOP = offsetof(NRF_CLOCK_Type, TASKS_PLLSTOP), /**< Stop PLL. */
369 #endif
370 NRF_CLOCK_TASK_LFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTART), /**< Start LFCLK clock source. */
371 NRF_CLOCK_TASK_LFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTOP), /**< Stop LFCLK clock source. */
372 #if NRF_CLOCK_HAS_CALIBRATION
373 NRF_CLOCK_TASK_CAL = offsetof(NRF_CLOCK_Type, TASKS_CAL), /**< Start calibration of LFCLK RC oscillator. */
374 #endif
375 #if NRF_CLOCK_HAS_CALIBRATION_TIMER
376 NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer. */
377 NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer. */
378 #endif
379 #if NRF_CLOCK_HAS_HFCLKAUDIO
380 NRF_CLOCK_TASK_HFCLKAUDIOSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKAUDIOSTART), /**< Start HFCLKAUDIO clock source. */
381 NRF_CLOCK_TASK_HFCLKAUDIOSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKAUDIOSTOP), /**< Stop HFCLKAUDIO clock source. */
382 #endif
383 #if NRF_CLOCK_HAS_HFCLK192M
384 NRF_CLOCK_TASK_HFCLK192MSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLK192MSTART), /**< Start HFCLK192M clock source. */
385 NRF_CLOCK_TASK_HFCLK192MSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLK192MSTOP), /**< Stop HFCLK192M clock source. */
386 #endif
387 } nrf_clock_task_t;
388
389 /** @brief Events. */
390 typedef enum
391 {
392 #if NRF_CLOCK_HAS_XO
393 NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_XOSTARTED), /**< HFCLK oscillator started. */
394 #else
395 NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started. */
396 #endif
397 #if NRF_CLOCK_HAS_PLL
398 NRF_CLOCK_EVENT_PLLSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_PLLSTARTED), /**< PLL started. */
399 #endif
400 NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started. */
401 #if NRF_CLOCK_HAS_CALIBRATION
402 NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed. */
403 #endif
404 #if NRF_CLOCK_HAS_CALIBRATION_TIMER
405 NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO), /**< Calibration timer time-out. */
406 #endif
407 #if defined(CLOCK_INTENSET_CTSTARTED_Msk) || defined(__NRFX_DOXYGEN__)
408 NRF_CLOCK_EVENT_CTSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_CTSTARTED), /**< Calibration timer started. */
409 NRF_CLOCK_EVENT_CTSTOPPED = offsetof(NRF_CLOCK_Type, EVENTS_CTSTOPPED) /**< Calibration timer stopped. */
410 #endif
411 #if NRF_CLOCK_HAS_HFCLKAUDIO
412 NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKAUDIOSTARTED), /**< HFCLKAUDIO oscillator started. */
413 #endif
414 #if NRF_CLOCK_HAS_HFCLK192M
415 NRF_CLOCK_EVENT_HFCLK192MSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLK192MSTARTED), /**< HFCLK192M oscillator started. */
416 #endif
417 } nrf_clock_event_t;
418
419 /**
420 * @brief Function for enabling the specified interrupt.
421 *
422 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
423 * @param[in] mask Mask of interrupts to be enabled.
424 * Use @ref nrf_clock_int_mask_t values for bit masking.
425 */
426 NRF_STATIC_INLINE void nrf_clock_int_enable(NRF_CLOCK_Type * p_reg, uint32_t mask);
427
428 /**
429 * @brief Function for disabling the specified interrupt.
430 *
431 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
432 * @param[in] mask Mask of interrupts to be disabled.
433 * Use @ref nrf_clock_int_mask_t values for bit masking.
434 */
435 NRF_STATIC_INLINE void nrf_clock_int_disable(NRF_CLOCK_Type * p_reg, uint32_t mask);
436
437 /**
438 * @brief Function for checking if the specified interrupts are enabled.
439 *
440 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
441 * @param[in] mask Mask of interrupts to be checked.
442 * Use @ref nrf_clock_int_mask_t values for bit masking.
443 *
444 * @return Mask of enabled interrupts.
445 */
446 NRF_STATIC_INLINE uint32_t nrf_clock_int_enable_check(NRF_CLOCK_Type const * p_reg, uint32_t mask);
447
448 /**
449 * @brief Function for retrieving the address of the specified task.
450 * @details This function can be used by the PPI module.
451 *
452 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
453 * @param[in] task CLOCK Task.
454 *
455 * @return Address of the requested task register.
456 */
457 NRF_STATIC_INLINE uint32_t nrf_clock_task_address_get(NRF_CLOCK_Type const * p_reg,
458 nrf_clock_task_t task);
459
460 /**
461 * @brief Function for setting the specified task.
462 *
463 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
464 * @param[in] task Task to be activated.
465 */
466 NRF_STATIC_INLINE void nrf_clock_task_trigger(NRF_CLOCK_Type * p_reg, nrf_clock_task_t task);
467
468 /**
469 * @brief Function for retrieving the address of the specified event.
470 * @details This function can be used by the PPI module.
471 *
472 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
473 * @param[in] event CLOCK Event.
474 *
475 * @return Address of the specified event register.
476 */
477 NRF_STATIC_INLINE uint32_t nrf_clock_event_address_get(NRF_CLOCK_Type const * p_reg,
478 nrf_clock_event_t event);
479
480 /**
481 * @brief Function for clearing the specified event.
482 *
483 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
484 * @param[in] event Event to clear.
485 */
486 NRF_STATIC_INLINE void nrf_clock_event_clear(NRF_CLOCK_Type * p_reg, nrf_clock_event_t event);
487
488 /**
489 * @brief Function for retrieving the state of the specified event.
490 *
491 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
492 * @param[in] event Event to be checked.
493 *
494 * @retval true The event has been generated.
495 * @retval false The event has not been generated.
496 */
497 NRF_STATIC_INLINE bool nrf_clock_event_check(NRF_CLOCK_Type const * p_reg, nrf_clock_event_t event);
498
499 /**
500 * @brief Function for retrieving the trigger status of the task START for given domain.
501 *
502 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
503 * @param[in] domain Clock domain.
504 *
505 * @retval false The task START for the given domain has not been triggered.
506 * @retval true The task START for the given domain has been triggered.
507 */
508 NRF_STATIC_INLINE bool nrf_clock_start_task_check(NRF_CLOCK_Type const * p_reg,
509 nrf_clock_domain_t domain);
510
511 /**
512 * @brief Function for retrieving the state of the clock.
513 *
514 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
515 * @param[in] domain Clock domain.
516 * @param[out] p_clk_src Pointer to clock source that is running. Set to NULL if not needed.
517 * Ignored for HFCLKAUDIO domain. Variable pointed by @p p_clk_src
518 * must be of either @ref nrf_clock_lfclk_t type for LFCLK
519 * or @ref nrf_clock_hfclk_t type for HFCLK and HFCLK192M.
520 *
521 * @retval false The clock is not running.
522 * @retval true The clock is running.
523 */
524 NRF_STATIC_INLINE bool nrf_clock_is_running(NRF_CLOCK_Type const * p_reg,
525 nrf_clock_domain_t domain,
526 void * p_clk_src);
527
528 /**
529 * @brief Function for changing the low-frequency clock source.
530 * @details Check in Product Specification if this function can be called when
531 * the low-frequency clock is running.
532 *
533 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
534 * @param[in] source New low-frequency clock source.
535 */
536 NRF_STATIC_INLINE void nrf_clock_lf_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_lfclk_t source);
537
538 /**
539 * @brief Function for retrieving the selected source for the low-frequency clock.
540 *
541 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
542 *
543 * @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
544 * is the selected source for the low-frequency clock.
545 * @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
546 * is the selected source for the low-frequency clock.
547 * @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesized from
548 * the HFCLK is the selected source for the low-frequency clock.
549 */
550 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(NRF_CLOCK_Type const * p_reg);
551
552 /**
553 * @brief Function for retrieving the active source of the low-frequency clock.
554 *
555 * @note This function is deprecated. Use @ref nrf_clock_is_running instead.
556 *
557 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
558 *
559 * @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
560 * is the active source of the low-frequency clock.
561 * @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
562 * is the active source of the low-frequency clock.
563 * @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesized from
564 * the HFCLK is the active source of the low-frequency clock.
565 */
566 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(NRF_CLOCK_Type const * p_reg);
567
568 /**
569 * @brief Function for retrieving the clock source for the LFCLK clock when
570 * the task LKCLKSTART is triggered.
571 *
572 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
573 *
574 * @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
575 * is running and generating the LFCLK clock.
576 * @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
577 * is running and generating the LFCLK clock.
578 * @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesized from
579 * the HFCLK is running and generating the LFCLK clock.
580 */
581 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(NRF_CLOCK_Type const * p_reg);
582
583 /**
584 * @brief Function for retrieving the state of the LFCLK clock.
585 *
586 * @note This function is deprecated. Use @ref nrf_clock_is_running instead.
587 *
588 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
589 *
590 * @retval false The LFCLK clock is not running.
591 * @retval true The LFCLK clock is running.
592 */
593 NRF_STATIC_INLINE bool nrf_clock_lf_is_running(NRF_CLOCK_Type const * p_reg);
594
595 /**
596 * @brief Function for retrieving the trigger status of the task LFCLKSTART.
597 *
598 * @note This function is deprecated. Use @ref nrf_clock_start_task_check instead.
599 *
600 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
601 *
602 * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED The task LFCLKSTART has not been triggered.
603 * @retval NRF_CLOCK_START_TASK_TRIGGERED The task LFCLKSTART has been triggered.
604 */
605 NRF_STATIC_INLINE
606 nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(NRF_CLOCK_Type const * p_reg);
607
608 #if NRF_CLOCK_HAS_HFCLKSRC
609 /**
610 * @brief Function for changing the high-frequency clock source.
611 *
612 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
613 * @param[in] source New high-frequency clock source.
614 */
615 NRF_STATIC_INLINE void nrf_clock_hf_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_hfclk_t source);
616 #endif
617
618 /**
619 * @brief Function for retrieving the selected source of the high-frequency clock.
620 *
621 * For SoCs not featuring the HFCLKSRC register, this is always also the active source
622 * of the high-frequency clock.
623 *
624 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
625 *
626 * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY The internal RC oscillator is the selected
627 * source of the high-frequency clock.
628 * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY An external crystal oscillator is the selected
629 * source of the high-frequency clock.
630 */
631 NRF_STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(NRF_CLOCK_Type const * p_reg);
632
633 /**
634 * @brief Function for retrieving the state of the HFCLK clock.
635 *
636 * @note This function is deprecated. Use @ref nrf_clock_is_running instead.
637 *
638 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
639 * @param[in] clk_src Clock source to be checked.
640 *
641 * @retval false The HFCLK clock is not running.
642 * @retval true The HFCLK clock is running.
643 */
644 NRF_STATIC_INLINE bool nrf_clock_hf_is_running(NRF_CLOCK_Type const * p_reg,
645 nrf_clock_hfclk_t clk_src);
646
647 /**
648 * @brief Function for retrieving the trigger status of the task HFCLKSTART.
649 *
650 * @note This function is deprecated. Use @ref nrf_clock_start_task_check instead.
651 *
652 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
653 *
654 * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED The task HFCLKSTART has not been triggered.
655 * @retval NRF_CLOCK_START_TASK_TRIGGERED The task HFCLKSTART has been triggered.
656 */
657 NRF_STATIC_INLINE
658 nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(NRF_CLOCK_Type const * p_reg);
659
660 #if NRF_CLOCK_HAS_HFCLKAUDIO
661 /**
662 * @brief Function for changing the Audio clock FREQ_VALUE.
663 *
664 * The frequency of HFCLKAUDIO ranges from 10.666 MHz to 13.333 MHz in 40.7 Hz steps.
665 * To calculate @p freq_value corresponding to the chosen frequency, use the following equation:
666 * FREQ_VALUE = 2^16 * ((12 * f_out / 32M) - 4)
667 *
668 * @warning Chosen frequency must fit in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands.
669 *
670 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
671 * @param[in] freq_value New FREQ_VALUE
672 */
673 NRF_STATIC_INLINE
674 void nrf_clock_hfclkaudio_config_set(NRF_CLOCK_Type * p_reg, uint16_t freq_value);
675
676 /**
677 * @brief Function for retrieving the Audio clock FREQ_VALUE.
678 *
679 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
680 *
681 * The frequency of HFCLKAUDIO ranges from 10.666 MHz to 13.333 MHz in 40.7 Hz steps.
682 * To calculate frequency corresponding to the returned FREQ_VALUE, use the following equation:
683 * f_out = 32M * (4 + FREQ_VALUE * 2^(-16))/12
684
685 * @return FREQ_VALUE of the Audio clock.
686 */
687 NRF_STATIC_INLINE
688 uint16_t nrf_clock_hfclkaudio_config_get(NRF_CLOCK_Type const * p_reg);
689 #endif
690
691 #if NRF_CLOCK_HAS_CALIBRATION_TIMER
692 /**
693 * @brief Function for changing the calibration timer interval.
694 *
695 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
696 * @param[in] interval New calibration timer interval in 0.25 s resolution
697 * (range: 0.25 seconds to 31.75 seconds).
698 */
699 NRF_STATIC_INLINE void nrf_clock_cal_timer_timeout_set(NRF_CLOCK_Type * p_reg, uint32_t interval);
700 #endif
701
702 #if defined(CLOCK_FEATURE_HFCLK_DIVIDE_PRESENT)
703 /**
704 * @brief Function for changing the HFCLK frequency divider.
705 *
706 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
707 * @param[in] divider New HFCLK divider.
708 */
709 NRF_STATIC_INLINE void nrf_clock_hfclk_div_set(NRF_CLOCK_Type * p_reg,
710 nrf_clock_hfclk_div_t divider);
711
712 /**
713 * @brief Function for retrieving the HFCLK frequency divider.
714 *
715 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
716 *
717 * @return HFCLK frequency divider.
718 */
719 NRF_STATIC_INLINE nrf_clock_hfclk_div_t nrf_clock_hfclk_div_get(NRF_CLOCK_Type const * p_reg);
720 #endif
721
722 #if NRF_CLOCK_HAS_HFCLK192M
723 /**
724 * @brief Function for changing the HFCLK192M frequency divider.
725 *
726 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
727 * @param[in] divider New HFCLK192M divider.
728 */
729 NRF_STATIC_INLINE void nrf_clock_hfclk192m_div_set(NRF_CLOCK_Type * p_reg,
730 nrf_clock_hfclk_div_t divider);
731
732 /**
733 * @brief Function for retrieving the HFCLK192M frequency divider.
734 *
735 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
736 *
737 * @return HFCLK192M frequency divider.
738 */
739 NRF_STATIC_INLINE nrf_clock_hfclk_div_t nrf_clock_hfclk192m_div_get(NRF_CLOCK_Type const * p_reg);
740
741 /**
742 * @brief Function for changing the HFCLK192M source.
743 *
744 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
745 * @param[in] source New HFCLK192M source.
746 */
747 NRF_STATIC_INLINE void nrf_clock_hfclk192m_src_set(NRF_CLOCK_Type * p_reg,
748 nrf_clock_hfclk_t source);
749
750 /**
751 * @brief Function for retrieving the selected source of the HFCLK192M.
752 *
753 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
754 *
755 * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY The internal RC oscillator is the selected
756 * source of the HFCLK192M.
757 * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY An external crystal oscillator is the selected
758 * source of the HFCLK192M.
759 */
760 NRF_STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hfclk192m_src_get(NRF_CLOCK_Type const * p_reg);
761 #endif // NRF_CLOCK_HAS_HFCLK192M
762
763 #if (NRF_CLOCK_HAS_LFCLK_ALWAYSRUN || NRF_CLOCK_HAS_HFCLK_ALWAYSRUN || NRF_CLOCK_HAS_HFCLK192M || \
764 NRF_CLOCK_HAS_HFCLKAUDIO)
765 /**
766 * @brief Function for setting the clock domain to always run.
767 *
768 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
769 * @param[in] domain Clock domain.
770 * @param[in] alwaysrun Ensure the clock is always running.
771 */
772 NRF_STATIC_INLINE void nrf_clock_alwaysrun_set(NRF_CLOCK_Type * p_reg,
773 nrf_clock_domain_t domain,
774 bool alwaysrun);
775 /**
776 * @brief Function for checking if the clock domain is configured to always run.
777 *
778 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
779 * @param[in] domain Clock domain.
780 *
781 * @retval true The clock domain is configured to always run.
782 * @retval false The clock domain is not configured to always run.
783 */
784 NRF_STATIC_INLINE bool nrf_clock_alwaysrun_get(NRF_CLOCK_Type const * p_reg,
785 nrf_clock_domain_t domain);
786 /**
787 * @brief Function for checking if the clock domain always run setting is active.
788 *
789 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
790 * @param[in] domain Clock domain.
791 *
792 * @retval true The clock domain always run setting is active.
793 * @retval false The clock domain always run setting is not active.
794 */
795 NRF_STATIC_INLINE bool nrf_clock_alwaysrun_active_get(NRF_CLOCK_Type const * p_reg,
796 nrf_clock_domain_t domain);
797 #endif /* (NRF_CLOCK_HAS_LFCLK_ALWAYSRUN || NRF_CLOCK_HAS_HFCLK_ALWAYSRUN ||
798 NRF_CLOCK_HAS_HFCLK192M || NRF_CLOCK_HAS_HFCLKAUDIO) */
799
800 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
801 /**
802 * @brief Function for setting the subscribe configuration for a given
803 * CLOCK task.
804 *
805 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
806 * @param[in] task Task for which to set the configuration.
807 * @param[in] channel Channel through which to subscribe events.
808 */
809 NRF_STATIC_INLINE void nrf_clock_subscribe_set(NRF_CLOCK_Type * p_reg,
810 nrf_clock_task_t task,
811 uint8_t channel);
812
813 /**
814 * @brief Function for clearing the subscribe configuration for a given
815 * CLOCK task.
816 *
817 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
818 * @param[in] task Task for which to clear the configuration.
819 */
820 NRF_STATIC_INLINE void nrf_clock_subscribe_clear(NRF_CLOCK_Type * p_reg, nrf_clock_task_t task);
821
822 /**
823 * @brief Function for setting the publish configuration for a given
824 * CLOCK event.
825 *
826 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
827 * @param[in] event Event for which to set the configuration.
828 * @param[in] channel Channel through which to publish the event.
829 */
830 NRF_STATIC_INLINE void nrf_clock_publish_set(NRF_CLOCK_Type * p_reg,
831 nrf_clock_event_t event,
832 uint8_t channel);
833
834 /**
835 * @brief Function for clearing the publish configuration for a given
836 * CLOCK event.
837 *
838 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
839 * @param[in] event Event for which to clear the configuration.
840 */
841 NRF_STATIC_INLINE void nrf_clock_publish_clear(NRF_CLOCK_Type * p_reg, nrf_clock_event_t event);
842 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
843
844 #ifndef NRF_DECLARE_ONLY
845
nrf_clock_int_enable(NRF_CLOCK_Type * p_reg,uint32_t mask)846 NRF_STATIC_INLINE void nrf_clock_int_enable(NRF_CLOCK_Type * p_reg, uint32_t mask)
847 {
848 p_reg->INTENSET = mask;
849 }
850
nrf_clock_int_disable(NRF_CLOCK_Type * p_reg,uint32_t mask)851 NRF_STATIC_INLINE void nrf_clock_int_disable(NRF_CLOCK_Type * p_reg, uint32_t mask)
852 {
853 p_reg->INTENCLR = mask;
854 }
855
nrf_clock_int_enable_check(NRF_CLOCK_Type const * p_reg,uint32_t mask)856 NRF_STATIC_INLINE uint32_t nrf_clock_int_enable_check(NRF_CLOCK_Type const * p_reg, uint32_t mask)
857 {
858 return p_reg->INTENSET & mask;
859 }
860
nrf_clock_task_address_get(NRF_CLOCK_Type const * p_reg,nrf_clock_task_t task)861 NRF_STATIC_INLINE uint32_t nrf_clock_task_address_get(NRF_CLOCK_Type const * p_reg,
862 nrf_clock_task_t task)
863 {
864 return nrf_task_event_address_get(p_reg, task);
865 }
866
nrf_clock_task_trigger(NRF_CLOCK_Type * p_reg,nrf_clock_task_t task)867 NRF_STATIC_INLINE void nrf_clock_task_trigger(NRF_CLOCK_Type * p_reg, nrf_clock_task_t task)
868 {
869 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
870 }
871
nrf_clock_event_address_get(NRF_CLOCK_Type const * p_reg,nrf_clock_event_t event)872 NRF_STATIC_INLINE uint32_t nrf_clock_event_address_get(NRF_CLOCK_Type const * p_reg,
873 nrf_clock_event_t event)
874 {
875 return nrf_task_event_address_get(p_reg, event);
876 }
877
nrf_clock_event_clear(NRF_CLOCK_Type * p_reg,nrf_clock_event_t event)878 NRF_STATIC_INLINE void nrf_clock_event_clear(NRF_CLOCK_Type * p_reg, nrf_clock_event_t event)
879 {
880 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
881 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
882 }
883
nrf_clock_event_check(NRF_CLOCK_Type const * p_reg,nrf_clock_event_t event)884 NRF_STATIC_INLINE bool nrf_clock_event_check(NRF_CLOCK_Type const * p_reg, nrf_clock_event_t event)
885 {
886 return nrf_event_check(p_reg, event);
887 }
888
nrf_clock_start_task_check(NRF_CLOCK_Type const * p_reg,nrf_clock_domain_t domain)889 NRF_STATIC_INLINE bool nrf_clock_start_task_check(NRF_CLOCK_Type const * p_reg,
890 nrf_clock_domain_t domain)
891 {
892 switch (domain)
893 {
894 case NRF_CLOCK_DOMAIN_LFCLK:
895 return ((p_reg->NRF_LFCLKRUN & NRF_CLOCK_LFCLKRUN_STATUS_Msk)
896 >> NRF_CLOCK_LFCLKRUN_STATUS_Pos);
897 case NRF_CLOCK_DOMAIN_HFCLK:
898 return ((p_reg->NRF_HFCLKRUN & NRF_CLOCK_HFCLKRUN_STATUS_Msk)
899 >> NRF_CLOCK_HFCLKRUN_STATUS_Pos);
900 #if NRF_CLOCK_HAS_HFCLK192M
901 case NRF_CLOCK_DOMAIN_HFCLK192M:
902 return ((p_reg->HFCLK192MRUN & CLOCK_HFCLK192MRUN_STATUS_Msk)
903 >> CLOCK_HFCLK192MRUN_STATUS_Pos);
904 #endif
905 #if NRF_CLOCK_HAS_HFCLKAUDIO
906 case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
907 return ((p_reg->HFCLKAUDIORUN & CLOCK_HFCLKAUDIORUN_STATUS_Msk)
908 >> CLOCK_HFCLKAUDIORUN_STATUS_Pos);
909 #endif
910 default:
911 NRFX_ASSERT(0);
912 return false;
913 }
914 }
915
916 /*
917 * `-Warray-bounds` warning is disabled for the `nrf_clock_is_running`
918 * function because GCC 12 and above may report a false positive due to the
919 * size of the write access to the memory address pointed by the `p_clk_src`
920 * argument being variable depending on the value of the `domain` argument.
921 */
922 #if defined(__GNUC__)
923 #pragma GCC diagnostic push
924 #pragma GCC diagnostic ignored "-Warray-bounds"
925 #endif
926
nrf_clock_is_running(NRF_CLOCK_Type const * p_reg,nrf_clock_domain_t domain,void * p_clk_src)927 NRF_STATIC_INLINE bool nrf_clock_is_running(NRF_CLOCK_Type const * p_reg,
928 nrf_clock_domain_t domain,
929 void * p_clk_src)
930 {
931 bool clock_running;
932 switch (domain)
933 {
934 case NRF_CLOCK_DOMAIN_LFCLK:
935 clock_running = p_reg->NRF_LFCLKSTAT & NRF_CLOCK_LFCLKSTAT_STATE_Msk;
936 if (p_clk_src != NULL)
937 {
938 (*(nrf_clock_lfclk_t *)p_clk_src) =
939 (nrf_clock_lfclk_t)((p_reg->NRF_LFCLKSTAT & NRF_CLOCK_LFCLKSTAT_SRC_Msk)
940 >> NRF_CLOCK_LFCLKSTAT_SRC_Pos);
941 }
942 break;
943 case NRF_CLOCK_DOMAIN_HFCLK:
944 clock_running = p_reg->NRF_HFCLKSTAT & NRF_CLOCK_HFCLKSTAT_STATE_Msk;
945 if (p_clk_src != NULL)
946 {
947 #if NRF_CLOCK_HAS_XO
948 /* XO registers do not contain information about low accuracy source being active.
949 * It has to be derived from HFCLK state. */
950 (*(nrf_clock_hfclk_t *)p_clk_src) = clock_running ? NRF_CLOCK_HFCLK_HIGH_ACCURACY :
951 NRF_CLOCK_HFCLK_LOW_ACCURACY;
952 #else
953 (*(nrf_clock_hfclk_t *)p_clk_src) =
954 (nrf_clock_hfclk_t)((p_reg->NRF_HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
955 >> CLOCK_HFCLKSTAT_SRC_Pos);
956 #endif
957 }
958 break;
959 #if NRF_CLOCK_HAS_HFCLK192M
960 case NRF_CLOCK_DOMAIN_HFCLK192M:
961 clock_running = p_reg->HFCLK192MSTAT & CLOCK_HFCLK192MSTAT_STATE_Msk;
962 if (p_clk_src != NULL)
963 {
964 (*(nrf_clock_hfclk_t *)p_clk_src) =
965 (nrf_clock_hfclk_t)((p_reg->HFCLK192MSTAT & CLOCK_HFCLK192MSTAT_SRC_Msk)
966 >> CLOCK_HFCLK192MSTAT_SRC_Pos);
967 }
968 break;
969 #endif
970 #if NRF_CLOCK_HAS_HFCLKAUDIO
971 case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
972 clock_running = p_reg->HFCLKAUDIOSTAT & CLOCK_HFCLKAUDIOSTAT_STATE_Msk;
973 break;
974 #endif
975 default:
976 NRFX_ASSERT(0);
977 return false;
978 }
979 return clock_running;
980 }
981
982 #if defined(__GNUC__)
983 #pragma GCC diagnostic pop
984 #endif
985
nrf_clock_lf_src_set(NRF_CLOCK_Type * p_reg,nrf_clock_lfclk_t source)986 NRF_STATIC_INLINE void nrf_clock_lf_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_lfclk_t source)
987 {
988 p_reg->NRF_LFCLKSRC = (uint32_t)(source);
989 }
990
nrf_clock_lf_src_get(NRF_CLOCK_Type const * p_reg)991 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(NRF_CLOCK_Type const * p_reg)
992 {
993 return (nrf_clock_lfclk_t)(p_reg->NRF_LFCLKSRC);
994 }
995
nrf_clock_lf_actv_src_get(NRF_CLOCK_Type const * p_reg)996 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(NRF_CLOCK_Type const * p_reg)
997 {
998 nrf_clock_lfclk_t clk_src;
999 (void)nrf_clock_is_running(p_reg, NRF_CLOCK_DOMAIN_LFCLK, &clk_src);
1000 return clk_src;
1001 }
1002
nrf_clock_lf_srccopy_get(NRF_CLOCK_Type const * p_reg)1003 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(NRF_CLOCK_Type const * p_reg)
1004 {
1005 return (nrf_clock_lfclk_t)((p_reg->NRF_LFCLKSRCCOPY & NRF_CLOCK_LFCLKSRCCOPY_SRC_Msk)
1006 >> NRF_CLOCK_LFCLKSRCCOPY_SRC_Pos);
1007 }
1008
nrf_clock_lf_is_running(NRF_CLOCK_Type const * p_reg)1009 NRF_STATIC_INLINE bool nrf_clock_lf_is_running(NRF_CLOCK_Type const * p_reg)
1010 {
1011 return nrf_clock_is_running(p_reg, NRF_CLOCK_DOMAIN_LFCLK, NULL);
1012 }
1013
1014 NRF_STATIC_INLINE
nrf_clock_lf_start_task_status_get(NRF_CLOCK_Type const * p_reg)1015 nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(NRF_CLOCK_Type const * p_reg)
1016 {
1017 return (nrf_clock_start_task_status_t)nrf_clock_start_task_check(p_reg,
1018 NRF_CLOCK_DOMAIN_LFCLK);
1019 }
1020
1021 #if NRF_CLOCK_HAS_HFCLKSRC
nrf_clock_hf_src_set(NRF_CLOCK_Type * p_reg,nrf_clock_hfclk_t source)1022 NRF_STATIC_INLINE void nrf_clock_hf_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_hfclk_t source)
1023 {
1024 p_reg->HFCLKSRC = (uint32_t)(source);
1025 }
1026 #endif
1027
nrf_clock_hf_src_get(NRF_CLOCK_Type const * p_reg)1028 NRF_STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(NRF_CLOCK_Type const * p_reg)
1029 {
1030 #if NRF_CLOCK_HAS_HFCLKSRC
1031 return (nrf_clock_hfclk_t)(p_reg->HFCLKSRC);
1032 #elif NRF_CLOCK_HAS_XO
1033 /* XO registers do not contain information about low accuracy source being active.
1034 * It has to be derived from HFCLK state. */
1035 return (p_reg->NRF_HFCLKSTAT & NRF_CLOCK_HFCLKSTAT_STATE_Msk) ? NRF_CLOCK_HFCLK_HIGH_ACCURACY :
1036 NRF_CLOCK_HFCLK_LOW_ACCURACY;
1037 #else
1038 return (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
1039 >> CLOCK_HFCLKSTAT_SRC_Pos);
1040 #endif
1041 }
1042
nrf_clock_hf_is_running(NRF_CLOCK_Type const * p_reg,nrf_clock_hfclk_t clk_src)1043 NRF_STATIC_INLINE bool nrf_clock_hf_is_running(NRF_CLOCK_Type const * p_reg,
1044 nrf_clock_hfclk_t clk_src)
1045 {
1046 nrf_clock_hfclk_t active_clk_src;
1047 bool ret = nrf_clock_is_running(p_reg, NRF_CLOCK_DOMAIN_HFCLK, &active_clk_src);
1048 return (ret && (active_clk_src == clk_src));
1049 }
1050
1051 NRF_STATIC_INLINE
nrf_clock_hf_start_task_status_get(NRF_CLOCK_Type const * p_reg)1052 nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(NRF_CLOCK_Type const * p_reg)
1053 {
1054 return (nrf_clock_start_task_status_t)nrf_clock_start_task_check(p_reg,
1055 NRF_CLOCK_DOMAIN_HFCLK);
1056 }
1057
1058 #if NRF_CLOCK_HAS_HFCLKAUDIO
1059 NRF_STATIC_INLINE
nrf_clock_hfclkaudio_config_set(NRF_CLOCK_Type * p_reg,uint16_t freq_value)1060 void nrf_clock_hfclkaudio_config_set(NRF_CLOCK_Type * p_reg, uint16_t freq_value)
1061 {
1062 p_reg->HFCLKAUDIO.FREQUENCY = freq_value;
1063 }
1064
1065 NRF_STATIC_INLINE
nrf_clock_hfclkaudio_config_get(NRF_CLOCK_Type const * p_reg)1066 uint16_t nrf_clock_hfclkaudio_config_get(NRF_CLOCK_Type const * p_reg)
1067 {
1068 return (uint16_t)(p_reg->HFCLKAUDIO.FREQUENCY);
1069 }
1070 #endif
1071
1072 #if defined(CLOCK_FEATURE_HFCLK_DIVIDE_PRESENT)
1073 NRF_STATIC_INLINE
nrf_clock_hfclk_div_set(NRF_CLOCK_Type * p_reg,nrf_clock_hfclk_div_t divider)1074 void nrf_clock_hfclk_div_set(NRF_CLOCK_Type * p_reg, nrf_clock_hfclk_div_t divider)
1075 {
1076 p_reg->HFCLKCTRL = (((uint8_t)(divider) << CLOCK_HFCLKCTRL_HCLK_Pos) &
1077 CLOCK_HFCLKCTRL_HCLK_Msk);
1078 }
1079
nrf_clock_hfclk_div_get(NRF_CLOCK_Type const * p_reg)1080 NRF_STATIC_INLINE nrf_clock_hfclk_div_t nrf_clock_hfclk_div_get(NRF_CLOCK_Type const * p_reg)
1081 {
1082 return (nrf_clock_hfclk_div_t)((p_reg->HFCLKCTRL & CLOCK_HFCLKCTRL_HCLK_Msk)
1083 >> CLOCK_HFCLKCTRL_HCLK_Pos);
1084 }
1085 #endif
1086
1087 #if NRF_CLOCK_HAS_HFCLK192M
1088 NRF_STATIC_INLINE
nrf_clock_hfclk192m_div_set(NRF_CLOCK_Type * p_reg,nrf_clock_hfclk_div_t divider)1089 void nrf_clock_hfclk192m_div_set(NRF_CLOCK_Type * p_reg, nrf_clock_hfclk_div_t divider)
1090 {
1091 p_reg->HFCLK192MCTRL = (((uint8_t)(divider) << CLOCK_HFCLK192MCTRL_HCLK192M_Pos) &
1092 CLOCK_HFCLK192MCTRL_HCLK192M_Msk);
1093 }
1094
nrf_clock_hfclk192m_div_get(NRF_CLOCK_Type const * p_reg)1095 NRF_STATIC_INLINE nrf_clock_hfclk_div_t nrf_clock_hfclk192m_div_get(NRF_CLOCK_Type const * p_reg)
1096 {
1097 return (nrf_clock_hfclk_div_t)((p_reg->HFCLK192MCTRL & CLOCK_HFCLK192MCTRL_HCLK192M_Msk)
1098 >> CLOCK_HFCLK192MCTRL_HCLK192M_Pos);
1099 }
1100
nrf_clock_hfclk192m_src_set(NRF_CLOCK_Type * p_reg,nrf_clock_hfclk_t source)1101 NRF_STATIC_INLINE void nrf_clock_hfclk192m_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_hfclk_t source)
1102 {
1103 p_reg->HFCLK192MSRC = (uint32_t)(source);
1104 }
1105
nrf_clock_hfclk192m_src_get(NRF_CLOCK_Type const * p_reg)1106 NRF_STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hfclk192m_src_get(NRF_CLOCK_Type const * p_reg)
1107 {
1108 return (nrf_clock_hfclk_t)(p_reg->HFCLK192MSRC);
1109 }
1110 #endif
1111
1112 #if NRF_CLOCK_HAS_CALIBRATION_TIMER
nrf_clock_cal_timer_timeout_set(NRF_CLOCK_Type * p_reg,uint32_t interval)1113 NRF_STATIC_INLINE void nrf_clock_cal_timer_timeout_set(NRF_CLOCK_Type * p_reg, uint32_t interval)
1114 {
1115 p_reg->CTIV = ((interval << CLOCK_CTIV_CTIV_Pos) & CLOCK_CTIV_CTIV_Msk);
1116 }
1117 #endif
1118
1119 #if (NRF_CLOCK_HAS_LFCLK_ALWAYSRUN || NRF_CLOCK_HAS_HFCLK_ALWAYSRUN || NRF_CLOCK_HAS_HFCLK192M || \
1120 NRF_CLOCK_HAS_HFCLKAUDIO)
nrf_clock_alwaysrun_set(NRF_CLOCK_Type * p_reg,nrf_clock_domain_t domain,bool alwaysrun)1121 NRF_STATIC_INLINE void nrf_clock_alwaysrun_set(NRF_CLOCK_Type * p_reg,
1122 nrf_clock_domain_t domain,
1123 bool alwaysrun)
1124 {
1125 switch (domain)
1126 {
1127 #if NRF_CLOCK_HAS_LFCLK_ALWAYSRUN
1128 case NRF_CLOCK_DOMAIN_LFCLK:
1129 p_reg->NRF_LFCLKALWAYSRUN =
1130 ((alwaysrun << NRF_CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Pos)
1131 & NRF_CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Msk);
1132 break;
1133 #endif
1134 #if NRF_CLOCK_HAS_HFCLK_ALWAYSRUN
1135 case NRF_CLOCK_DOMAIN_HFCLK:
1136 p_reg->HFCLKALWAYSRUN =
1137 ((alwaysrun << CLOCK_HFCLKALWAYSRUN_ALWAYSRUN_Pos)
1138 & CLOCK_HFCLKALWAYSRUN_ALWAYSRUN_Msk);
1139 break;
1140 #endif
1141 #if NRF_CLOCK_HAS_HFCLK192M
1142 case NRF_CLOCK_DOMAIN_HFCLK192M:
1143 p_reg->HFCLK192MALWAYSRUN =
1144 ((alwaysrun << CLOCK_HFCLK192MALWAYSRUN_ALWAYSRUN_Pos)
1145 & CLOCK_HFCLK192MALWAYSRUN_ALWAYSRUN_Msk);
1146 break;
1147 #endif
1148 #if NRF_CLOCK_HAS_HFCLKAUDIO
1149 case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
1150 p_reg->HFCLKAUDIOALWAYSRUN =
1151 ((alwaysrun << CLOCK_HFCLKAUDIOALWAYSRUN_ALWAYSRUN_Pos)
1152 & CLOCK_HFCLKAUDIOALWAYSRUN_ALWAYSRUN_Msk);
1153 break;
1154 #endif
1155 default:
1156 NRFX_ASSERT(0);
1157 break;
1158 }
1159 }
1160
nrf_clock_alwaysrun_get(NRF_CLOCK_Type const * p_reg,nrf_clock_domain_t domain)1161 NRF_STATIC_INLINE bool nrf_clock_alwaysrun_get(NRF_CLOCK_Type const * p_reg,
1162 nrf_clock_domain_t domain)
1163 {
1164 switch (domain)
1165 {
1166 #if NRF_CLOCK_HAS_LFCLK_ALWAYSRUN
1167 case NRF_CLOCK_DOMAIN_LFCLK:
1168 return ((p_reg->NRF_LFCLKALWAYSRUN & NRF_CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Msk)
1169 >> NRF_CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Pos);
1170 #endif
1171 #if NRF_CLOCK_HAS_HFCLK_ALWAYSRUN
1172 case NRF_CLOCK_DOMAIN_HFCLK:
1173 return ((p_reg->HFCLKALWAYSRUN & CLOCK_HFCLKALWAYSRUN_ALWAYSRUN_Msk)
1174 >> CLOCK_HFCLKALWAYSRUN_ALWAYSRUN_Pos);
1175 #endif
1176 #if NRF_CLOCK_HAS_HFCLK192M
1177 case NRF_CLOCK_DOMAIN_HFCLK192M:
1178 return ((p_reg->HFCLK192MALWAYSRUN & CLOCK_HFCLK192MALWAYSRUN_ALWAYSRUN_Msk)
1179 >> CLOCK_HFCLK192MALWAYSRUN_ALWAYSRUN_Pos);
1180 #endif
1181 #if NRF_CLOCK_HAS_HFCLKAUDIO
1182 case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
1183 return ((p_reg->HFCLKAUDIOALWAYSRUN & CLOCK_HFCLKAUDIOALWAYSRUN_ALWAYSRUN_Msk)
1184 >> CLOCK_HFCLKAUDIOALWAYSRUN_ALWAYSRUN_Pos);
1185 #endif
1186 default:
1187 NRFX_ASSERT(0);
1188 return false;
1189 }
1190 }
1191
nrf_clock_alwaysrun_active_get(NRF_CLOCK_Type const * p_reg,nrf_clock_domain_t domain)1192 NRF_STATIC_INLINE bool nrf_clock_alwaysrun_active_get(NRF_CLOCK_Type const * p_reg,
1193 nrf_clock_domain_t domain)
1194 {
1195 switch (domain)
1196 {
1197 #if NRF_CLOCK_HAS_LFCLK_ALWAYSRUN
1198 case NRF_CLOCK_DOMAIN_LFCLK:
1199 return ((p_reg->NRF_LFCLKSTAT & NRF_CLOCK_LFCLKSTAT_ALWAYSRUNNING_Msk)
1200 >> NRF_CLOCK_LFCLKSTAT_ALWAYSRUNNING_Pos);
1201 #endif
1202 #if NRF_CLOCK_HAS_HFCLK_ALWAYSRUN
1203 case NRF_CLOCK_DOMAIN_HFCLK:
1204 return ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_ALWAYSRUNNING_Msk)
1205 >> CLOCK_HFCLKSTAT_ALWAYSRUNNING_Pos);
1206 #endif
1207 #if NRF_CLOCK_HAS_HFCLK192M
1208 case NRF_CLOCK_DOMAIN_HFCLK192M:
1209 return ((p_reg->HFCLK192MSTAT & CLOCK_HFCLK192MSTAT_ALWAYSRUNNING_Msk)
1210 >> CLOCK_HFCLK192MSTAT_ALWAYSRUNNING_Pos);
1211 #endif
1212 #if NRF_CLOCK_HAS_HFCLKAUDIO
1213 case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
1214 return ((p_reg->HFCLKAUDIOSTAT & CLOCK_HFCLKAUDIOSTAT_ALWAYSRUNNING_Msk)
1215 >> CLOCK_HFCLKAUDIOSTAT_ALWAYSRUNNING_Pos);
1216 #endif
1217 default:
1218 NRFX_ASSERT(0);
1219 return false;
1220 }
1221 }
1222 #endif /* (NRF_CLOCK_HAS_LFCLK_ALWAYSRUN || NRF_CLOCK_HAS_HFCLK_ALWAYSRUN ||
1223 NRF_CLOCK_HAS_HFCLK192M || NRF_CLOCK_HAS_HFCLKAUDIO) */
1224
1225 #if defined(DPPI_PRESENT)
nrf_clock_subscribe_set(NRF_CLOCK_Type * p_reg,nrf_clock_task_t task,uint8_t channel)1226 NRF_STATIC_INLINE void nrf_clock_subscribe_set(NRF_CLOCK_Type * p_reg,
1227 nrf_clock_task_t task,
1228 uint8_t channel)
1229 {
1230 *((volatile uint32_t *) ((uint8_t *)p_reg+ (uint32_t)task + 0x80uL)) =
1231 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
1232 }
1233
nrf_clock_subscribe_clear(NRF_CLOCK_Type * p_reg,nrf_clock_task_t task)1234 NRF_STATIC_INLINE void nrf_clock_subscribe_clear(NRF_CLOCK_Type * p_reg, nrf_clock_task_t task)
1235 {
1236 *((volatile uint32_t *) ((uint8_t *)p_reg + (uint32_t)task + 0x80uL)) = 0;
1237 }
1238
nrf_clock_publish_set(NRF_CLOCK_Type * p_reg,nrf_clock_event_t event,uint8_t channel)1239 NRF_STATIC_INLINE void nrf_clock_publish_set(NRF_CLOCK_Type * p_reg,
1240 nrf_clock_event_t event,
1241 uint8_t channel)
1242 {
1243 *((volatile uint32_t *) ((uint8_t *)p_reg + (uint32_t)event + 0x80uL)) =
1244 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
1245 }
1246
nrf_clock_publish_clear(NRF_CLOCK_Type * p_reg,nrf_clock_event_t event)1247 NRF_STATIC_INLINE void nrf_clock_publish_clear(NRF_CLOCK_Type * p_reg, nrf_clock_event_t event)
1248 {
1249 *((volatile uint32_t *) ((uint8_t *)p_reg + (uint32_t)event + 0x80uL)) = 0;
1250 }
1251 #endif // defined(DPPI_PRESENT)
1252
1253 #endif // NRF_DECLARE_ONLY
1254
1255 /** @} */
1256
1257 #ifdef __cplusplus
1258 }
1259 #endif
1260
1261 #endif // NRF_CLOCK_H__
1262
