1 /* 2 * Instance header file for PIC32CX1025SG61128 3 * 4 * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries. 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 * 18 */ 19 20 /* file generated from device description file (ATDF) version 2023-03-17T09:48:59Z */ 21 #ifndef _PIC32CXSG61_TCC0_INSTANCE_ 22 #define _PIC32CXSG61_TCC0_INSTANCE_ 23 24 25 /* ========== Instance Parameter definitions for TCC0 peripheral ========== */ 26 #define TCC0_CC_NUM (6) /* Number of Compare/Capture units */ 27 #define TCC0_DITHERING (1) /* Dithering feature implemented */ 28 #define TCC0_DMAC_ID_MC0 (23) /* Indexes of DMA Match/Compare 0 trigger */ 29 #define TCC0_DMAC_ID_MC1 (24) /* Indexes of DMA Match/Compare 1 trigger */ 30 #define TCC0_DMAC_ID_MC2 (25) /* Indexes of DMA Match/Compare 2 trigger */ 31 #define TCC0_DMAC_ID_MC3 (26) /* Indexes of DMA Match/Compare 3 trigger */ 32 #define TCC0_DMAC_ID_MC4 (27) /* Indexes of DMA Match/Compare 4 trigger */ 33 #define TCC0_DMAC_ID_MC5 (28) /* Indexes of DMA Match/Compare 5 trigger */ 34 #define TCC0_DMAC_ID_OVF (22) /* DMA overflow/underflow/retrigger trigger */ 35 #define TCC0_DTI (1) /* Dead-Time-Insertion feature implemented */ 36 #define TCC0_EXT (31) /* Coding of implemented extended features */ 37 #define TCC0_GCLK_ID (25) /* Index of Generic Clock */ 38 #define TCC0_INSTANCE_ID (43) /* Instance index for TCC0 */ 39 #define TCC0_MASTER_SLAVE_MODE (1) /* TCC type 0 : NA, 1 : Master, 2 : Slave */ 40 #define TCC0_OTMX (1) /* Output Matrix feature implemented */ 41 #define TCC0_OW_NUM (8) /* Number of Output Waveforms */ 42 #define TCC0_PG (1) /* Pattern Generation feature implemented */ 43 #define TCC0_SIZE (24) 44 #define TCC0_SWAP (1) /* DTI outputs swap feature implemented */ 45 46 #endif /* _PIC32CXSG61_TCC0_INSTANCE_ */ 47
