1 /* 2 * Instance header file for PIC32CX1025SG61128 3 * 4 * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries. 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 * 18 */ 19 20 /* file generated from device description file (ATDF) version 2023-03-17T09:48:59Z */ 21 #ifndef _PIC32CXSG61_NVMCTRL_INSTANCE_ 22 #define _PIC32CXSG61_NVMCTRL_INSTANCE_ 23 24 25 /* ========== Instance Parameter definitions for NVMCTRL peripheral ========== */ 26 #define NVMCTRL_BLOCK_SIZE (8192) /* Size Of Block (Bytes, Smallest Granularity for Erase Operation) */ 27 #define NVMCTRL_FLASH_SIZE (1048576) 28 #define NVMCTRL_INSTANCE_ID (34) /* Instance index for NVMCTRL */ 29 #define NVMCTRL_PAGES (2048) 30 #define NVMCTRL_PAGES_PR_REGION (128) 31 #define NVMCTRL_PSM_0_FRMFW_FWS_1_MAX_FREQ (12000000) 32 #define NVMCTRL_PSM_0_FRMHS_FWS_0_MAX_FREQ (25000000) 33 #define NVMCTRL_PSM_0_FRMHS_FWS_1_MAX_FREQ (50000000) 34 #define NVMCTRL_PSM_0_FRMLP_FWS_0_MAX_FREQ (18000000) 35 #define NVMCTRL_PSM_0_FRMLP_FWS_1_MAX_FREQ (36000000) 36 #define NVMCTRL_PSM_1_FRMFW_FWS_1_MAX_FREQ (12000000) 37 #define NVMCTRL_PSM_1_FRMLP_FWS_0_MAX_FREQ (8000000) 38 #define NVMCTRL_PSM_1_FRMLP_FWS_1_MAX_FREQ (12000000) 39 40 #endif /* _PIC32CXSG61_NVMCTRL_INSTANCE_ */ 41
