1 /* 2 * Instance header file for PIC32CX1025SG60128 3 * 4 * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries. 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 * 18 */ 19 20 /* file generated from device description file (ATDF) version 2023-03-17T09:48:46Z */ 21 #ifndef _PIC32CXSG60_USB_INSTANCE_ 22 #define _PIC32CXSG60_USB_INSTANCE_ 23 24 25 /* ========== Instance Parameter definitions for USB peripheral ========== */ 26 #define USB_AHB_2_USB_FIFO_DEPTH (4) /* bytes number, should be at least 2, and 2^n (4,8,16 ...) */ 27 #define USB_AHB_2_USB_RD_DATA_BITS (8) /* 8, 16 or 32, here : 8-bits is required as UTMI interface should work in 8-bits mode */ 28 #define USB_AHB_2_USB_WR_DATA_BITS (32) /* 8, 16 or 32 : here, AHB transfer is made in word mode */ 29 #define USB_AHB_2_USB_WR_THRESHOLD (2) /* as soon as there are N bytes-free inside the fifo, ahb read transfer is requested */ 30 #define USB_DATA_BUS_16_8 (0) /* UTMI/SIE data bus size : 0 -> 8 bits, 1 -> 16 bits */ 31 #define USB_EPNUM (8) /* parameter for rtl : max of ENDPOINT and PIPE NUM */ 32 #define USB_EPT_NUM (8) /* Number of USB end points */ 33 #define USB_GCLK_ID (10) /* Index of Generic Clock */ 34 #define USB_INITIAL_CONTROL_QOS (3) /* CONTROL QOS RESET value */ 35 #define USB_INITIAL_DATA_QOS (3) /* DATA QOS RESET value */ 36 #define USB_INSTANCE_ID (32) /* Instance index for USB */ 37 #define USB_MISSING_SOF_DET_IMPLEMENTED (1) /* 48 mHz xPLL feature implemented */ 38 #define USB_PIPE_NUM (8) /* Number of USB pipes */ 39 #define USB_SYSTEM_CLOCK_IS_CKUSB (0) /* Dual (1'b0) or Single (1'b1) clock system */ 40 #define USB_2_AHB_FIFO_DEPTH (4) /* bytes number, should be at least 2, and 2^n (4,8,16 ...) */ 41 #define USB_2_AHB_RD_DATA_BITS (16) /* 8, 16 or 32, here : 8-bits is required as UTMI interface should work in 8-bits mode */ 42 #define USB_2_AHB_RD_THRESHOLD (2) /* as soon as there are 16 bytes-free inside the fifo, ahb read transfer is requested */ 43 #define USB_2_AHB_WR_DATA_BITS (8) /* 8, 16 or 32 : here : 8-bits is required as UTMI interface should work in 8-bits mode */ 44 45 #endif /* _PIC32CXSG60_USB_INSTANCE_ */ 46
