1 /*
2  * Instance header file for PIC32CX1025SG60128
3  *
4  * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
5  *
6  * Licensed under the Apache License, Version 2.0 (the "License");
7  * you may not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  *   http://www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an "AS IS" BASIS,
14  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  *
18  */
19 
20 /* file generated from device description file (ATDF) version 2023-03-17T09:48:46Z */
21 #ifndef _PIC32CXSG60_TC0_INSTANCE_
22 #define _PIC32CXSG60_TC0_INSTANCE_
23 
24 
25 /* ========== Instance Parameter definitions for TC0 peripheral ========== */
26 #define TC0_CC_NUM                               (2)
27 #define TC0_DMAC_ID_MC0                          (45)       /* Indexes of DMA Match/Compare 0 trigger */
28 #define TC0_DMAC_ID_MC1                          (46)       /* Indexes of DMA Match/Compare 1 trigger */
29 #define TC0_DMAC_ID_OVF                          (44)       /* Indexes of DMA Overflow trigger */
30 #define TC0_EXT                                  (0)        /* Coding of implemented extended features (keep 0 value) */
31 #define TC0_GCLK_ID                              (9)        /* Index of Generic Clock */
32 #define TC0_INSTANCE_ID                          (14)       /* Instance index for TC0 */
33 #define TC0_MASTER_SLAVE_MODE                    (1)        /* TC type 0 : NA, 1 : Master, 2 : Slave */
34 #define TC0_OW_NUM                               (2)        /* Number of Output Waveforms */
35 
36 #endif /* _PIC32CXSG60_TC0_INSTANCE_ */
37