1 /* 2 * Copyright (c) 2024 Microchip 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef _MICROCHIP_PIC32CXSG_SUPC_INSTANCE_FIXUP_H_ 8 #define _MICROCHIP_PIC32CXSG_SUPC_INSTANCE_FIXUP_H_ 9 10 /* ========== Register definition for SUPC peripheral ========== */ 11 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 12 #define REG_SUPC_INTENCLR (0x40001800) /**< \brief (SUPC) Interrupt Enable Clear */ 13 #define REG_SUPC_INTENSET (0x40001804) /**< \brief (SUPC) Interrupt Enable Set */ 14 #define REG_SUPC_INTFLAG (0x40001808) /**< \brief (SUPC) Interrupt Flag Status and Clear */ 15 #define REG_SUPC_STATUS (0x4000180C) /**< \brief (SUPC) Power and Clocks Status */ 16 #define REG_SUPC_BOD33 (0x40001810) /**< \brief (SUPC) BOD33 Control */ 17 #define REG_SUPC_VREG (0x40001818) /**< \brief (SUPC) VREG Control */ 18 #define REG_SUPC_VREF (0x4000181C) /**< \brief (SUPC) VREF Control */ 19 #define REG_SUPC_BBPS (0x40001820) /**< \brief (SUPC) Battery Backup Power Switch */ 20 #define REG_SUPC_BKOUT (0x40001824) /**< \brief (SUPC) Backup Output Control */ 21 #define REG_SUPC_BKIN (0x40001828) /**< \brief (SUPC) Backup Input Control */ 22 #else 23 #define REG_SUPC_INTENCLR (*(RwReg *)0x40001800UL) /**< \brief (SUPC) Interrupt Enable Clear */ 24 #define REG_SUPC_INTENSET (*(RwReg *)0x40001804UL) /**< \brief (SUPC) Interrupt Enable Set */ 25 #define REG_SUPC_INTFLAG (*(RwReg *)0x40001808UL) /**< \brief (SUPC) Interrupt Flag Status and Clear */ 26 #define REG_SUPC_STATUS (*(RoReg *)0x4000180CUL) /**< \brief (SUPC) Power and Clocks Status */ 27 #define REG_SUPC_BOD33 (*(RwReg *)0x40001810UL) /**< \brief (SUPC) BOD33 Control */ 28 #define REG_SUPC_VREG (*(RwReg *)0x40001818UL) /**< \brief (SUPC) VREG Control */ 29 #define REG_SUPC_VREF (*(RwReg *)0x4000181CUL) /**< \brief (SUPC) VREF Control */ 30 #define REG_SUPC_BBPS (*(RwReg *)0x40001820UL) /**< \brief (SUPC) Battery Backup Power Switch */ 31 #define REG_SUPC_BKOUT (*(RwReg *)0x40001824UL) /**< \brief (SUPC) Backup Output Control */ 32 #define REG_SUPC_BKIN (*(RoReg *)0x40001828UL) /**< \brief (SUPC) Backup Input Control */ 33 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 34 35 #endif /* _MICROCHIP_PIC32CXSG_SUPC_INSTANCE_FIXUP_H_ */ 36
