1 /* 2 * Copyright (c) 2024 Microchip 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef _MICROCHIP_PIC32CXSG_PM_INSTANCE_FIXUP_H_ 8 #define _MICROCHIP_PIC32CXSG_PM_INSTANCE_FIXUP_H_ 9 10 /* ========== Register definition for PM peripheral ========== */ 11 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 12 #define REG_PM_CTRLA (0x40000400) /**< \brief (PM) Control A */ 13 #define REG_PM_SLEEPCFG (0x40000401) /**< \brief (PM) Sleep Configuration */ 14 #define REG_PM_INTENCLR (0x40000404) /**< \brief (PM) Interrupt Enable Clear */ 15 #define REG_PM_INTENSET (0x40000405) /**< \brief (PM) Interrupt Enable Set */ 16 #define REG_PM_INTFLAG (0x40000406) /**< \brief (PM) Interrupt Flag Status and Clear */ 17 #define REG_PM_STDBYCFG (0x40000408) /**< \brief (PM) Standby Configuration */ 18 #define REG_PM_HIBCFG (0x40000409) /**< \brief (PM) Hibernate Configuration */ 19 #define REG_PM_BKUPCFG (0x4000040A) /**< \brief (PM) Backup Configuration */ 20 #define REG_PM_PWSAKDLY (0x40000412) /**< \brief (PM) Power Switch Acknowledge Delay */ 21 #else 22 #define REG_PM_CTRLA (*(RwReg8 *)0x40000400UL) /**< \brief (PM) Control A */ 23 #define REG_PM_SLEEPCFG (*(RwReg8 *)0x40000401UL) /**< \brief (PM) Sleep Configuration */ 24 #define REG_PM_INTENCLR (*(RwReg8 *)0x40000404UL) /**< \brief (PM) Interrupt Enable Clear */ 25 #define REG_PM_INTENSET (*(RwReg8 *)0x40000405UL) /**< \brief (PM) Interrupt Enable Set */ 26 #define REG_PM_INTFLAG (*(RwReg8 *)0x40000406UL) /**< \brief (PM) Interrupt Flag Status and Clear */ 27 #define REG_PM_STDBYCFG (*(RwReg8 *)0x40000408UL) /**< \brief (PM) Standby Configuration */ 28 #define REG_PM_HIBCFG (*(RwReg8 *)0x40000409UL) /**< \brief (PM) Hibernate Configuration */ 29 #define REG_PM_BKUPCFG (*(RwReg8 *)0x4000040AUL) /**< \brief (PM) Backup Configuration */ 30 #define REG_PM_PWSAKDLY (*(RwReg8 *)0x40000412UL) /**< \brief (PM) Power Switch Acknowledge Delay */ 31 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 32 33 #endif /* _MICROCHIP_PIC32CXSG_PM_INSTANCE_FIXUP_H_ */ 34