1 /*
2  * Copyright (c) 2024 Microchip
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef _MICROCHIP_PIC32CXSG_FREQM_INSTANCE_FIXUP_H_
8 #define _MICROCHIP_PIC32CXSG_FREQM_INSTANCE_FIXUP_H_
9 
10 /* ========== Register definition for FREQM peripheral ========== */
11 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
12 #define REG_FREQM_CTRLA            (0x40002C00) /**< \brief (FREQM) Control A Register */
13 #define REG_FREQM_CTRLB            (0x40002C01) /**< \brief (FREQM) Control B Register */
14 #define REG_FREQM_CFGA             (0x40002C02) /**< \brief (FREQM) Config A register */
15 #define REG_FREQM_INTENCLR         (0x40002C08) /**< \brief (FREQM) Interrupt Enable Clear Register */
16 #define REG_FREQM_INTENSET         (0x40002C09) /**< \brief (FREQM) Interrupt Enable Set Register */
17 #define REG_FREQM_INTFLAG          (0x40002C0A) /**< \brief (FREQM) Interrupt Flag Register */
18 #define REG_FREQM_STATUS           (0x40002C0B) /**< \brief (FREQM) Status Register */
19 #define REG_FREQM_SYNCBUSY         (0x40002C0C) /**< \brief (FREQM) Synchronization Busy Register */
20 #define REG_FREQM_VALUE            (0x40002C10) /**< \brief (FREQM) Count Value Register */
21 #else
22 #define REG_FREQM_CTRLA            (*(RwReg8 *)0x40002C00UL) /**< \brief (FREQM) Control A Register */
23 #define REG_FREQM_CTRLB            (*(WoReg8 *)0x40002C01UL) /**< \brief (FREQM) Control B Register */
24 #define REG_FREQM_CFGA             (*(RwReg16*)0x40002C02UL) /**< \brief (FREQM) Config A register */
25 #define REG_FREQM_INTENCLR         (*(RwReg8 *)0x40002C08UL) /**< \brief (FREQM) Interrupt Enable Clear Register */
26 #define REG_FREQM_INTENSET         (*(RwReg8 *)0x40002C09UL) /**< \brief (FREQM) Interrupt Enable Set Register */
27 #define REG_FREQM_INTFLAG          (*(RwReg8 *)0x40002C0AUL) /**< \brief (FREQM) Interrupt Flag Register */
28 #define REG_FREQM_STATUS           (*(RwReg8 *)0x40002C0BUL) /**< \brief (FREQM) Status Register */
29 #define REG_FREQM_SYNCBUSY         (*(RoReg  *)0x40002C0CUL) /**< \brief (FREQM) Synchronization Busy Register */
30 #define REG_FREQM_VALUE            (*(RoReg  *)0x40002C10UL) /**< \brief (FREQM) Count Value Register */
31 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
32 
33 #endif /* _MICROCHIP_PIC32CXSG_FREQM_INSTANCE_FIXUP_H_ */
34