1 /*
2  * Copyright (c) 2024 Microchip
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef _MICROCHIP_PIC32CXSG_TRNG_COMPONENT_FIXUP_H_
8 #define _MICROCHIP_PIC32CXSG_TRNG_COMPONENT_FIXUP_H_
9 
10 /* -------- TRNG_CTRLA : (TRNG Offset: 0x00) (R/W 8) Control A -------- */
11 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
12 typedef union {
13   struct {
14     uint8_t  :1;               /*!< bit:      0  Reserved                           */
15     uint8_t  ENABLE:1;         /*!< bit:      1  Enable                             */
16     uint8_t  :4;               /*!< bit:  2.. 5  Reserved                           */
17     uint8_t  RUNSTDBY:1;       /*!< bit:      6  Run in Standby                     */
18     uint8_t  :1;               /*!< bit:      7  Reserved                           */
19   } bit;                       /*!< Structure used for bit  access                  */
20   uint8_t reg;                 /*!< Type      used for register access              */
21 } TRNG_CTRLA_Type;
22 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
23 
24 /* -------- TRNG_EVCTRL : (TRNG Offset: 0x04) (R/W 8) Event Control -------- */
25 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
26 typedef union {
27   struct {
28     uint8_t  DATARDYEO:1;      /*!< bit:      0  Data Ready Event Output            */
29     uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
30   } bit;                       /*!< Structure used for bit  access                  */
31   uint8_t reg;                 /*!< Type      used for register access              */
32 } TRNG_EVCTRL_Type;
33 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
34 
35 /* -------- TRNG_INTENCLR : (TRNG Offset: 0x08) (R/W 8) Interrupt Enable Clear -------- */
36 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
37 typedef union {
38   struct {
39     uint8_t  DATARDY:1;        /*!< bit:      0  Data Ready Interrupt Enable        */
40     uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
41   } bit;                       /*!< Structure used for bit  access                  */
42   uint8_t reg;                 /*!< Type      used for register access              */
43 } TRNG_INTENCLR_Type;
44 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
45 
46 /* -------- TRNG_INTENSET : (TRNG Offset: 0x09) (R/W 8) Interrupt Enable Set -------- */
47 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
48 typedef union {
49   struct {
50     uint8_t  DATARDY:1;        /*!< bit:      0  Data Ready Interrupt Enable        */
51     uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
52   } bit;                       /*!< Structure used for bit  access                  */
53   uint8_t reg;                 /*!< Type      used for register access              */
54 } TRNG_INTENSET_Type;
55 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
56 
57 /* -------- TRNG_INTFLAG : (TRNG Offset: 0x0A) (R/W 8) Interrupt Flag Status and Clear -------- */
58 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
59 typedef union { // __I to avoid read-modify-write on write-to-clear register
60   struct {
61     __I uint8_t  DATARDY:1;        /*!< bit:      0  Data Ready Interrupt Flag          */
62     __I uint8_t  :7;               /*!< bit:  1.. 7  Reserved                           */
63   } bit;                       /*!< Structure used for bit  access                  */
64   uint8_t reg;                 /*!< Type      used for register access              */
65 } TRNG_INTFLAG_Type;
66 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
67 
68 /* -------- TRNG_DATA : (TRNG Offset: 0x20) ( R/ 32) Output Data -------- */
69 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
70 typedef union {
71   struct {
72     uint32_t DATA:32;          /*!< bit:  0..31  Output Data                        */
73   } bit;                       /*!< Structure used for bit  access                  */
74   uint32_t reg;                /*!< Type      used for register access              */
75 } TRNG_DATA_Type;
76 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
77 
78 /** \brief TRNG hardware registers */
79 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
80 typedef struct {
81   __IO TRNG_CTRLA_Type           CTRLA;       /**< \brief Offset: 0x00 (R/W  8) Control A */
82        RoReg8                    Reserved1[0x3];
83   __IO TRNG_EVCTRL_Type          EVCTRL;      /**< \brief Offset: 0x04 (R/W  8) Event Control */
84        RoReg8                    Reserved2[0x3];
85   __IO TRNG_INTENCLR_Type        INTENCLR;    /**< \brief Offset: 0x08 (R/W  8) Interrupt Enable Clear */
86   __IO TRNG_INTENSET_Type        INTENSET;    /**< \brief Offset: 0x09 (R/W  8) Interrupt Enable Set */
87   __IO TRNG_INTFLAG_Type         INTFLAG;     /**< \brief Offset: 0x0A (R/W  8) Interrupt Flag Status and Clear */
88        RoReg8                    Reserved3[0x15];
89   __I  TRNG_DATA_Type            DATA;        /**< \brief Offset: 0x20 (R/  32) Output Data */
90 } Trng;
91 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
92 
93 #endif /* _MICROCHIP_PIC32CXSG_TRNG_COMPONENT_FIXUP_H_ */
94