1 /*******************************************************************************
2  * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * MPFS HAL Embedded Software
7  *
8  */
9 /*******************************************************************************
10  *
11  *  Hardware registers access macros.
12  *
13  *  THE MACROS DEFINED IN THIS FILE ARE DEPRECATED. DO NOT USE FOR NEW
14  *  DEVELOPMENT.
15  *
16  * These macros are used to access peripheral registers. They allow access to
17  * 8, 16 and 32 bit wide registers. All accesses to peripheral registers should
18  * be done through these macros in order to ease porting across different
19  * processors/bus architectures.
20  *
21  * Some of these macros also allow access to a specific register field.
22  *
23  */
24 
25 #ifndef HW_MACROS_H
26 #define HW_MACROS_H
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
32 /*------------------------------------------------------------------------------
33  * 32 bits registers access:
34  */
35 #define HW_get_uint32_reg(BASE_ADDR, REG_OFFSET) (*((uint32_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)))
36 
37 #define HW_set_uint32_reg(BASE_ADDR, REG_OFFSET, VALUE) (*((uint32_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)) = (VALUE))
38 
39 #define HW_set_uint32_reg_field(BASE_ADDR, FIELD, VALUE) \
40             (*((uint32_t volatile *)(BASE_ADDR + FIELD##_OFFSET)) =  \
41                 ( \
42                     (uint32_t) \
43                     ( \
44                     (*((uint32_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & ~FIELD##_MASK) | \
45                     (uint32_t)(((VALUE) << FIELD##_SHIFT) & FIELD##_MASK) \
46                 ) \
47             )
48 
49 #define HW_get_uint32_reg_field( BASE_ADDR, FIELD ) \
50             (( (*((uint32_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & FIELD##_MASK) >> FIELD##_SHIFT)
51 
52 /*------------------------------------------------------------------------------
53  * 32 bits memory access:
54  */
55 #define HW_get_uint32(BASE_ADDR) (*((uint32_t volatile *)(BASE_ADDR)))
56 
57 #define HW_set_uint32(BASE_ADDR, VALUE) (*((uint32_t volatile *)(BASE_ADDR)) = (VALUE))
58 
59 /*------------------------------------------------------------------------------
60  * 16 bits registers access:
61  */
62 #define HW_get_uint16_reg(BASE_ADDR, REG_OFFSET) (*((uint16_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)))
63 
64 #define HW_set_uint16_reg(BASE_ADDR, REG_OFFSET, VALUE) (*((uint16_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)) = (VALUE))
65 
66 #define HW_set_uint16_reg_field(BASE_ADDR, FIELD, VALUE) \
67             (*((uint16_t volatile *)(BASE_ADDR + FIELD##_OFFSET)) =  \
68                 ( \
69                     (uint16_t) \
70                     ( \
71                     (*((uint16_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & ~FIELD##_MASK) | \
72                     (uint16_t)(((VALUE) << FIELD##_SHIFT) & FIELD##_MASK) \
73                 ) \
74             )
75 
76 #define HW_get_uint16_reg_field( BASE_ADDR, FIELD ) \
77             (( (*((uint16_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & FIELD##_MASK) >> FIELD##_SHIFT)
78 
79 /*------------------------------------------------------------------------------
80  * 8 bits registers access:
81  */
82 #define HW_get_uint8_reg(BASE_ADDR, REG_OFFSET) (*((uint8_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)))
83 
84 #define HW_set_uint8_reg(BASE_ADDR, REG_OFFSET, VALUE) (*((uint8_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)) = (VALUE))
85 
86 #define HW_set_uint8_reg_field(BASE_ADDR, FIELD, VALUE) \
87             (*((uint8_t volatile *)(BASE_ADDR + FIELD##_OFFSET)) =  \
88                 ( \
89                     (uint8_t) \
90                     ( \
91                     (*((uint8_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & ~FIELD##_MASK) | \
92                     (uint8_t)(((VALUE) << FIELD##_SHIFT) & FIELD##_MASK) \
93                 ) \
94             )
95 
96 #define HW_get_uint8_reg_field( BASE_ADDR, FIELD ) \
97             (( (*((uint8_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & FIELD##_MASK) >> FIELD##_SHIFT)
98 
99 /*------------------------------------------------------------------------------
100  * 8 bits memory access:
101  */
102 #define HW_get_uint8(BASE_ADDR) (*((uint8_t volatile *)(BASE_ADDR)))
103 
104 #define HW_set_uint8(BASE_ADDR, VALUE) (*((uint8_t volatile *)(BASE_ADDR)) = (VALUE))
105 
106 
107 
108 #ifdef __cplusplus
109 extern "C" {
110 #endif
111 
112 #endif /* HW_MACROS_ */
113 
114 
115