1 /*******************************************************************************
2 * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * PolarFire SoC MSS USB Driver Stack
7 * USB Core Interface Layer (USB-CIFL)
8 * USBH-CIF
9 *
10 * This file provides interfaces to perform register and register bit level
11 * read / write operations in USB Host mode.
12 *
13 */
14
15 #ifndef __MSS_USB_HOST_REG_IO_H_
16 #define __MSS_USB_HOST_REG_IO_H_
17
18 #ifdef __cplusplus
19 extern "C" {
20 #endif
21
22 #include "mss_usb_core_regs.h"
23
24 /*------------------------------------------------------------------------- *//**
25 Host Mode Functions
26 ============================
27 */
28
29 /*------------------------------------------------------------------------- *//**
30 CSR0L register related APIs
31 */
32 static __INLINE uint8_t
MSS_USBH_CIF_cep_is_rxstall_err(void)33 MSS_USBH_CIF_cep_is_rxstall_err
34 (
35 void
36 )
37 {
38 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0L_HOST_STALL_RCVD_MASK) ?
39 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
40 }
41
42 static __INLINE void
MSS_USBH_CIF_cep_clr_rxstall_err(void)43 MSS_USBH_CIF_cep_clr_rxstall_err
44 (
45 void
46 )
47 {
48 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0L_HOST_STALL_RCVD_MASK;
49 }
50
51 static __INLINE uint8_t
MSS_USBH_CIF_cep_is_retry_err(void)52 MSS_USBH_CIF_cep_is_retry_err
53 (
54 void
55 )
56 {
57 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0L_HOST_RETRY_ERR_MASK) ?
58 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
59 }
60
61 static __INLINE void
MSS_USBH_CIF_cep_clr_retry_err(void)62 MSS_USBH_CIF_cep_clr_retry_err
63 (
64 void
65 )
66 {
67 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0L_HOST_RETRY_ERR_MASK;
68 }
69
70 static __INLINE void
MSS_USBH_CIF_cep_clr_csr_reg(void)71 MSS_USBH_CIF_cep_clr_csr_reg
72 (
73 void
74 )
75 {
76 USB->ENDPOINT[MSS_USB_CEP].TX_CSR = 0x0000u;
77 }
78
79 static __INLINE uint8_t
MSS_USBH_CIF_cep_is_naktimeout_err(void)80 MSS_USBH_CIF_cep_is_naktimeout_err
81 (
82 void
83 )
84 {
85 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0L_HOST_NAK_TIMEOUT_MASK) ?
86 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
87 }
88
89 static __INLINE void
MSS_USBH_CIF_cep_clr_naktimeout_err(void)90 MSS_USBH_CIF_cep_clr_naktimeout_err
91 (
92 void
93 )
94 {
95 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0L_HOST_NAK_TIMEOUT_MASK;
96 }
97
98 /*-------------------------------------------------------------------------*//**
99 CSR0H register related APIs
100 */
101 static __INLINE void
MSS_USBH_CIF_cep_flush_fifo(mss_usb_ep_num_t ep_num)102 MSS_USBH_CIF_cep_flush_fifo
103 (
104 mss_usb_ep_num_t ep_num
105 )
106 {
107 /* should be set when TxPktRdy/RxPktRdy is set */
108 if ((USB->ENDPOINT[ep_num].TX_CSR) & (TxCSRL_HOST_EPN_TX_PKT_RDY_MASK |
109 CSR0L_HOST_RX_PKT_RDY_MASK))
110 {
111 USB->ENDPOINT[MSS_USB_CEP].TX_CSR |= CSR0H_HOST_FLUSH_FIFO_MASK;
112 }
113 }
114
115 static __INLINE uint8_t
MSS_USBH_CIF_cep_is_data_tog(void)116 MSS_USBH_CIF_cep_is_data_tog
117 (
118 void
119 )
120 {
121 return (((USB->ENDPOINT[MSS_USB_CEP].TX_CSR & CSR0H_HOST_DATA_TOG_MASK) ?
122 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
123 }
124
125 static __INLINE void
MSS_USBH_CIF_cep_disable_ping(void)126 MSS_USBH_CIF_cep_disable_ping
127 (
128 void
129 )
130 {
131 USB->ENDPOINT[MSS_USB_CEP].TX_CSR |= CSR0H_HOST_DISABLE_PING_MASK;
132 }
133
134 static __INLINE void
MSS_USBH_CIF_cep_enable_ping(void)135 MSS_USBH_CIF_cep_enable_ping
136 (
137 void
138 )
139 {
140 USB->ENDPOINT[MSS_USB_CEP].TX_CSR &= ~CSR0H_HOST_DISABLE_PING_MASK;
141 }
142
143 /*-------------------------------------------------------------------------*//**
144 NAKLIMIT0 register related APIs
145 */
146 static __INLINE void
MSS_USBH_CIF_cep_set_naklimit(uint8_t naklimit)147 MSS_USBH_CIF_cep_set_naklimit
148 (
149 uint8_t naklimit
150 )
151 {
152 if((naklimit >= 2u ) && (naklimit <= 16u))
153 {
154 USB->ENDPOINT[MSS_USB_CEP].TX_INTERVAL = naklimit;
155 }
156 }
157
158 /*-------------------------------------------------------------------------*//**
159 ENDOF - Host mode functions
160 */
161
162 /* TXMAXP is common to host and device */
163 /*-------------------------------------------------------------------------*//**
164 TXCSRL register related APIs
165 */
166
MSS_USBH_CIF_tx_ep_set_txpktrdy(mss_usb_ep_num_t ep_num)167 static __INLINE void MSS_USBH_CIF_tx_ep_set_txpktrdy(mss_usb_ep_num_t ep_num)
168 {
169 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRL_HOST_EPN_TX_PKT_RDY_MASK;
170 }
171
172 static __INLINE uint8_t
MSS_USBH_CIF_tx_ep_is_txpktrdy(mss_usb_ep_num_t ep_num)173 MSS_USBH_CIF_tx_ep_is_txpktrdy
174 (
175 mss_usb_ep_num_t ep_num
176 )
177 {
178 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRL_HOST_EPN_TX_PKT_RDY_MASK) ?
179 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
180 }
181
182 static __INLINE uint8_t
MSS_USBH_CIF_tx_ep_is_fifo_ne(mss_usb_ep_num_t ep_num)183 MSS_USBH_CIF_tx_ep_is_fifo_ne
184 (
185 mss_usb_ep_num_t ep_num
186 )
187 {
188 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRL_HOST_EPN_TX_FIFO_NE_MASK) ?
189 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
190 }
191
192 static __INLINE uint8_t
MSS_USBH_CIF_tx_ep_is_retry_err(mss_usb_ep_num_t ep_num)193 MSS_USBH_CIF_tx_ep_is_retry_err
194 (
195 mss_usb_ep_num_t ep_num
196 )
197 {
198 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRL_HOST_EPN_RESPONSE_ERR_MASK) ?
199 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
200 }
201
202 static __INLINE void
MSS_USBH_CIF_tx_ep_clr_retry_err(mss_usb_ep_num_t ep_num)203 MSS_USBH_CIF_tx_ep_clr_retry_err
204 (
205 mss_usb_ep_num_t ep_num
206 )
207 {
208 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRL_HOST_EPN_RESPONSE_ERR_MASK;
209 }
210
211 static __INLINE void
MSS_USBH_CIF_tx_ep_flush_fifo_reg(mss_usb_ep_num_t ep_num)212 MSS_USBH_CIF_tx_ep_flush_fifo_reg
213 (
214 mss_usb_ep_num_t ep_num
215 )
216 {
217 USB->ENDPOINT[ep_num].TX_CSR |= (TxCSRL_HOST_EPN_FLUSH_FIFO_MASK |
218 TxCSRL_HOST_EPN_TX_PKT_RDY_MASK);
219 }
220
221 static __INLINE uint8_t
MSS_USBH_CIF_tx_ep_is_rxstall_err(mss_usb_ep_num_t ep_num)222 MSS_USBH_CIF_tx_ep_is_rxstall_err
223 (
224 mss_usb_ep_num_t ep_num
225 )
226 {
227 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRL_HOST_EPN_STALL_RCVD_MASK) ?
228 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
229 }
230
231 static __INLINE void
MSS_USBH_CIF_tx_ep_clr_rxstall_err(mss_usb_ep_num_t ep_num)232 MSS_USBH_CIF_tx_ep_clr_rxstall_err
233 (
234 mss_usb_ep_num_t ep_num
235 )
236 {
237 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRL_HOST_EPN_STALL_RCVD_MASK;
238 }
239
240 static __INLINE void
MSS_USBH_CIF_tx_ep_clr_data_tog(mss_usb_ep_num_t ep_num)241 MSS_USBH_CIF_tx_ep_clr_data_tog
242 (
243 mss_usb_ep_num_t ep_num
244 )
245 {
246 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRL_HOST_EPN_CLR_DATA_TOG_MASK;
247 }
248
249
250 static __INLINE uint8_t
MSS_USBH_CIF_tx_ep_is_naktimeout_err(mss_usb_ep_num_t ep_num)251 MSS_USBH_CIF_tx_ep_is_naktimeout_err
252 (
253 mss_usb_ep_num_t ep_num
254 )
255 {
256 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRL_HOST_EPN_NAK_TIMEOUT_MASK) ?
257 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
258 }
259
260 static __INLINE void
MSS_USBH_CIF_tx_ep_clr_naktimeout_err(mss_usb_ep_num_t ep_num)261 MSS_USBH_CIF_tx_ep_clr_naktimeout_err
262 (
263 mss_usb_ep_num_t ep_num
264 )
265 {
266 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRL_HOST_EPN_NAK_TIMEOUT_MASK ;
267 }
268
269 /*-------------------------------------------------------------------------*//**
270 TXCSRH register related APIs
271 */
272
273 static __INLINE uint8_t
MSS_USBH_CIF_tx_ep_is_data_tog(mss_usb_ep_num_t ep_num)274 MSS_USBH_CIF_tx_ep_is_data_tog
275 (
276 mss_usb_ep_num_t ep_num
277 )
278 {
279 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRH_HOST_EPN_DATA_TOG_MASK) ?
280 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
281 }
282
283 static __INLINE void
MSS_USBH_CIF_tx_ep_write_data_tog(mss_usb_ep_num_t ep_num,uint32_t data_tog)284 MSS_USBH_CIF_tx_ep_write_data_tog
285 (
286 mss_usb_ep_num_t ep_num,
287 uint32_t data_tog
288 )
289 {
290 /* data_tog has to be 0 or 1 */
291 USB->ENDPOINT[ep_num].TX_CSR = data_tog & 0x00000001U;
292 }
293
294 static __INLINE void
MSS_USBH_CIF_tx_ep_set_data_tog_we(mss_usb_ep_num_t ep_num)295 MSS_USBH_CIF_tx_ep_set_data_tog_we
296 (
297 mss_usb_ep_num_t ep_num
298 )
299 {
300 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRH_HOST_EPN_DATA_TOG_WE_MASK;
301 }
302
303 static __INLINE void
MSS_USBH_CIF_tx_ep_clr_data_tog_we(mss_usb_ep_num_t ep_num)304 MSS_USBH_CIF_tx_ep_clr_data_tog_we
305 (
306 mss_usb_ep_num_t ep_num
307 )
308 {
309 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRH_HOST_EPN_DATA_TOG_WE_MASK;
310 }
311
312 static __INLINE void
MSS_USBH_CIF_tx_ep_set_dma_mode1(mss_usb_ep_num_t ep_num)313 MSS_USBH_CIF_tx_ep_set_dma_mode1
314 (
315 mss_usb_ep_num_t ep_num
316 )
317 {
318 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRH_HOST_EPN_DMA_MODE_MASK;
319 }
320
321 static __INLINE void
MSS_USBH_CIF_tx_ep_set_dma_mode0(mss_usb_ep_num_t ep_num)322 MSS_USBH_CIF_tx_ep_set_dma_mode0
323 (
324 mss_usb_ep_num_t ep_num
325 )
326 {
327 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRH_HOST_EPN_DMA_MODE_MASK;
328 }
329
330 static __INLINE uint8_t
MSS_USBH_CIF_tx_ep_get_dma_mode(mss_usb_ep_num_t ep_num)331 MSS_USBH_CIF_tx_ep_get_dma_mode
332 (
333 mss_usb_ep_num_t ep_num
334 )
335 {
336 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRH_HOST_EPN_DMA_MODE_MASK) ?
337 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
338 }
339
340 static __INLINE void
MSS_USBH_CIF_tx_ep_set_force_data_tog(mss_usb_ep_num_t ep_num)341 MSS_USBH_CIF_tx_ep_set_force_data_tog
342 (
343 mss_usb_ep_num_t ep_num
344 )
345 {
346 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRH_HOST_EPN_FRC_DATA_TOG_MASK;
347 }
348
349 static __INLINE void
MSS_USBH_CIF_tx_ep_clr_force_data_tog(mss_usb_ep_num_t ep_num)350 MSS_USBH_CIF_tx_ep_clr_force_data_tog
351 (
352 mss_usb_ep_num_t ep_num
353 )
354 {
355 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRH_HOST_EPN_FRC_DATA_TOG_MASK;
356 }
357
358 static __INLINE void
MSS_USBH_CIF_tx_ep_enable_dma(mss_usb_ep_num_t ep_num)359 MSS_USBH_CIF_tx_ep_enable_dma
360 (
361 mss_usb_ep_num_t ep_num
362 )
363 {
364 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRH_HOST_EPN_ENABLE_DMA_MASK;
365 }
366
367 static __INLINE void
MSS_USBH_CIF_tx_ep_disable_dma(mss_usb_ep_num_t ep_num)368 MSS_USBH_CIF_tx_ep_disable_dma
369 (
370 mss_usb_ep_num_t ep_num
371 )
372 {
373 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRH_HOST_EPN_ENABLE_DMA_MASK;
374 }
375
376 static __INLINE uint8_t
MSS_USBH_CIF_tx_ep_is_dma_enabled(mss_usb_ep_num_t ep_num)377 MSS_USBH_CIF_tx_ep_is_dma_enabled
378 (
379 mss_usb_ep_num_t ep_num
380 )
381 {
382 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRH_HOST_EPN_ENABLE_DMA_MASK) ?
383 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
384 }
385
386 static __INLINE void
MSS_USBH_CIF_tx_ep_set_autoset(mss_usb_ep_num_t ep_num)387 MSS_USBH_CIF_tx_ep_set_autoset
388 (
389 mss_usb_ep_num_t ep_num
390 )
391 {
392 USB->ENDPOINT[ep_num].TX_CSR |= TxCSRH_HOST_EPN_ENABLE_AUTOSET_MASK;
393 }
394 static __INLINE void
MSS_USBH_CIF_tx_ep_clr_autoset(mss_usb_ep_num_t ep_num)395 MSS_USBH_CIF_tx_ep_clr_autoset
396 (
397 mss_usb_ep_num_t ep_num
398 )
399 {
400 USB->ENDPOINT[ep_num].TX_CSR &= ~TxCSRH_HOST_EPN_ENABLE_AUTOSET_MASK;
401 }
402
403 static __INLINE uint8_t
MSS_USBH_CIF_tx_ep_is_autoset(mss_usb_ep_num_t ep_num)404 MSS_USBH_CIF_tx_ep_is_autoset
405 (
406 mss_usb_ep_num_t ep_num
407 )
408 {
409 return (((USB->ENDPOINT[ep_num].TX_CSR & TxCSRH_HOST_EPN_ENABLE_AUTOSET_MASK) ?
410 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
411 }
412
413 /*-------------------------------------------------------------------------*//**
414 RXCSRL register related APIs
415 */
416 static __INLINE uint8_t
MSS_USBH_CIF_rx_ep_is_rxpktrdy(mss_usb_ep_num_t ep_num)417 MSS_USBH_CIF_rx_ep_is_rxpktrdy
418 (
419 mss_usb_ep_num_t ep_num
420 )
421 {
422 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRL_HOST_EPN_RX_PKT_RDY_MASK) ?
423 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
424 }
425
426 static __INLINE uint8_t
MSS_USBH_CIF_rx_ep_is_fifo_full(mss_usb_ep_num_t ep_num)427 MSS_USBH_CIF_rx_ep_is_fifo_full
428 (
429 mss_usb_ep_num_t ep_num
430 )
431 {
432 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRL_HOST_EPN_RX_FIFO_FULL_MASK) ?
433 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
434 }
435
436 static __INLINE uint8_t
MSS_USBH_CIF_rx_ep_is_retry_err(mss_usb_ep_num_t ep_num)437 MSS_USBH_CIF_rx_ep_is_retry_err
438 (
439 mss_usb_ep_num_t ep_num
440 )
441 {
442 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRL_HOST_EPN_RESPONSE_ERR_MASK) ?
443 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
444 }
445
446 static __INLINE void
MSS_USBH_CIF_rx_ep_clr_retry_err(mss_usb_ep_num_t ep_num)447 MSS_USBH_CIF_rx_ep_clr_retry_err
448 (
449 mss_usb_ep_num_t ep_num
450 )
451 {
452 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRL_HOST_EPN_RESPONSE_ERR_MASK;
453 }
454
455 static __INLINE uint8_t
MSS_USBH_CIF_rx_ep_is_naktimeout_err(mss_usb_ep_num_t ep_num)456 MSS_USBH_CIF_rx_ep_is_naktimeout_err
457 (
458 mss_usb_ep_num_t ep_num
459 )
460 {
461 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRL_HOST_EPN_NAK_TIMEOUT_ERR_MASK) ?
462 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
463 }
464
465 static __INLINE void
MSS_USBH_CIF_rx_ep_clr_naktimeout_err(mss_usb_ep_num_t ep_num)466 MSS_USBH_CIF_rx_ep_clr_naktimeout_err
467 (
468 mss_usb_ep_num_t ep_num
469 )
470 {
471 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRL_HOST_EPN_NAK_TIMEOUT_ERR_MASK;
472 }
473
474 static __INLINE void
MSS_USBH_CIF_rx_ep_flush_fifo_reg(mss_usb_ep_num_t ep_num)475 MSS_USBH_CIF_rx_ep_flush_fifo_reg
476 (
477 mss_usb_ep_num_t ep_num
478 )
479 {
480 USB->ENDPOINT[ep_num].RX_CSR |= RXCSRL_HOST_EPN_FLUSH_FIFO_MASK;
481 }
482
483 static __INLINE uint8_t
MSS_USBH_CIF_rx_ep_is_rxstall_err(mss_usb_ep_num_t ep_num)484 MSS_USBH_CIF_rx_ep_is_rxstall_err
485 (
486 mss_usb_ep_num_t ep_num
487 )
488 {
489 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRL_HOST_EPN_STALL_RCVD_MASK) ?
490 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
491 }
492
493 static __INLINE void
MSS_USBH_CIF_rx_ep_clr_rxstall_err(mss_usb_ep_num_t ep_num)494 MSS_USBH_CIF_rx_ep_clr_rxstall_err
495 (
496 mss_usb_ep_num_t ep_num
497 )
498 {
499 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRL_HOST_EPN_STALL_RCVD_MASK;
500 }
501
502 static __INLINE void
MSS_USBH_CIF_rx_ep_clr_data_tog(mss_usb_ep_num_t ep_num)503 MSS_USBH_CIF_rx_ep_clr_data_tog
504 (
505 mss_usb_ep_num_t ep_num
506 )
507 {
508 USB->ENDPOINT[ep_num].RX_CSR |= RXCSRL_HOST_EPN_CLR_DATA_TOG_MASK;
509 }
510
511 /*-------------------------------------------------------------------------*//**
512 RXCSRH register related APIs
513 */
514 static __INLINE uint8_t
MSS_USBH_CIF_rx_ep_is_iso_incomp(mss_usb_ep_num_t ep_num)515 MSS_USBH_CIF_rx_ep_is_iso_incomp
516 (
517 mss_usb_ep_num_t ep_num
518 )
519 {
520 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRH_HOST_EPN_RX_ISO_INCOMP) ?
521 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
522 }
523
524 static __INLINE uint8_t
MSS_USBH_CIF_rx_ep_is_data_tog(mss_usb_ep_num_t ep_num)525 MSS_USBH_CIF_rx_ep_is_data_tog
526 (
527 mss_usb_ep_num_t ep_num
528 )
529 {
530 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRH_HOST_EPN_DATA_TOG_MASK) ?
531 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
532 }
533
534 static __INLINE void
MSS_USBH_CIF_rx_ep_write_data_tog(mss_usb_ep_num_t ep_num,uint32_t data_tog)535 MSS_USBH_CIF_rx_ep_write_data_tog
536 (
537 mss_usb_ep_num_t ep_num,
538 uint32_t data_tog
539 )
540 {
541 USB->ENDPOINT[ep_num].RX_CSR = data_tog;
542 }
543
544 static __INLINE void
MSS_USBH_CIF_rx_ep_set_data_tog_we(mss_usb_ep_num_t ep_num)545 MSS_USBH_CIF_rx_ep_set_data_tog_we
546 (
547 mss_usb_ep_num_t ep_num
548 )
549 {
550 USB->ENDPOINT[ep_num].RX_CSR |= RXCSRH_HOST_EPN_DATA_TOG_WE_MASK;
551 }
552
553 static __INLINE void
MSS_USBH_CIF_rx_ep_clr_data_tog_we(mss_usb_ep_num_t ep_num)554 MSS_USBH_CIF_rx_ep_clr_data_tog_we
555 (
556 mss_usb_ep_num_t ep_num
557 )
558 {
559 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRH_HOST_EPN_DATA_TOG_WE_MASK;
560 }
561
562 static __INLINE mss_usb_dma_mode_t
MSS_USBH_CIF_rx_ep_get_dma_mode(mss_usb_ep_num_t ep_num)563 MSS_USBH_CIF_rx_ep_get_dma_mode
564 (
565 mss_usb_ep_num_t ep_num
566 )
567 {
568 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRH_HOST_EPN_DMA_MODE_MASK) ?
569 MSS_USB_DMA_MODE1 : MSS_USB_DMA_MODE0));
570 }
571
572 static __INLINE void
MSS_USBH_CIF_rx_ep_set_dma_mode1(mss_usb_ep_num_t ep_num)573 MSS_USBH_CIF_rx_ep_set_dma_mode1
574 (
575 mss_usb_ep_num_t ep_num
576 )
577 {
578 USB->ENDPOINT[ep_num].RX_CSR |= RXCSRH_HOST_EPN_DMA_MODE_MASK;
579 }
580
581 static __INLINE void
MSS_USBH_CIF_rx_ep_set_dma_mode0(mss_usb_ep_num_t ep_num)582 MSS_USBH_CIF_rx_ep_set_dma_mode0
583 (
584 mss_usb_ep_num_t ep_num
585 )
586 {
587 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRH_HOST_EPN_DMA_MODE_MASK;
588 }
589
590 static __INLINE void
MSS_USBH_CIF_rx_ep_enable_dma(mss_usb_ep_num_t ep_num)591 MSS_USBH_CIF_rx_ep_enable_dma
592 (
593 mss_usb_ep_num_t ep_num
594 )
595 {
596 USB->ENDPOINT[ep_num].RX_CSR |= RXCSRH_HOST_EPN_ENABLE_DMA_MASK;
597 }
598
599 static __INLINE void
MSS_USBH_CIF_rx_ep_disable_dma(mss_usb_ep_num_t ep_num)600 MSS_USBH_CIF_rx_ep_disable_dma
601 (
602 mss_usb_ep_num_t ep_num
603 )
604 {
605 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRH_HOST_EPN_ENABLE_DMA_MASK;
606 }
607
608 static __INLINE uint8_t
MSS_USBH_CIF_rx_ep_is_dma_enabled(mss_usb_ep_num_t ep_num)609 MSS_USBH_CIF_rx_ep_is_dma_enabled
610 (
611 mss_usb_ep_num_t ep_num
612 )
613 {
614 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRH_HOST_EPN_ENABLE_DMA_MASK) ?
615 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
616 }
617
618 static __INLINE void
MSS_USBH_CIF_rx_ep_set_autoreq(mss_usb_ep_num_t ep_num)619 MSS_USBH_CIF_rx_ep_set_autoreq
620 (
621 mss_usb_ep_num_t ep_num
622 )
623 {
624 USB->ENDPOINT[ep_num].RX_CSR |= RXCSRH_HOST_EPN_ENABLE_AUTOREQ_MASK;
625 }
626
627 static __INLINE void
MSS_USBH_CIF_rx_ep_clr_autoreq(mss_usb_ep_num_t ep_num)628 MSS_USBH_CIF_rx_ep_clr_autoreq
629 (
630 mss_usb_ep_num_t ep_num
631 )
632 {
633 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRH_HOST_EPN_ENABLE_AUTOREQ_MASK;
634 }
635
636 static __INLINE void
MSS_USBH_CIF_rx_ep_set_autoclr(mss_usb_ep_num_t ep_num)637 MSS_USBH_CIF_rx_ep_set_autoclr
638 (
639 mss_usb_ep_num_t ep_num
640 )
641 {
642 USB->ENDPOINT[ep_num].RX_CSR |= RXCSRH_HOST_EPN_ENABLE_AUTOCLR_MASK;
643 }
644
645 static __INLINE void
MSS_USBH_CIF_rx_ep_clr_autoclr(mss_usb_ep_num_t ep_num)646 MSS_USBH_CIF_rx_ep_clr_autoclr
647 (
648 mss_usb_ep_num_t ep_num
649 )
650 {
651 USB->ENDPOINT[ep_num].RX_CSR &= ~RXCSRH_HOST_EPN_ENABLE_AUTOCLR_MASK;
652 }
653
654 static __INLINE uint8_t
MSS_USBH_CIF_rx_ep_is_autoclr(mss_usb_ep_num_t ep_num)655 MSS_USBH_CIF_rx_ep_is_autoclr
656 (
657 mss_usb_ep_num_t ep_num
658 )
659 {
660 return (((USB->ENDPOINT[ep_num].RX_CSR & RXCSRH_HOST_EPN_ENABLE_AUTOCLR_MASK) ?
661 MSS_USB_BOOLEAN_TRUE : MSS_USB_BOOLEAN_FALSE));
662 }
663
664 /*-------------------------------------------------------------------------*//**
665 TXTYPE register related APIs
666 */
667 static __INLINE void
MSS_USBH_CIF_tx_ep_set_target_speed(mss_usb_ep_num_t ep_num,mss_usb_device_speed_t speed)668 MSS_USBH_CIF_tx_ep_set_target_speed
669 (
670 mss_usb_ep_num_t ep_num,
671 mss_usb_device_speed_t speed
672 )
673 {
674 USB->ENDPOINT[ep_num].TX_TYPE &= ~TXTYPE_HOST_TARGET_EP_SPEED_MASK;
675 USB->ENDPOINT[ep_num].TX_TYPE |= (speed <<
676 TXTYPE_HOST_TARGET_EP_SPEED_SHIFT);
677 }
678
679 static __INLINE mss_usb_device_speed_t
MSS_USBH_CIF_tx_ep_get_target_speed(mss_usb_ep_num_t ep_num)680 MSS_USBH_CIF_tx_ep_get_target_speed
681 (
682 mss_usb_ep_num_t ep_num
683 )
684 {
685 return ((mss_usb_device_speed_t)((USB->ENDPOINT[ep_num].TX_TYPE &
686 TXTYPE_HOST_TARGET_EP_SPEED_MASK) >> TXTYPE_HOST_TARGET_EP_SPEED_SHIFT));
687 }
688
689 static __INLINE void
MSS_USBH_CIF_tx_ep_set_target_protocol(mss_usb_ep_num_t ep_num,mss_usb_xfr_type_t xfr_type)690 MSS_USBH_CIF_tx_ep_set_target_protocol
691 (
692 mss_usb_ep_num_t ep_num,
693 mss_usb_xfr_type_t xfr_type
694 )
695 {
696 USB->ENDPOINT[ep_num].TX_TYPE &= ~TXTYPE_HOST_TARGET_EP_PROTOCOL_MASK;
697 USB->ENDPOINT[ep_num].TX_TYPE |= (xfr_type <<
698 TXTYPE_HOST_TARGET_EP_PROTOCOL_SHIFT);
699 }
700
701 static __INLINE mss_usb_xfr_type_t
MSS_USBH_CIF_tx_ep_get_target_protocol(mss_usb_ep_num_t ep_num)702 MSS_USBH_CIF_tx_ep_get_target_protocol
703 (
704 mss_usb_ep_num_t ep_num
705 )
706 {
707 return ((mss_usb_xfr_type_t)((USB->ENDPOINT[ep_num].TX_TYPE &
708 TXTYPE_HOST_TARGET_EP_PROTOCOL_MASK) >> TXTYPE_HOST_TARGET_EP_PROTOCOL_SHIFT));
709 }
710
711 static __INLINE void
MSS_USBH_CIF_tx_ep_set_target_ep_no(mss_usb_ep_num_t ep_num,uint8_t tdev_ep_num)712 MSS_USBH_CIF_tx_ep_set_target_ep_no
713 (
714 mss_usb_ep_num_t ep_num,
715 uint8_t tdev_ep_num
716 )
717 {
718 USB->ENDPOINT[ep_num].TX_TYPE &= ~TXTYPE_HOST_TARGET_EP_NUM_MASK;
719 USB->ENDPOINT[ep_num].TX_TYPE |= (tdev_ep_num <<
720 TXTYPE_HOST_TARGET_EP_NUM_SHIFT);
721 }
722
723 static __INLINE uint8_t
MSS_USBH_CIF_tx_ep_get_target_ep_no(mss_usb_ep_num_t ep_num)724 MSS_USBH_CIF_tx_ep_get_target_ep_no
725 (
726 mss_usb_ep_num_t ep_num
727 )
728 {
729 return ((mss_usb_ep_num_t)((USB->ENDPOINT[ep_num].TX_TYPE &
730 TXTYPE_HOST_TARGET_EP_NUM_MASK) >> TXTYPE_HOST_TARGET_EP_NUM_SHIFT));
731 }
732
733 static __INLINE void
MSS_USBH_CIF_tx_ep_clr_txtypereg(mss_usb_ep_num_t ep_num)734 MSS_USBH_CIF_tx_ep_clr_txtypereg
735 (
736 mss_usb_ep_num_t ep_num
737 )
738 {
739 USB->ENDPOINT[ep_num].TX_TYPE = 0x0000U;
740 }
741 /*-------------------------------------------------------------------------*//**
742 TXINTERVAL register related APIs
743 */
744 static __INLINE void
MSS_USBH_CIF_tx_ep_set_target_interval(mss_usb_ep_num_t ep_num,uint8_t interval)745 MSS_USBH_CIF_tx_ep_set_target_interval
746 (
747 mss_usb_ep_num_t ep_num,
748 uint8_t interval
749 )
750 {
751 USB->ENDPOINT[ep_num].TX_INTERVAL = interval;
752 }
753
754 /*-------------------------------------------------------------------------*//**
755 RXTYPE register related APIs
756 */
757 static __INLINE void
MSS_USBH_CIF_rx_ep_set_target_speed(mss_usb_ep_num_t ep_num,mss_usb_device_speed_t speed)758 MSS_USBH_CIF_rx_ep_set_target_speed
759 (
760 mss_usb_ep_num_t ep_num,
761 mss_usb_device_speed_t speed
762 )
763 {
764 USB->ENDPOINT[ep_num].RX_TYPE &= ~RXTYPE_HOST_TARGET_EP_SPEED_MASK;
765 USB->ENDPOINT[ep_num].RX_TYPE |= (speed << RXTYPE_HOST_TARGET_EP_SPEED_SHIFT);
766 }
767
768 static __INLINE mss_usb_device_speed_t
MSS_USBH_CIF_rx_ep_get_target_speed(mss_usb_ep_num_t ep_num)769 MSS_USBH_CIF_rx_ep_get_target_speed
770 (
771 mss_usb_ep_num_t ep_num
772 )
773 {
774 return ((mss_usb_device_speed_t)((USB->ENDPOINT[ep_num].RX_TYPE &
775 RXTYPE_HOST_TARGET_EP_SPEED_MASK) >> RXTYPE_HOST_TARGET_EP_SPEED_SHIFT));
776 }
777
778 static __INLINE void
MSS_USBH_CIF_rx_ep_set_target_protocol(mss_usb_ep_num_t ep_num,mss_usb_xfr_type_t xfr_type)779 MSS_USBH_CIF_rx_ep_set_target_protocol
780 (
781 mss_usb_ep_num_t ep_num,
782 mss_usb_xfr_type_t xfr_type
783 )
784 {
785 USB->ENDPOINT[ep_num].RX_TYPE &= ~RXTYPE_HOST_TARGET_EP_PROTOCOL_MASK;
786 USB->ENDPOINT[ep_num].RX_TYPE |= (xfr_type << RXTYPE_HOST_TARGET_EP_PROTOCOL_SHIFT);
787 }
788
789 static __INLINE mss_usb_xfr_type_t
MSS_USBH_CIF_rx_ep_get_target_protocol(mss_usb_ep_num_t ep_num)790 MSS_USBH_CIF_rx_ep_get_target_protocol
791 (
792 mss_usb_ep_num_t ep_num
793 )
794 {
795 return ((mss_usb_xfr_type_t)((USB->ENDPOINT[ep_num].RX_TYPE &
796 RXTYPE_HOST_TARGET_EP_PROTOCOL_MASK) >> RXTYPE_HOST_TARGET_EP_PROTOCOL_SHIFT));
797 }
798
799 static __INLINE void
MSS_USBH_CIF_rx_ep_set_target_ep_no(mss_usb_ep_num_t ep_num,uint8_t tdev_ep_num)800 MSS_USBH_CIF_rx_ep_set_target_ep_no
801 (
802 mss_usb_ep_num_t ep_num,
803 uint8_t tdev_ep_num
804 )
805 {
806 USB->ENDPOINT[ep_num].RX_TYPE &= ~RXTYPE_HOST_TARGET_EP_NUM_MASK;
807 USB->ENDPOINT[ep_num].RX_TYPE |= (tdev_ep_num << RXTYPE_HOST_TARGET_EP_NUM_SHIFT);
808 }
809
810 static __INLINE uint8_t
MSS_USBH_CIF_rx_ep_get_target_ep_no(mss_usb_ep_num_t ep_num)811 MSS_USBH_CIF_rx_ep_get_target_ep_no
812 (
813 mss_usb_ep_num_t ep_num
814 )
815 {
816 return ((mss_usb_ep_num_t)((USB->ENDPOINT[ep_num].RX_TYPE &
817 RXTYPE_HOST_TARGET_EP_NUM_MASK) >> RXTYPE_HOST_TARGET_EP_NUM_SHIFT));
818 }
819
820 static __INLINE void
MSS_USBH_CIF_rx_ep_clr_rxtypereg(mss_usb_ep_num_t ep_num)821 MSS_USBH_CIF_rx_ep_clr_rxtypereg
822 (
823 mss_usb_ep_num_t ep_num
824 )
825 {
826 USB->ENDPOINT[ep_num].RX_TYPE = 0x0000U;
827 }
828 /*-------------------------------------------------------------------------*//**
829 RXINTERVAL register related APIs
830 */
831 static __INLINE void
MSS_USBH_CIF_rx_ep_set_target_interval(mss_usb_ep_num_t ep_num,uint8_t interval)832 MSS_USBH_CIF_rx_ep_set_target_interval
833 (
834 mss_usb_ep_num_t ep_num,
835 uint8_t interval
836 )
837 {
838 USB->ENDPOINT[ep_num].RX_INTERVAL = interval;
839 }
840
841 /*-------------------------------------------------------------------------*//**
842 REQPKTCOUNT register related APIs
843 */
844 static __INLINE void
MSS_USBH_CIF_rx_ep_set_reqpkt_count(mss_usb_ep_num_t ep_num,uint32_t count)845 MSS_USBH_CIF_rx_ep_set_reqpkt_count
846 (
847 mss_usb_ep_num_t ep_num,
848 uint32_t count
849 )
850 {
851 /*
852 * Used with AUTOREQ option.
853 * Multiple packets combined into a single bulk packet within the FIFO count
854 * as one packet.
855 */
856 USB->RQ_PKT_CNT[ep_num] = count;
857 }
858
859 /*-------------------------------------------------------------------------*//**
860 RXFUNCADDR register related APIs
861 */
862 static __INLINE void
MSS_USBH_CIF_rx_ep_set_target_func_addr(mss_usb_ep_num_t ep_num,uint32_t addr)863 MSS_USBH_CIF_rx_ep_set_target_func_addr
864 (
865 mss_usb_ep_num_t ep_num,
866 uint32_t addr
867 )
868 {
869 /* Device number of the target - initially zero, then determined by
870 * enumeration process.
871 */
872 USB->TAR[ep_num].RX_FUNC_ADDR = (addr & 0x7Fu);
873 }
874
875 /*-------------------------------------------------------------------------*//**
876 * TXHUBADDR register related APIs
877 */
878 static __INLINE void
MSS_USBH_CIF_tx_ep_set_target_hub_addr(mss_usb_ep_num_t ep_num,uint32_t addr,uint32_t mtt)879 MSS_USBH_CIF_tx_ep_set_target_hub_addr
880 (
881 mss_usb_ep_num_t ep_num,
882 uint32_t addr,
883 uint32_t mtt
884 )
885 {
886 /* Device number of the target - initially zero, then determined by
887 * enumeration process.
888 */
889 USB->TAR[ep_num].TX_HUB_ADDR = ((uint8_t)(mtt << TARGET_DEVICE_HUB_MT_SHIFT) |
890 (addr & 0x7Fu));
891 }
892
893 /*-------------------------------------------------------------------------*//**
894 RXHUBADDR register related APIs
895 */
896 static __INLINE void
MSS_USBH_CIF_rx_ep_set_target_hub_addr(mss_usb_ep_num_t ep_num,uint32_t addr,uint32_t mtt)897 MSS_USBH_CIF_rx_ep_set_target_hub_addr
898 (
899 mss_usb_ep_num_t ep_num,
900 uint32_t addr,
901 uint32_t mtt
902 )
903 {
904 /* Device number of the target - initially zero, then determined by
905 * enumeration process.
906 */
907 USB->TAR[ep_num].RX_HUB_ADDR = ((uint8_t)(mtt << TARGET_DEVICE_HUB_MT_SHIFT) |
908 (addr & 0x7Fu));
909 }
910
911 /*-------------------------------------------------------------------------*//**
912 TXHUBADDR register related APIs
913 */
914 static __INLINE void
MSS_USBH_CIF_tx_ep_set_target_hub_port(mss_usb_ep_num_t ep_num,uint32_t port_no)915 MSS_USBH_CIF_tx_ep_set_target_hub_port
916 (
917 mss_usb_ep_num_t ep_num,
918 uint32_t port_no
919 )
920 {
921 /* for FS/LS devices only */
922 USB->TAR[ep_num].TX_HUB_PORT = (port_no & 0xFFu);
923 }
924
925 /*-------------------------------------------------------------------------*//**
926 RXHUBADDR register related APIs
927 */
928 static __INLINE void
MSS_USBH_CIF_rx_ep_set_target_hub_port(mss_usb_ep_num_t ep_num,uint32_t port_no)929 MSS_USBH_CIF_rx_ep_set_target_hub_port
930 (
931 mss_usb_ep_num_t ep_num,
932 uint32_t port_no
933 )
934 {
935 /* for FS/LS devices only */
936 USB->TAR[ep_num].RX_HUB_PORT = (port_no & 0xFFu);
937 }
938
939 /* Trailing zeros */
940 static __INLINE uint32_t
MSS_USBH_CIF_ctz(uint32_t number)941 MSS_USBH_CIF_ctz
942 (
943 uint32_t number
944 )
945 {
946 uint32_t c = 32u;
947 number &= -(int32_t)(number);
948 if (number)
949 {
950 c--;
951 }
952 if (number & 0x0000FFFFU)
953 {
954 c -= 16;
955 }
956 if (number & 0x00FF00FFU)
957 {
958 c -= 8;
959 }
960 if (number & 0x0F0F0F0FU)
961 {
962 c -= 4;
963 }
964 if (number & 0x33333333U)
965 {
966 c -= 2;
967 }
968 if (number & 0x55555555U)
969 {
970 c -= 1;
971 }
972
973 return c;
974 }
975
976
977 #ifdef __cplusplus
978 }
979 #endif
980
981 #endif /* __MSS_USB_HOST_REG_IO_H_ */
982