1 /** 2 * 3 * Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries. 4 * 5 * \asf_license_start 6 * 7 * \page License 8 * 9 * SPDX-License-Identifier: Apache-2.0 10 * 11 * Licensed under the Apache License, Version 2.0 (the "License"); you may 12 * not use this file except in compliance with the License. 13 * You may obtain a copy of the Licence at 14 * 15 * http://www.apache.org/licenses/LICENSE-2.0 16 * 17 * Unless required by applicable law or agreed to in writing, software 18 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 19 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 * See the License for the specific language governing permissions and 21 * limitations under the License. 22 * 23 * \asf_license_stop 24 * 25 */ 26 27 /** @file tfdp.h 28 *MEC1501 TFDP Trace FIFO Debug Port Registers 29 */ 30 /** @defgroup MEC1501 Peripherals TFDP 31 */ 32 33 #ifndef _TFDP_H 34 #define _TFDP_H 35 36 #include <stdint.h> 37 #include <stddef.h> 38 39 #include "regaccess.h" 40 41 /* =========================================================================*/ 42 /* ================ TFDP =================== */ 43 /* =========================================================================*/ 44 45 #define MCHP_TFDP_BASE_ADDR 0x40008c00u 46 47 #define MCHP_TFDP_DATA_OUT_ADDR ((MCHP_TFDP_BASE_ADDR) + 0) 48 #define MCHP_TFDP_CTRL_ADDR ((MCHP_TFDP_BASE_ADDR) + 4u) 49 50 #define MCHP_TFDP_CTRL_REG_MASK 0x7fu 51 #define MCHP_TFDP_CTRL_EN_POS 0u 52 #define MCHP_TFDP_CTRL_EDGE_SEL_POS 1u 53 #define MCHP_TFDP_CTRL_DIV_SEL_POS 2u 54 #define MCHP_TFDP_CTRL_IP_DLY_POS 4u 55 56 #define MCHP_TFDP_CTRL_EN (1u << 0) 57 58 #define MCHP_TFDP_OUT_ON_RISING_EDGE (0u << 1) 59 #define MCHP_TFDP_OUT_ON_FALLING_EDGE (1u << 1) 60 #define MCHP_TFDP_CLK_AHB_DIV_2 (0u << 2) 61 #define MCHP_TFDP_CLK_AHB_DIV_4 (1u << 2) 62 #define MCHP_TFDP_CLK_AHB_DIV_8 (2u << 2) 63 #define MCHP_TFDP_CLK_AHB_DIV_2_ALT (3u << 2) 64 65 /* Number of AHB clocks between each byte shifted out */ 66 #define MCHP_TFDP_IP_DLY_1 (0u << 4) 67 #define MCHP_TFDP_IP_DLY_2 (1u << 4) 68 #define MCHP_TFDP_IP_DLY_3 (2u << 4) 69 #define MCHP_TFDP_IP_DLY_4 (3u << 4) 70 #define MCHP_TFDP_IP_DLY_5 (4u << 4) 71 #define MCHP_TFDP_IP_DLY_6 (5u << 4) 72 #define MCHP_TFDP_IP_DLY_7 (6u << 4) 73 #define MCHP_TFDP_IP_DLY_8 (7u << 4) 74 75 /* First byte indicates start of packet */ 76 #define MCHP_TFDP_PKT_START 0xfdu 77 78 /** 79 * @brief Trace FIFO Debug Port Registers (TFDP) 80 */ 81 typedef struct tfdp_regs 82 { 83 __IOM uint8_t DATA_OUT; /*!< (@ 0x0000) Data out shift register */ 84 uint8_t RSVD1[3]; 85 __IOM uint32_t CTRL; /*!< (@ 0x0004) Control register */ 86 } TFDP_Type; 87 88 #endif /* #ifndef _TFDP_H */ 89 /* end tfdp.h */ 90 /** @} 91 */ 92
