1 /** 2 * 3 * Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries. 4 * 5 * \asf_license_start 6 * 7 * \page License 8 * 9 * SPDX-License-Identifier: Apache-2.0 10 * 11 * Licensed under the Apache License, Version 2.0 (the "License"); you may 12 * not use this file except in compliance with the License. 13 * You may obtain a copy of the Licence at 14 * 15 * http://www.apache.org/licenses/LICENSE-2.0 16 * 17 * Unless required by applicable law or agreed to in writing, software 18 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 19 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 * See the License for the specific language governing permissions and 21 * limitations under the License. 22 * 23 * \asf_license_stop 24 * 25 */ 26 27 /** @file kbc.h 28 *MEC1501 EM8042 Keyboard Controller Registers 29 */ 30 /** @defgroup MEC1501 Peripherals KBC 31 */ 32 33 #ifndef _KBC_H 34 #define _KBC_H 35 36 #include <stdint.h> 37 #include <stddef.h> 38 39 #include "regaccess.h" 40 41 /* =========================================================================*/ 42 /* ================ KBC ================ */ 43 /* =========================================================================*/ 44 45 #define MCHP_KBC_BASE_ADDR 0x400f0400u 46 47 /* 48 * KBC interrupts 49 */ 50 #define MCHP_KBC_GIRQ 15u 51 #define MCHP_KBC_GIRQ_NVIC 7u 52 #define MCHP_KBC_OBE_NVIC_DIRECT 58u 53 #define MCHP_KBC_IBF_NVIC_DIRECT 59u 54 55 #define MCHP_KBC_OBE_GIRQ_POS 18u 56 #define MCHP_KBC_IBF_GIRQ_POS 19u 57 58 #define MCHP_KBC_OBE_GIRQ (1u << 18) 59 #define MCHP_KBC_IBF_GIRQ (1u << 19) 60 61 /* 62 * EC_KBC_STS and KBC_STS_RD bit definitions 63 */ 64 #define MCHP_KBC_STS_OBF_POS 0u 65 #define MCHP_KBC_STS_OBF (1u << (MCHP_KBC_STS_OBF_POS)) 66 #define MCHP_KBC_STS_IBF_POS 1u 67 #define MCHP_KBC_STS_IBF (1u << (MCHP_KBC_STS_IBF_POS)) 68 #define MCHP_KBC_STS_UD0_POS 2u 69 #define MCHP_KBC_STS_UD0 (1u << (MCHP_KBC_STS_UD0_POS)) 70 #define MCHP_KBC_STS_CD_POS 3u 71 #define MCHP_KBC_STS_CD (1u << (MCHP_KBC_STS_CD_POS)) 72 #define MCHP_KBC_STS_UD1_POS 4u 73 #define MCHP_KBC_STS_UD1 (1u << (MCHP_KBC_STS_UD1_POS)) 74 #define MCHP_KBC_STS_AUXOBF_POS 5u 75 #define MCHP_KBC_STS_AUXOBF (1u << (MCHP_KBC_STS_AUXOBF_POS)) 76 #define MCHP_KBC_STS_UD2_POS 6u 77 #define MCHP_KBC_STS_UD2_MASK0 0x03u 78 #define MCHP_KBC_STS_UD2_MASK (0x03u << 6) 79 #define MCHP_KBC_STS_UD2_0_POS 6u 80 #define MCHP_KBC_STS_UD2_0 (1u << 6) 81 #define MCHP_KBC_STS_UD2_1 (1u << 7) 82 83 /* 84 * KBC_CTRL bit definitions 85 */ 86 #define MCHP_KBC_CTRL_UD3_POS 0u 87 #define MCHP_KBC_CTRL_UD3 (1u << (MCHP_KBC_CTRL_UD3_POS)) 88 #define MCHP_KBC_CTRL_SAEN_POS 1u 89 #define MCHP_KBC_CTRL_SAEN (1u << (MCHP_KBC_CTRL_SAEN_POS)) 90 #define MCHP_KBC_CTRL_PCOBFEN_POS 2u 91 #define MCHP_KBC_CTRL_PCOBFEN (1u << (MCHP_KBC_CTRL_PCOBFEN_POS)) 92 #define MCHP_KBC_CTRL_UD4_POS 3u 93 #define MCHP_KBC_CTRL_UD4_MASK0 0x03u 94 #define MCHP_KBC_CTRL_UD4_MASK (0x03u << (MCHP_KBC_CTRL_UD4_POS)) 95 #define MCHP_KBC_CTRL_OBFEN_POS 5u 96 #define MCHP_KBC_CTRL_OBFEN (1u << (MCHP_KBC_CTRL_OBFEN_POS)) 97 #define MCHP_KBC_CTRL_UD5_POS 6u 98 #define MCHP_KBC_CTRL_UD5 (1u << (MCHP_KBC_CTRL_UD5_POS)) 99 #define MCHP_KBC_CTRL_AUXH_POS 7u 100 #define MCHP_KBC_CTRL_AUXH (1u << (MCHP_KBC_CTRL_AUXH_POS)) 101 102 /* 103 * PCOBF register bit definitions 104 */ 105 #define MCHP_KBC_PCOBF_EN_POS 0u 106 #define MCHP_KBC_PCOBF_EN (1u << (MCHP_KBC_PCOBF_EN_POS)) 107 108 /* 109 * KBC_PORT92_EN register bit definitions 110 */ 111 #define MCHP_KBC_PORT92_EN_POS 0u 112 #define MCHP_KBC_PORT92_EN (1u << (MCHP_KBC_PORT92_EN_POS)) 113 114 /** 115 * @brief Keyboard Controller Registers (KBC) 116 */ 117 typedef struct kbc_regs 118 { 119 __IOM uint32_t HOST_AUX_DATA; /*!< (@ 0x0000) EC_HOST and AUX Data register */ 120 __IOM uint32_t KBC_STS_RD; /*!< (@ 0x0004) Keyboard Status Read register */ 121 uint8_t RSVD1[0x100u - 0x08u]; 122 __IOM uint32_t EC_DATA; /*!< (@ 0x0100) EC Data */ 123 __IOM uint32_t EC_KBC_STS; /*!< (@ 0x0104) EC KBC Status */ 124 __IOM uint32_t KBC_CTRL; /*!< (@ 0x0108) KBC Control */ 125 __IOM uint32_t EC_AUX_DATA; /*!< (@ 0x010c) EC Aux Data */ 126 uint32_t RSVD2[1]; 127 __IOM uint32_t PCOBF; /*!< (@ 0x0114) PCOBF register */ 128 uint8_t RSVD3[0x0330u - 0x0118u]; 129 __IOM uint32_t KBC_PORT92_EN; /*!< (@ 0x0330) Port92h enable */ 130 } KBC_Type; 131 132 #endif /* #ifndef _KBC_H */ 133 /* end kbc.h */ 134 /** @} 135 */ 136
