1 /***********************************************************************************************//** 2 * \copyright 3 * Copyright 2020-2022 Cypress Semiconductor Corporation (an Infineon company) or 4 * an affiliate of Cypress Semiconductor Corporation 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 * 8 * Licensed under the Apache License, Version 2.0 (the "License"); 9 * you may not use this file except in compliance with the License. 10 * You may obtain a copy of the License at 11 * 12 * http://www.apache.org/licenses/LICENSE-2.0 13 * 14 * Unless required by applicable law or agreed to in writing, software 15 * distributed under the License is distributed on an "AS IS" BASIS, 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 17 * See the License for the specific language governing permissions and 18 * limitations under the License. 19 **************************************************************************************************/ 20 21 #if defined(COMPONENT_WICED_BLE) || defined(COMPONENT_WICED_DUALMODE) 22 23 #include "cybsp_bt_config.h" 24 #include "cycfg_connectivity_bt.h" 25 #include "wiced_bt_dev.h" 26 27 // Not all boards use all of these pins. Any that arn't defined we will fallback on No Connects. 28 #if !defined(CYBSP_BT_POWER) 29 #define CYBSP_BT_POWER (NC) 30 #endif 31 #if !defined(CYCFG_BT_DEV_WAKE_GPIO) 32 #define CYCFG_BT_DEV_WAKE_GPIO (NC) 33 #endif 34 #if !defined(CYCFG_BT_HOST_WAKE_GPIO) 35 #define CYCFG_BT_HOST_WAKE_GPIO (NC) 36 #endif 37 #if !defined(CYBSP_BT_UART_TX) 38 #define CYBSP_BT_UART_TX (NC) 39 #endif 40 #if !defined(CYBSP_BT_UART_RX) 41 #define CYBSP_BT_UART_RX (NC) 42 #endif 43 #if !defined(CYBSP_BT_UART_RTS) 44 #define CYBSP_BT_UART_RTS (NC) 45 #endif 46 #if !defined(CYBSP_BT_UART_CTS) 47 #define CYBSP_BT_UART_CTS (NC) 48 #endif 49 50 const cybt_platform_config_t cybsp_bt_platform_cfg = 51 { 52 .hci_config = 53 { 54 .hci_transport = CYBT_HCI_UART, 55 56 .hci = 57 { 58 .hci_uart = 59 { 60 .uart_tx_pin = CYBSP_BT_UART_TX, 61 .uart_rx_pin = CYBSP_BT_UART_RX, 62 .uart_rts_pin = CYBSP_BT_UART_RTS, 63 .uart_cts_pin = CYBSP_BT_UART_CTS, 64 65 .baud_rate_for_fw_download = CYBSP_BT_PLATFORM_CFG_BAUD_DOWNLOAD, 66 .baud_rate_for_feature = CYBSP_BT_PLATFORM_CFG_BAUD_FEATURE, 67 68 .data_bits = CYBSP_BT_PLATFORM_CFG_BITS_DATA, 69 .stop_bits = CYBSP_BT_PLATFORM_CFG_BITS_STOP, 70 .parity = CYHAL_UART_PARITY_NONE, 71 .flow_control = true 72 } 73 } 74 }, 75 76 .controller_config = 77 { 78 .bt_power_pin = CYBSP_BT_POWER, 79 .sleep_mode = 80 { 81 .sleep_mode_enabled = CYBSP_BT_PLATFORM_CFG_SLEEP_MODE_LP_ENABLED, 82 .device_wakeup_pin = CYCFG_BT_DEV_WAKE_GPIO, 83 .host_wakeup_pin = CYCFG_BT_HOST_WAKE_GPIO, 84 .device_wake_polarity = CYCFG_BT_DEV_WAKE_POLARITY, 85 .host_wake_polarity = CYCFG_BT_HOST_WAKE_IRQ_EVENT 86 } 87 }, 88 89 .task_mem_pool_size = CYBSP_BT_PLATFORM_CFG_MEM_POOL_BYTES 90 }; 91 92 #endif /* defined(COMPONENT_WICED_BLE) || defined(COMPONENT_WICED_DUALMODE) */ 93
