1 /***************************************************************************//**
2 * \file cybsp.c
3 *
4 * Description:
5 * Provides initialization code for starting up the hardware contained on the
6 * Infineon board.
7 *
8 ********************************************************************************
9 * \copyright
10 * Copyright 2018-2022 Cypress Semiconductor Corporation (an Infineon company) or
11 * an affiliate of Cypress Semiconductor Corporation
12 *
13 * SPDX-License-Identifier: Apache-2.0
14 *
15 * Licensed under the Apache License, Version 2.0 (the "License");
16 * you may not use this file except in compliance with the License.
17 * You may obtain a copy of the License at
18 *
19 *     http://www.apache.org/licenses/LICENSE-2.0
20 *
21 * Unless required by applicable law or agreed to in writing, software
22 * distributed under the License is distributed on an "AS IS" BASIS,
23 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
24 * See the License for the specific language governing permissions and
25 * limitations under the License.
26 *******************************************************************************/
27 
28 #include <stdlib.h>
29 #include "cybsp_pm.h"
30 #include "cy_syspm.h"
31 #include "cy_sysclk.h"
32 #include "cybsp.h"
33 #if defined(CY_USING_HAL)
34 #include "cyhal_hwmgr.h"
35 #include "cyhal_syspm.h"
36 #endif
37 #include "cybsp_dsram.h"
38 #include "cycfg_qspi_memslot.h"
39 
40 #if defined(__cplusplus)
41 extern "C" {
42 #endif
43 
44 //--------------------------------------------------------------------------------------------------
45 // cybsp_init
46 //--------------------------------------------------------------------------------------------------
cybsp_init(void)47 cy_rslt_t cybsp_init(void)
48 {
49     // Setup hardware manager to track resource usage then initialize all system (clock/power) board
50     // configuration
51     #if defined(CY_USING_HAL)
52     cy_rslt_t result = cyhal_hwmgr_init();
53 
54     if (CY_RSLT_SUCCESS == result)
55     {
56         result = cyhal_syspm_init();
57     }
58 
59     #ifdef CY_CFG_PWR_VDDA_MV
60     if (CY_RSLT_SUCCESS == result)
61     {
62         cyhal_syspm_set_supply_voltage(CYHAL_VOLTAGE_SUPPLY_VDDA, CY_CFG_PWR_VDDA_MV);
63     }
64     #endif
65 
66     #else // if defined(CY_USING_HAL)
67     cy_rslt_t result = CY_RSLT_SUCCESS;
68     #endif // if defined(CY_USING_HAL)
69 
70     init_cycfg_all();
71 
72     if (CY_RSLT_SUCCESS == result)
73     {
74         #if defined(CYBSP_CUSTOM_SYSCLK_PM_CALLBACK)
75         result = cybsp_register_custom_sysclk_pm_callback();
76         #endif
77     }
78 
79     if (CY_RSLT_SUCCESS == result)
80     {
81         result = cybsp_syspm_dsram_init();
82     }
83 
84     if (CY_RSLT_SUCCESS == result)
85     {
86         result = cybsp_pm_callbacks_register();
87     }
88 
89     // CYHAL_HWMGR_RSLT_ERR_INUSE result could be returned if any resourced needed for the BSP was
90     // previously reserved by the user. Review the Device Configurator (design.modus) and the BSP
91     // reservation list (cyreservedresources.list) to make sure no resources are reserved by both.
92     return result;
93 }
94 
95 
96 #if defined(__cplusplus)
97 }
98 #endif
99