1 /***************************************************************************//**
2 * \file cy_csd.h
3 * \version 1.20.2
4 *
5 * The header file of the CSD driver.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright 2018-2022 Cypress Semiconductor Corporation
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either expressed or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *******************************************************************************/
24
25 /**
26 * \addtogroup group_csd
27 */
28
29 /**
30 ********************************************************************************
31 * \addtogroup group_csd
32 ********************************************************************************
33 * \{
34 *
35 * The CSD HW block enables multiple sensing capabilities on PSoC™ devices,
36 * including self-cap and mutual-cap capacitive touch sensing solutions,
37 * a 10-bit ADC, IDAC, and Comparator.
38 *
39 * The CAPSENSE™ solution includes:
40 * * The CAPSENSE™ Configurator tool, which is a configuration wizard to create
41 * and configure CAPSENSE™ widgets. It can be launched in ModusToolbox™
42 * from the CSD personality as well as in standalone mode.
43 * It contains separate documentation on how to create and
44 * configure widgets, parameters, and algorithm descriptions.
45 * * An API to control the design from the application program. This documentation
46 * describes the API with code snippets about how to use them.
47 * * The CAPSENSE™ Tuner tool for real-time tuning, testing, and debugging,
48 * for easy and smooth design of human interfaces on customer products.
49 * The Tuner tool communicates with a device through a HW bridge and
50 * communication drivers (EzI2C, UART, etc.) and allows monitoring of
51 * widget statuses, sensor signals, detected touch positions, gestures, etc.
52 * The application program does not need to interact with the CSD driver
53 * and/or other drivers such as GPIO or SysClk directly. All of that is
54 * configured and managed by middleware.
55 *
56 * \image html capsense_solution.png "CAPSENSE™ Solution" width=800px
57 * \image latex capsense_solution.png
58 *
59 * This section describes only the CSD driver. Refer to the corresponding sections
60 * for documentation of middleware supported by the CSD HW block.
61 *
62 * The CSD driver is a low-level peripheral driver that provides an interface to
63 * a complex mixed signal of the CSD HW block.
64 *
65 * The CSD driver alone does not provide system-level functions. Instead, it is
66 * used by upper-level middleware to configure the CSD HW block required by
67 * an application.
68 *
69 * The CSD HW block can support only one function at a time. To allow seamless
70 * time-multiplex implementation of functionality and to avoid conflicting access
71 * to hardware from the upper level, the CSD driver also implements a lock
72 * semaphore mechanism.
73 *
74 * The CSD driver supports re-entrance. If a device contains several
75 * CSD HW blocks, the same CSD driver is used to configure any HW block. For
76 * that, each function of the CSD driver contains a base address to define
77 * the CSD HW block to which the CSD driver communicates.
78 *
79 * For dual-core devices, the CSD driver functions can be called either by the
80 * CM0+ or CM4 cores. In case both cores need access to the CSD Driver, you
81 * should properly manage the memory access.
82 *
83 * There is no restriction on the CSD Driver usage in RTOS.
84 *
85 ********************************************************************************
86 * \section group_csd_config_usage Usage
87 ********************************************************************************
88 *
89 * The CSD driver is simple wrapper driver specifically designed to be used by higher
90 * level middleware. Hence, is highly not recommended to use CSD driver
91 * directly in the application program. To incorporate CSD HW block
92 * functionality in the application program, an associated middleware
93 * should be used.
94 *
95 * The CSD Driver can be used to implement a custom sensing solution. In such a case,
96 * the application program must acquire and lock the CSD HW block prior to
97 * accessing it.
98 *
99 * Setting up and using the CSD driver can be summed up in these four stages:
100 * * Define configuration in the config structure.
101 * * Allocate context structure variable for the driver.
102 * * Capture the CSD HW block.
103 * * Execute the action required to perform any kind of conversion.
104 *
105 * The following code snippet demonstrates how to capture the CSD HW block for
106 * custom implementation:
107 *
108 * \snippet csd/snippet/main.c snippet_Cy_CSD_Conversion
109 *
110 * The entire solution, either CAPSENSE™ or CSDADC, in addition to
111 * the CSD HW block, incorporates the following instances:
112 *
113 * * \ref group_csd_config_clocks
114 * * \ref group_csd_config_refgen
115 * * \ref group_csd_config_interrupts
116 * * \ref group_csd_config_pin
117 *
118 * The CSD driver does not configure those blocks and they should be managed by
119 * an upper level. When using CAPSENSE™ or CSDADC, those blocks are managed by
120 * middleware.
121 *
122 ********************************************************************************
123 * \subsection group_csd_config_clocks Clocks
124 ********************************************************************************
125 *
126 * The CSD HW block requires a peripheral clock (clk_peri) input. It can be
127 * assigned using two methods:
128 * * Using the Device Configurator (Peripheral-Clocks tab ).
129 * * Using the SysClk (System Clock) driver. Refer to \ref group_sysclk driver
130 * section for more details.
131 * If middleware is used, the clock is managed by middleware.
132 *
133 ********************************************************************************
134 * \subsection group_csd_config_pin GPIO Pins
135 ********************************************************************************
136 *
137 * Any analog-capable GPIO pin that can be connected to an analog multiplexed bus
138 * (AMUXBUS) can be connected to the CSD HW block as an input.
139 *
140 * GPIO input can be assigned to the CSD HW block using the following methods:
141 * * Using the Device Configurator (Pins tab).
142 * * Using the GPIO (General Purpose Input Output) driver. Refer to \ref group_gpio
143 * driver section.
144 *
145 * If middleware is used, pin configuration is managed by middleware. When
146 * using the CSD driver for custom implementation, the application program must
147 * manage pin connections.
148 *
149 * Each AMUXBUS can be split into multiple segments. Ensure the CSD HW block
150 * and a GPIO belong to the same bus segment or join the segments to establish
151 * connection of the GPIO to the CSD HW block.
152 *
153 * For more information about pin configuration, refer to the \ref group_gpio
154 * driver.
155 *
156 ********************************************************************************
157 * \subsection group_csd_config_refgen Reference Voltage Input
158 ********************************************************************************
159 *
160 * The CSD HW block requires a reference voltage input to generate programmable
161 * reference voltage within the CSD HW block. There are two on-chip reference
162 * sources:
163 * * VREF
164 * * AREF
165 *
166 * For more information about specification and startup of reference voltage
167 * sources, refer to the \ref group_sysanalog driver prior to making the
168 * selection.
169 *
170 ********************************************************************************
171 * \subsection group_csd_config_interrupts Interrupts
172 ********************************************************************************
173 *
174 * The CSD HW block has one interrupt that can be assigned to either the
175 * Cortex M4 or Cortex M0+ core. The CSD HW block can generate interrupts
176 * on the following events:
177 *
178 * * End of sample: when scanning of a single sensor is complete.
179 * * End of initialization: when initialization of an analog circuit is complete.
180 * * End of measurement: when conversion of an CSDADC channel is complete.
181 *
182 * Additionally, the CSD interrupt can wake the device from the Sleep power mode.
183 * The CSD HW block is powered down in the Deep Sleep or Hibernate power modes.
184 * So, it cannot be used as a wake-up source in these power modes.
185 *
186 * If a CAPSENSE™ or CSDADC middleware is used, the interrupt service routine is managed
187 * by middleware. When using the CSD driver for custom implementation or other
188 * middleware, the application program must manage the interrupt service routine.
189 *
190 * Implement an interrupt routine and assign it to the CSD interrupt. Use the
191 * pre-defined enumeration as the interrupt source of the CSD HW block.
192 * The CSD interrupt to the NVIC is raised any time the intersection
193 * (logic AND) of the interrupt flags and the corresponding interrupt
194 * masks are non-zero. The peripheral interrupt status register should be
195 * read in the ISR to detect which condition generated the interrupt.
196 * The appropriate interrupt registers should be cleared so that
197 * subsequent interrupts can be handled.
198 *
199 * The following code snippet demonstrates how to implement a routine to handle
200 * the interrupt. The routine is called when a CSD interrupt is triggered.
201 *
202 * \snippet csd/snippet/main.c snippet_Cy_CSD_IntHandler
203 *
204 * The following code snippet demonstrates how to configure and enable
205 * the CSD interrupt:
206 *
207 * \snippet csd/snippet/main.c snippet_Cy_CSD_IntEnabling
208 *
209 * For more information, refer to the \ref group_sysint driver.
210 *
211 * Alternatively, instead of handling the interrupts, the
212 * \ref Cy_CSD_GetConversionStatus() function allows for firmware
213 * polling of the CSD block status.
214 *
215 ********************************************************************************
216 * \section group_csd_config_power_modes Power Modes
217 ********************************************************************************
218 *
219 * The CSD HW block can operate in Active and Sleep CPU power modes. It is also
220 * possible to switch between Low power and Ultra Low power system modes.
221 * In Deep Sleep and in Hibernate power modes, the CSD HW block is powered off.
222 * When the device wakes up from Deep Sleep, the CSD HW block resumes operation
223 * without the need for re-initialization. In the case of wake up from Hibernate power
224 * mode, the CSD HW block does not retain configuration and it requires
225 * re-initialization.
226 *
227 * \note
228 * 1. The CSD driver does not provide a callback function to facilitate the
229 * low-power mode transitions. The responsibility belongs to an upper
230 * level that uses the CSD HW block to ensure the CSD HW block is not
231 * busy prior to a power mode transition.
232 * 2. A power mode transition is not recommended while the CSD HW block is busy.
233 * The CSD HW block status must be checked using the Cy_CSD_GetStatus()
234 * function prior to a power mode transition. Instead, use the same power mode
235 * for active operation of the CSD HW block. This restriction is not
236 * applicable to Sleep mode and the device can seamlessly enter and exit
237 * Sleep mode while the CSD HW block is busy.
238 *
239 * \warning
240 * 1. Do not enter Deep Sleep power mode if the CSD HW block conversion is in
241 * progress. Unexpected behavior may occur.
242 * 2. Analog start up time for the CSD HW block is 25 us. Initiate
243 * any kind of conversion only after 25 us from Deep Sleep / Hibernate exit.
244 *
245 * Refer to the \ref group_syspm driver for more information about
246 * low-power mode transitions.
247 *
248 ********************************************************************************
249 * \section group_csd_more_information More Information
250 ********************************************************************************
251 *
252 * Important information about the CAPSENSE™ technology overview, appropriate
253 * Infineon device for the design, CAPSENSE™ system and sensor design guidelines,
254 * different interfaces and tuning guidelines necessary for a successful design
255 * of a CAPSENSE™ system is available in the Getting Started with CAPSENSE™
256 * document and the product-specific CAPSENSE™ design guide. Infineon highly
257 * recommends starting with these documents. They can be found on the
258 * Infineon web site at www.infineon.com
259 *
260 * For more information, refer to the following documents:
261 *
262 * * CAPSENSE™ Overview:
263 *
264 * * <a href="https://github.com/Infineon/capsense">
265 * <b>CAPSENSE™ Middleware Library</b></a>
266 *
267 * * <a href="https://infineon.github.io/capsense/capsense_api_reference_manual/html/index.html">
268 * <b>CAPSENSE™ Middleware API Reference Guide</b></a>
269 *
270 * * <a href="https://github.com/Infineon/csdadc">
271 * <b>CSDADC Middleware Library</b></a>
272 *
273 * * <a href="https://infineon.github.io/csdadc/csdadc_api_reference_manual/html/index.html">
274 * <b>CSDADC Middleware API Reference Guide</b></a>
275 *
276 * * <a href="https://github.com/Infineon/csdidac">
277 * <b>CSDIDAC Middleware Library</b></a>
278 *
279 * * <a href="https://infineon.github.io/csdidac/csdidac_api_reference_manual/html/index.html">
280 * <b>CSDIDAC Middleware API Reference Guide</b></a>
281 *
282 * * <a href="https://www.infineon.com/dgdl/Infineon-ModusToolbox_CAPSENSE_Configurator_5.0_User_Guide-UserManual-v01_00-EN.pdf?fileId=8ac78c8c8386267f0183a960b36a598c&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files&redirId=180685">
283 * <b>ModusToolbox™ CAPSENSE™ Configurator Tool Guide</b></a>
284 *
285 * * <a href="https://www.infineon.com/dgdl/Infineon-ModusToolbox_CAPSENSE_Configurator_5.0_User_Guide-UserManual-v01_00-EN.pdf?fileId=8ac78c8c8386267f0183a960b36a598c&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files&redirId=180685">
286 * <b>ModusToolbox™ CAPSENSE™ Tuner Tool Guide</b></a>
287 *
288 * * <a href="https://www.infineon.com/dgdl/Infineon-AN85951_PSoC_4_and_PSoC_6_MCU_CapSense_Design_Guide-ApplicationNotes-v27_00-EN.pdf?fileId=8ac78c8c7cdc391c017d0723535d4661">
289 * <b>CAPSENSE™ Design Guide</b></a>
290 *
291 * * ModusToolbox™ Overview:
292 *
293 * * <a href="https://www.infineon.com/cms/en/design-support/tools/sdk/modustoolbox-software">
294 * <b>ModusToolbox™ Software Environment, Quick Start Guide, Documentation, and Videos</b></a>
295 *
296 * * <a href="https://www.infineon.com/dgdl/Infineon-ModusToolbox_CAPSENSE_Configurator_5.0_User_Guide-UserManual-v01_00-EN.pdf?fileId=8ac78c8c8386267f0183a960b36a598c&utm_source=cypress&utm_medium=referral&utm_campaign=202110_globe_en_all_integration-files&redirId=180685">
297 * <b>ModusToolbox™ Device Configurator Tool Guide</b></a>
298 *
299 * * General Information:
300 *
301 * * \ref page_getting_started "Getting Started with the PDL"
302 *
303 * * <a href="https://www.infineon.com/dgdl/Infineon-PSoC_6_MCU_PSoC_63_with_BLE_Datasheet_Programmable_System-on-Chip_(PSoC)-DataSheet-v16_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee4efe46c37">
304 * <b>PSoC™ 63 with BLE Datasheet Programmable System-on-Chip</b></a>
305 *
306 * * <a href="https://www.infineon.com/dgdl/Infineon-AN85951_PSoC_4_and_PSoC_6_MCU_CapSense_Design_Guide-ApplicationNotes-v28_00-EN.pdf?fileId=8ac78c8c7cdc391c017d0723535d4661">
307 * <b>AN85951 PSoC™ 4 and PSoC™ 6 MCU CAPSENSE™ Design Guide</b></a>
308 *
309 * * <a href="https://www.infineon.com/dgdl/Infineon-AN210781_Getting_Started_with_PSoC_6_MCU_with_Bluetooth_Low_Energy_(BLE)_Connectivity_on_PSoC_Creator-ApplicationNotes-v05_00-EN.pdf?fileId=8ac78c8c7cdc391c017d0d311f536528">
310 * <b>AN210781 Getting Started with PSoC™ 6 MCU with Bluetooth Low Energy (BLE) Connectivity</b></a>
311 *
312 * * <a href="https://www.infineon.com/cms/en/design-support/software/code-examples/psoc-6-code-examples-for-modustoolbox">
313 * <b>PSoC™ 6 MCU Code Examples for ModusToolbox™ Software</b></a>
314 *
315 * * <a href="https://github.com/Infineon"><b>Infineon Technologies GitHub</b></a>
316 *
317 * * <a href="http://www.infineon.com"><b>Infineon Technologies</b></a>
318 *
319 ********************************************************************************
320 * \section group_csd_changelog Changelog
321 ********************************************************************************
322 * <table class="doxtable">
323 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
324 * <tr>
325 * <td>1.20.2</td>
326 * <td>Minor documentation updates</td>
327 * <td>Correcting grammatical mistake</td>
328 * </tr>
329 * <tr>
330 * <td>1.20.1</td>
331 * <td>Documentation updates</td>
332 * <td>Add trademark symbol</td>
333 * </tr>
334 * <tr>
335 * <td>1.20</td>
336 * <td>Added Cy_CSD_Capture() function</td>
337 * <td>CAPSENSE™ memory consumption optimization</td>
338 * </tr>
339 * <tr>
340 * <td>1.10.2</td>
341 * <td>Documentation updates</td>
342 * <td>Documented MISRA 2012 violations</td>
343 * </tr>
344 * <tr>
345 * <td>1.10.1</td>
346 * <td>Documentation updates</td>
347 * <td>Update middleware references</td>
348 * </tr>
349 * <tr>
350 * <td rowspan="2">1.10</td>
351 * <td>The CSD driver sources are enclosed with the conditional compilation
352 * to ensure successful compilation for incompatible devices
353 * </td>
354 * <td>Compilation for incompatible devices</td>
355 * <tr>
356 * <td>Changed the Cy_CSD_GetConversionStatus() function implementation</td>
357 * <td>Fixed defect</td>
358 * </tr>
359 * </tr>
360 * <tr>
361 * <td>1.0.1</td>
362 * <td>Documentation updates</td>
363 * <td>Improve user's experience</td>
364 * </tr>
365 * <tr>
366 * <td>1.0</td>
367 * <td>The initial version</td>
368 * <td></td>
369 * </tr>
370 * </table>
371 */
372
373 /** \} group_csd */
374
375 /**
376 ********************************************************************************
377 * \addtogroup group_csd
378 ********************************************************************************
379 * \{
380 * \defgroup group_csd_macros Macros
381 * \defgroup group_csd_functions Functions
382 * \defgroup group_csd_data_structures Data Structures
383 * \defgroup group_csd_enums Enumerated Types
384 */
385
386
387 #if !defined(CY_CSD_H)
388 #define CY_CSD_H
389
390 #include "cy_device.h"
391
392 #if defined (CY_IP_MXCSDV2)
393
394 #include <stdint.h>
395 #include <stddef.h>
396 #include "cy_syslib.h"
397
398 #if defined(__cplusplus)
399 extern "C" {
400 #endif
401
402 /**
403 * \addtogroup group_csd_macros
404 * \{
405 */
406
407 /** Driver major version */
408 #define CY_CSD_DRV_VERSION_MAJOR (1)
409
410 /** Driver minor version */
411 #define CY_CSD_DRV_VERSION_MINOR (20)
412
413 /** Driver version */
414 #define CY_CSD_DRV2_VERSION (120)
415
416
417 /******************************************************************************
418 * API Constants
419 ******************************************************************************/
420
421 /** CSD driver identifier */
422 #define CY_CSD_ID (CY_PDL_DRV_ID(0x41U))
423
424 /** Initialization macro for the driver context variable */
425 #define CY_CSD_CONTEXT_INIT_VALUE {.lockKey = CY_CSD_NONE_KEY}
426
427 /** Nominal Vref stored in SFLASH register */
428 #define CY_CSD_ADC_VREF_0P8 (800U)
429 /** Nominal Vref stored in SFLASH register */
430 #define CY_CSD_ADC_VREF_1P2 (1164U)
431 /** Nominal Vref stored in SFLASH register */
432 #define CY_CSD_ADC_VREF_1P6 (1600U)
433 /** Nominal Vref stored in SFLASH register */
434 #define CY_CSD_ADC_VREF_2P1 (2133U)
435 /** Nominal Vref stored in SFLASH register */
436 #define CY_CSD_ADC_VREF_2P6 (2560U)
437 /** One hundred percent */
438 #define CY_CSDADC_PERCENTAGE_100 (100u)
439 /** Max deviation for trim */
440 #define CY_CSDADC_VREF_TRIM_MAX_DEVIATION (20u)
441 /** Vref max gain */
442 #define CY_CSDADC_VREF_GAIN_MAX (32u)
443
444 /*******************************************************************************
445 * The CSD HW Block Registers Constants
446 *******************************************************************************/
447
448 /**
449 * \defgroup group_csd_reg_const Registers Constants
450 * \{
451 */
452
453 /** \} group_csd_reg_const */
454
455 /** \} group_csd_macros */
456
457
458 /*******************************************************************************
459 * Enumerations
460 ******************************************************************************/
461
462 /**
463 * \addtogroup group_csd_enums
464 * \{
465 */
466
467 /** CSD status definitions */
468 typedef enum
469 {
470 /** Successful */
471 CY_CSD_SUCCESS = 0x00U,
472
473 /** One or more invalid parameters */
474 CY_CSD_BAD_PARAM = CY_CSD_ID | CY_PDL_STATUS_ERROR | 0x01U,
475
476 /** The CSD HW block performs conversion */
477 CY_CSD_BUSY = CY_CSD_ID | CY_PDL_STATUS_ERROR | 0x02U,
478
479 /** The CSD HW block is captured by another middleware */
480 CY_CSD_LOCKED = CY_CSD_ID | CY_PDL_STATUS_ERROR | 0x03U
481
482 } cy_en_csd_status_t;
483
484
485 /**
486 * Definitions of upper level keys that use the driver.
487 *
488 * Each middleware has a unique key assigned. When middleware successfully
489 * captures the CSD HW block, this key is placed into the CSD driver context
490 * structure. All attempts to capture the CSD HW block by other middleware
491 * are rejected. When the first middleware releases the CSD HW block,
492 * CY_CSD_NONE_KEY is written to the lockKey variable of the CSD driver context
493 * structure and any other middleware can capture the CSD HW block.
494 */
495 typedef enum
496 {
497 /** The CSD HW block is unused and not captured by any middleware */
498 CY_CSD_NONE_KEY = 0U,
499
500 /**
501 * The CSD HW block is captured by the application program
502 * directly to implement a customer's specific case
503 */
504 CY_CSD_USER_DEFINED_KEY = 1U,
505
506 /** The CSD HW block is captured by a CAPSENSE middleware */
507 CY_CSD_CAPSENSE_KEY = 2U,
508
509 /** The CSD HW block is captured by a CSDADC middleware */
510 CY_CSD_ADC_KEY = 3U,
511
512 /** The CSD HW block is captured by a CSDIDAC middleware */
513 CY_CSD_IDAC_KEY = 4U,
514
515 /** The CSD HW block is captured by a CMP middleware */
516 CY_CSD_CMP_KEY = 5U
517
518 }cy_en_csd_key_t;
519
520 /** \} group_csd_enums */
521
522
523 /*******************************************************************************
524 * Type Definitions
525 *******************************************************************************/
526
527 /**
528 * \addtogroup group_csd_data_structures
529 * \{
530 */
531
532 /**
533 * CSD configuration structure.
534 *
535 * This structure contains all register values of the CSD HW block. This
536 * structure is provided by middleware through the Cy_CSD_Init() and
537 * Cy_CSD_Configure() functions to implement the CSD HW block supported
538 * sensing modes like self-cap / mutual-cap scanning, ADC measurement, etc.
539 */
540 typedef struct
541 {
542 uint32_t config; /**< Stores the CSD.CONFIG register value */
543 uint32_t spare; /**< Stores the CSD.SPARE register value */
544 uint32_t status; /**< Stores the CSD.STATUS register value */
545 uint32_t statSeq; /**< Stores the CSD.STAT_SEQ register value */
546 uint32_t statCnts; /**< Stores the CSD.STAT_CNTS register value */
547 uint32_t statHcnt; /**< Stores the CSD.STAT_HCNT register value */
548 uint32_t resultVal1; /**< Stores the CSD.RESULT_VAL1 register value */
549 uint32_t resultVal2; /**< Stores the CSD.RESULT_VAL2 register value */
550 uint32_t adcRes; /**< Stores the CSD.ADC_RES register value */
551 uint32_t intr; /**< Stores the CSD.INTR register value */
552 uint32_t intrSet; /**< Stores the CSD.INTR_SET register value */
553 uint32_t intrMask; /**< Stores the CSD.INTR_MASK register value */
554 uint32_t intrMasked; /**< Stores the CSD.INTR_MASKED register value */
555 uint32_t hscmp; /**< Stores the CSD.HSCMP register value */
556 uint32_t ambuf; /**< Stores the CSD.AMBUF register value */
557 uint32_t refgen; /**< Stores the CSD.REFGEN register value */
558 uint32_t csdCmp; /**< Stores the CSD.CSDCMP register value */
559 uint32_t swRes; /**< Stores the CSD.SW_RES register value */
560 uint32_t sensePeriod; /**< Stores the CSD.SENSE_PERIOD register value */
561 uint32_t senseDuty; /**< Stores the CSD.SENSE_DUTY register value */
562 uint32_t swHsPosSel; /**< Stores the CSD.SW_HS_P_SEL register value */
563 uint32_t swHsNegSel; /**< Stores the CSD.SW_HS_N_SEL register value */
564 uint32_t swShieldSel; /**< Stores the CSD.SW_SHIELD_SEL register value */
565 uint32_t swAmuxbufSel; /**< Stores the CSD.SW_AMUXBUF_SEL register value */
566 uint32_t swBypSel; /**< Stores the CSD.SW_BYP_SEL register value */
567 uint32_t swCmpPosSel; /**< Stores the CSD.SW_CMP_P_SEL register value */
568 uint32_t swCmpNegSel; /**< Stores the CSD.SW_CMP_N_SEL register value */
569 uint32_t swRefgenSel; /**< Stores the CSD.SW_REFGEN_SEL register value */
570 uint32_t swFwModSel; /**< Stores the CSD.SW_FW_MOD_SEL register value */
571 uint32_t swFwTankSel; /**< Stores the CSD.SW_FW_TANK_SEL register value */
572 uint32_t swDsiSel; /**< Stores the CSD.SW_DSI_SEL register value */
573 uint32_t ioSel; /**< Stores the CSD.IO_SEL register value */
574 uint32_t seqTime; /**< Stores the CSD.SEQ_TIME register value */
575 uint32_t seqInitCnt; /**< Stores the CSD.SEQ_INIT_CNT register value */
576 uint32_t seqNormCnt; /**< Stores the CSD.SEQ_NORM_CNT register value */
577 uint32_t adcCtl; /**< Stores the CSD.ADC_CTL register value */
578 uint32_t seqStart; /**< Stores the CSD.SEQ_START register value */
579 uint32_t idacA; /**< Stores the CSD.IDACA register value */
580 uint32_t idacB; /**< Stores the CSD.IDACB register value */
581 } cy_stc_csd_config_t;
582
583
584 /**
585 * CSD driver context structure.
586 * This structure is an internal structure of the CSD driver and should not be
587 * accessed directly by the application program.
588 */
589 typedef struct
590 {
591 /** Middleware ID that currently captured CSD */
592 cy_en_csd_key_t lockKey;
593 } cy_stc_csd_context_t;
594
595 /** \} group_csd_data_structures */
596
597 /**
598 * \addtogroup group_csd_reg_const
599 * \{
600 */
601
602
603 /** The register offset */
604 #define CY_CSD_REG_OFFSET_CONFIG (offsetof(CSD_Type, CONFIG))
605 /** The register offset */
606 #define CY_CSD_REG_OFFSET_SPARE (offsetof(CSD_Type, SPARE))
607 /** The register offset */
608 #define CY_CSD_REG_OFFSET_STATUS (offsetof(CSD_Type, STATUS))
609 /** The register offset */
610 #define CY_CSD_REG_OFFSET_STAT_SEQ (offsetof(CSD_Type, STAT_SEQ))
611 /** The register offset */
612 #define CY_CSD_REG_OFFSET_STAT_CNTS (offsetof(CSD_Type, STAT_CNTS))
613 /** The register offset */
614 #define CY_CSD_REG_OFFSET_STAT_HCNT (offsetof(CSD_Type, STAT_HCNT))
615 /** The register offset */
616 #define CY_CSD_REG_OFFSET_RESULT_VAL1 (offsetof(CSD_Type, RESULT_VAL1))
617 /** The register offset */
618 #define CY_CSD_REG_OFFSET_RESULT_VAL2 (offsetof(CSD_Type, RESULT_VAL2))
619 /** The register offset */
620 #define CY_CSD_REG_OFFSET_ADC_RES (offsetof(CSD_Type, ADC_RES))
621 /** The register offset */
622 #define CY_CSD_REG_OFFSET_INTR (offsetof(CSD_Type, INTR))
623 /** The register offset */
624 #define CY_CSD_REG_OFFSET_INTR_SET (offsetof(CSD_Type, INTR_SET))
625 /** The register offset */
626 #define CY_CSD_REG_OFFSET_INTR_MASK (offsetof(CSD_Type, INTR_MASK))
627 /** The register offset */
628 #define CY_CSD_REG_OFFSET_INTR_MASKED (offsetof(CSD_Type, INTR_MASKED))
629 /** The register offset */
630 #define CY_CSD_REG_OFFSET_HSCMP (offsetof(CSD_Type, HSCMP))
631 /** The register offset */
632 #define CY_CSD_REG_OFFSET_AMBUF (offsetof(CSD_Type, AMBUF))
633 /** The register offset */
634 #define CY_CSD_REG_OFFSET_REFGEN (offsetof(CSD_Type, REFGEN))
635 /** The register offset */
636 #define CY_CSD_REG_OFFSET_CSDCMP (offsetof(CSD_Type, CSDCMP))
637 /** The register offset */
638 #define CY_CSD_REG_OFFSET_SW_RES (offsetof(CSD_Type, SW_RES))
639 /** The register offset */
640 #define CY_CSD_REG_OFFSET_SENSE_PERIOD (offsetof(CSD_Type, SENSE_PERIOD))
641 /** The register offset */
642 #define CY_CSD_REG_OFFSET_SENSE_DUTY (offsetof(CSD_Type, SENSE_DUTY))
643 /** The register offset */
644 #define CY_CSD_REG_OFFSET_SW_HS_P_SEL (offsetof(CSD_Type, SW_HS_P_SEL))
645 /** The register offset */
646 #define CY_CSD_REG_OFFSET_SW_HS_N_SEL (offsetof(CSD_Type, SW_HS_N_SEL))
647 /** The register offset */
648 #define CY_CSD_REG_OFFSET_SW_SHIELD_SEL (offsetof(CSD_Type, SW_SHIELD_SEL))
649 /** The register offset */
650 #define CY_CSD_REG_OFFSET_SW_AMUXBUF_SEL (offsetof(CSD_Type, SW_AMUXBUF_SEL))
651 /** The register offset */
652 #define CY_CSD_REG_OFFSET_SW_BYP_SEL (offsetof(CSD_Type, SW_BYP_SEL))
653 /** The register offset */
654 #define CY_CSD_REG_OFFSET_SW_CMP_P_SEL (offsetof(CSD_Type, SW_CMP_P_SEL))
655 /** The register offset */
656 #define CY_CSD_REG_OFFSET_SW_CMP_N_SEL (offsetof(CSD_Type, SW_CMP_N_SEL))
657 /** The register offset */
658 #define CY_CSD_REG_OFFSET_SW_REFGEN_SEL (offsetof(CSD_Type, SW_REFGEN_SEL))
659 /** The register offset */
660 #define CY_CSD_REG_OFFSET_SW_FW_MOD_SEL (offsetof(CSD_Type, SW_FW_MOD_SEL))
661 /** The register offset */
662 #define CY_CSD_REG_OFFSET_SW_FW_TANK_SEL (offsetof(CSD_Type, SW_FW_TANK_SEL))
663 /** The register offset */
664 #define CY_CSD_REG_OFFSET_SW_DSI_SEL (offsetof(CSD_Type, SW_DSI_SEL))
665 /** The register offset */
666 #define CY_CSD_REG_OFFSET_IO_SEL (offsetof(CSD_Type, IO_SEL))
667 /** The register offset */
668 #define CY_CSD_REG_OFFSET_SEQ_TIME (offsetof(CSD_Type, SEQ_TIME))
669 /** The register offset */
670 #define CY_CSD_REG_OFFSET_SEQ_INIT_CNT (offsetof(CSD_Type, SEQ_INIT_CNT))
671 /** The register offset */
672 #define CY_CSD_REG_OFFSET_SEQ_NORM_CNT (offsetof(CSD_Type, SEQ_NORM_CNT))
673 /** The register offset */
674 #define CY_CSD_REG_OFFSET_ADC_CTL (offsetof(CSD_Type, ADC_CTL))
675 /** The register offset */
676 #define CY_CSD_REG_OFFSET_SEQ_START (offsetof(CSD_Type, SEQ_START))
677 /** The register offset */
678 #define CY_CSD_REG_OFFSET_IDACA (offsetof(CSD_Type, IDACA))
679 /** The register offset */
680 #define CY_CSD_REG_OFFSET_IDACB (offsetof(CSD_Type, IDACB))
681 /** \} group_csd_reg_const */
682
683 /*******************************************************************************
684 * Function Prototypes
685 *******************************************************************************/
686
687 /**
688 * \addtogroup group_csd_functions
689 * \{
690 */
691
692 cy_en_csd_status_t Cy_CSD_Init(CSD_Type * base, cy_stc_csd_config_t const * config, cy_en_csd_key_t key, cy_stc_csd_context_t * context);
693 cy_en_csd_status_t Cy_CSD_DeInit(const CSD_Type * base, cy_en_csd_key_t key, cy_stc_csd_context_t * context);
694 cy_en_csd_status_t Cy_CSD_Capture(CSD_Type * base, cy_en_csd_key_t key, cy_stc_csd_context_t * context);
695 cy_en_csd_status_t Cy_CSD_Configure(CSD_Type * base, const cy_stc_csd_config_t * config, cy_en_csd_key_t key, const cy_stc_csd_context_t * context);
696
697 __STATIC_INLINE cy_en_csd_key_t Cy_CSD_GetLockStatus(const CSD_Type * base, const cy_stc_csd_context_t * context);
698 __STATIC_INLINE cy_en_csd_status_t Cy_CSD_GetConversionStatus(const CSD_Type * base, const cy_stc_csd_context_t * context);
699
700 uint32_t Cy_CSD_GetVrefTrim(uint32_t referenceVoltage);
701
702 __STATIC_INLINE uint32_t Cy_CSD_ReadReg(const CSD_Type * base, uint32_t offset);
703 __STATIC_INLINE void Cy_CSD_WriteReg(CSD_Type * base, uint32_t offset, uint32_t value);
704 __STATIC_INLINE void Cy_CSD_SetBits(CSD_Type * base, uint32_t offset, uint32_t mask);
705 __STATIC_INLINE void Cy_CSD_ClrBits(CSD_Type * base, uint32_t offset, uint32_t mask);
706 __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type* base, uint32_t offset, uint32_t mask, uint32_t value);
707
708 /*******************************************************************************
709 * Function Name: Cy_CSD_ReadReg
710 ****************************************************************************//**
711 *
712 * Reads value from the specified the CSD HW block register.
713 *
714 * \param base
715 * Pointer to a CSD HW block base address.
716 *
717 * \param offset
718 * Register offset relative to base address.
719 *
720 * \return
721 * Returns a value of the CSD HW block register, specified by the offset
722 * parameter.
723 *
724 *******************************************************************************/
Cy_CSD_ReadReg(const CSD_Type * base,uint32_t offset)725 __STATIC_INLINE uint32_t Cy_CSD_ReadReg(const CSD_Type * base, uint32_t offset)
726 {
727 return(* (volatile uint32_t *)((uint32_t)base + offset));
728 }
729
730
731 /*******************************************************************************
732 * Function Name: Cy_CSD_WriteReg
733 ****************************************************************************//**
734 *
735 * Writes a value to the specified CSD HW block register.
736 *
737 * \param base
738 * Pointer to a CSD HW block base address.
739 *
740 * \param offset
741 * Register offset relative to base address.
742 *
743 * \param value
744 * Value to be written to the register.
745 *
746 *******************************************************************************/
Cy_CSD_WriteReg(CSD_Type * base,uint32_t offset,uint32_t value)747 __STATIC_INLINE void Cy_CSD_WriteReg(CSD_Type * base, uint32_t offset, uint32_t value)
748 {
749 (* (volatile uint32_t *)((uint32_t)base + offset)) = value;
750 }
751
752
753 /*******************************************************************************
754 * Function Name: Cy_CSD_SetBits
755 ****************************************************************************//**
756 *
757 * Sets bits, specified by the Mask parameter in the CSD HW block register,
758 * specified by the Offset parameter.
759 *
760 * \param base
761 * Pointer to a CSD HW block base address.
762 *
763 * \param offset
764 * Register offset relative to base address.
765 *
766 * \param mask
767 * Mask value for register bits to be set.
768 *
769 *******************************************************************************/
Cy_CSD_SetBits(CSD_Type * base,uint32_t offset,uint32_t mask)770 __STATIC_INLINE void Cy_CSD_SetBits(CSD_Type * base, uint32_t offset, uint32_t mask)
771 {
772 volatile uint32_t * regPtr = (volatile uint32_t *)((uint32_t)base + offset);
773 (* regPtr) |= mask;
774 }
775
776
777 /*******************************************************************************
778 * Function Name: Cy_CSD_ClrBits
779 ****************************************************************************//**
780 *
781 * Clears bits, specified by the Mask parameter in the CSD HW block register,
782 * specified by the Offset parameter.
783 *
784 * \param base
785 * Pointer to a CSD HW block base address.
786 *
787 * \param offset
788 * Register offset relative to base address.
789 *
790 * \param mask
791 * Mask value for register bits to be cleared.
792 *
793 *******************************************************************************/
Cy_CSD_ClrBits(CSD_Type * base,uint32_t offset,uint32_t mask)794 __STATIC_INLINE void Cy_CSD_ClrBits(CSD_Type * base, uint32_t offset, uint32_t mask)
795 {
796 volatile uint32_t * regPtr = (volatile uint32_t *)((uint32_t)base + offset);
797 (* regPtr) &= ~mask;
798 }
799
800
801 /*******************************************************************************
802 * Function Name: Cy_CSD_WriteBits
803 ****************************************************************************//**
804 *
805 * Writes field, specified by the Mask parameter with the value, specified by
806 * the Value parameter.
807 *
808 * \param base
809 * Pointer to a CSD HW block base address.
810 *
811 * \param offset
812 * Register offset relative to base address.
813 *
814 * \param mask
815 * Specifies bits to be modified.
816 *
817 * \param value
818 * Specifies a value to be written to the register.
819 *
820 *******************************************************************************/
Cy_CSD_WriteBits(CSD_Type * base,uint32_t offset,uint32_t mask,uint32_t value)821 __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type * base, uint32_t offset, uint32_t mask, uint32_t value)
822 {
823 volatile uint32_t * regPtr = (volatile uint32_t *)((uint32_t)base + offset);
824 (* regPtr) = ((* regPtr) & ~mask) | (value & mask);
825 }
826
827
828 /*******************************************************************************
829 * Function Name: Cy_CSD_GetLockStatus
830 ****************************************************************************//**
831 *
832 * Verifies whether the specified CSD HW block is acquired and locked by a
833 * higher-level firmware.
834 *
835 * \param base
836 * Pointer to a CSD HW block base address.
837 *
838 * \param context
839 * The pointer to the context structure allocated by a user or middleware.
840 *
841 * \return
842 * Returns a key code. See \ref cy_en_csd_key_t.
843 *
844 * \funcusage
845 *
846 * \snippet csd/snippet/main.c snippet_Cy_CSD_CheckKey
847 *
848 *******************************************************************************/
Cy_CSD_GetLockStatus(const CSD_Type * base,const cy_stc_csd_context_t * context)849 __STATIC_INLINE cy_en_csd_key_t Cy_CSD_GetLockStatus(const CSD_Type * base, const cy_stc_csd_context_t * context)
850 {
851 (void)base;
852 return(context->lockKey);
853 }
854
855
856 /*******************************************************************************
857 * Function Name: Cy_CSD_GetConversionStatus
858 ****************************************************************************//**
859 *
860 * Verifies whether the specified CSD HW block is busy
861 * (performing scan or conversion).
862 *
863 * \param base
864 * Pointer to a CSD HW block base address.
865 *
866 * \param context
867 * The pointer to the context structure allocated by a user or middleware.
868 *
869 * \return
870 * Returns status code. See \ref cy_en_csd_status_t.
871 *
872 * \funcusage
873 *
874 * \snippet csd/snippet/main.c snippet_Cy_CSD_CheckStatus
875 *
876 *******************************************************************************/
Cy_CSD_GetConversionStatus(const CSD_Type * base,const cy_stc_csd_context_t * context)877 __STATIC_INLINE cy_en_csd_status_t Cy_CSD_GetConversionStatus(const CSD_Type * base, const cy_stc_csd_context_t * context)
878 {
879 cy_en_csd_status_t csdStatus = CY_CSD_BUSY;
880
881 (void)context;
882 if (((base->SEQ_START & CSD_SEQ_START_START_Msk) == 0u) &&
883 ((base->STAT_SEQ & (CSD_STAT_SEQ_SEQ_STATE_Msk | CSD_STAT_SEQ_ADC_STATE_Msk)) == 0u))
884 {
885 csdStatus = CY_CSD_SUCCESS;
886 }
887
888 return(csdStatus);
889 }
890 /** \} group_csd_functions */
891
892 /** \} group_csd */
893
894 #if defined(__cplusplus)
895 }
896 #endif
897
898 #endif /* CY_IP_MXCSDV2 */
899
900 #endif /* CY_CSD_H */
901
902
903 /* [] END OF FILE */
904