1<?xml version="1.0" encoding="utf-8"?>
2
3
4<!--****************************************************************************
5* \file power_v2.cypersonality
6* \version 1.0
7*
8* \brief
9* Personality description file for MCU part of Low Power Assistant.
10* This supports CAT1B devices.
11*
12********************************************************************************
13* \copyright
14* Copyright (c) 2022, Cypress Semiconductor Corporation (an Infineon company) or
15* an affiliate of Cypress Semiconductor Corporation.
16* SPDX-License-Identifier: Apache-2.0
17*
18* Licensed under the Apache License, Version 2.0 (the "License");
19* you may not use this file except in compliance with the License.
20* You may obtain a copy of the License at
21*
22*     http://www.apache.org/licenses/LICENSE-2.0
23*
24* Unless required by applicable law or agreed to in writing, software
25* distributed under the License is distributed on an "AS IS" BASIS,
26* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
27* See the License for the specific language governing permissions and
28* limitations under the License.
29*****************************************************************************-->
30
31<Personality id="power_v2" name="Power Settings" version="1.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v7">
32  <Dependencies>
33    <IpBlock name="mxs40ssrss" />
34    <Resource name="srss\.power" />
35  </Dependencies>
36  <ExposedMembers>
37    <ExposedMember key="vddaMv" paramId="vddaMv" />
38	<ExposedMember key="usingUlp" paramId="usingUlp" />
39    <ExposedMember key="deepsleepWhenIdle" paramId="deepsleepWhenIdle" />
40  </ExposedMembers>
41  <Parameters>
42    <!-- Documentation -->
43    <ParamDoc id="pdlDoc" name="SysPm API Reference" group="Overview" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__syspm.html" linkText="Open SysPm Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" />
44
45    <ParamBool id="isRegSetAPresent" name="Regulator Set A Present" group="Internal" default="`${(S40S_REGSETA_PRESENT eq 1 ? true : false)}`" visible="false" editable="false"
46      desc="This parameter check for the presence of Regulator set A." />
47
48    <ParamChoice id="actPwrMode" name="System Active Power Profile" group="General" default="`${(S40S_REGSETA_PRESENT eq 1 ? ULP : POWER_PROFILE_0)}`" visible="true" editable="true"
49      desc="Selects the system operating power mode.">
50      <Entry name="Power Profile - 0    (LP MCU + Radio ON)" value="POWER_PROFILE_0" visible="`${!isRegSetAPresent}`" />
51      <Entry name="Power Profile - 1    (ULP MCU + Radio ON)" value="POWER_PROFILE_1" visible="`${!isRegSetAPresent}`" />
52      <Entry name="Power Profile - 2A (LP MCU Only)" value="POWER_PROFILE_2A" visible="`${!isRegSetAPresent}`" />
53      <Entry name="Power Profile - 2B (LP MCU Only)" value="POWER_PROFILE_2B" visible="`${!isRegSetAPresent}`" />
54      <Entry name="Power Profile - 3    (ULP MCU Only)" value="POWER_PROFILE_3" visible="`${!isRegSetAPresent}`" />
55      <Entry name="ULP (Ultra Low Power Mode)" value="ULP" visible="`${isRegSetAPresent}`" />
56      <Entry name="MF (Mid Voltage Mode)" value="MF" visible="`${isRegSetAPresent}`" />
57      <Entry name="LP (Low Power Mode)" value="LP" visible="`${isRegSetAPresent}`" />
58      <Entry name="OD (Over Drive Mode)" value="OD" visible="`${isRegSetAPresent}`" />
59    </ParamChoice>
60
61    <ParamString id="activePowerMode" name="System Active Power Mode" group="Internal" default="`${actPwrMode eq POWER_PROFILE_0    ? &quot;LP&quot;   :
62                                                                                   actPwrMode eq POWER_PROFILE_1   ? &quot;ULP&quot;   :
63                                                                                   actPwrMode eq POWER_PROFILE_2A  ? &quot;LP&quot;   :
64                                                                                   actPwrMode eq POWER_PROFILE_2B  ? &quot;LP&quot;   :
65                                                                                   actPwrMode eq POWER_PROFILE_3   ? &quot;ULP&quot;   :
66                                                                                   actPwrMode eq ULP   ? &quot;ULP&quot;   :
67                                                                                   actPwrMode eq MF   ? &quot;MF&quot;   :
68                                                                                   actPwrMode eq OD   ? &quot;OD&quot;   :
69																				   &quot;LP&quot;}`" visible="false" editable="false" desc="System Active Power Mode." />
70
71    <!-- Power settings -->
72    <ParamBool id="enableLowPowerProfileMode" name="Enable LPACTIVE/LPSLEEP mode" group="General" default="`${false}`" visible="true" editable="true" desc="This parameter enables the Low Power Profile mode i.e LPACTIVE/LPSLEEP" />
73
74	<ParamChoice id="minCurrRegulator" name="Regulator Min Current Mode" group="General" default="`${CY_SYSPM_LDO_MODE_NORMAL}`" visible="true" editable="true"
75      desc="Enables Regulator Minimum Current Mode.">
76      <Entry name="Normal Current LDO" value="CY_SYSPM_LDO_MODE_NORMAL" visible="true" />
77      <Entry name="Minimum Current LDO" value="CY_SYSPM_LDO_MODE_MIN" visible="true" />
78    </ParamChoice>
79
80    <ParamBool id="pmicEnable" name="Enable External PMIC Output" group="General" default="false" visible="true" editable="false"
81      desc="Enables an external PMIC to provide VDDD power to the device." />
82
83    <ParamChoice id="backupSrc" name="vBackup Source" group="General" default="VDDD" visible="true" editable="true"
84      desc="Selects whether the backup power domain is driven by a dedicated supply (e.g. super-cap or battery), or tied to VDDD.">
85      <Entry name="VDDD" value="VDDD" visible="true" />
86      <Entry name="Dedicated Supply" value="DEDICATED" visible="true" />
87    </ParamChoice>
88
89    <ParamChoice id="idlePwrMode" name="System Idle Power Mode" group="RTOS" default="CY_CFG_PWR_MODE_DEEPSLEEP" visible="true" editable="true"
90      desc="Selects the lowest power mode the system attempts to enter when there is no active tasks to execute, i.e. the system is in idle state.
91            This option only applies for an RTOS based application.">
92      <Entry name="Active" value="CY_CFG_PWR_MODE_ACTIVE" visible="true" />
93      <Entry name="CPU Sleep" value="CY_CFG_PWR_MODE_SLEEP" visible="true" />
94      <Entry name="System Deep Sleep" value="CY_CFG_PWR_MODE_DEEPSLEEP" visible="true" />
95      <Entry name="System Deep Sleep RAM" value="CY_CFG_PWR_MODE_DEEPSLEEP_RAM" visible="true" />
96      <Entry name="System Deep Sleep OFF" value="CY_CFG_PWR_MODE_DEEPSLEEP_OFF" visible="true" />
97    </ParamChoice>
98
99    <ParamRange id="deepsleepLatency" name="Deep Sleep Latency (ms)" group="RTOS" default="0" min="0" max="1000" resolution="1" visible="true" editable="true"
100      desc="Greater between the time required to enter to and exit from the deep sleep power mode.
101            This option only applies for an RTOS based application." />
102    <!-- Operating conditions -->
103    <!-- Core Buck -->
104    <ParamString id="coreBuckParam" name="Core Buck Parameters" group="Internal" default="`${actPwrMode eq POWER_PROFILE_0    ? &quot;1.16V High Power&quot;   :
105                                                                                   actPwrMode eq POWER_PROFILE_1   ? &quot;1.16V High Power&quot;   :
106                                                                                   actPwrMode eq POWER_PROFILE_2A  ? &quot;1.16V High Power&quot;   :
107                                                                                   actPwrMode eq POWER_PROFILE_2B  ? &quot;1.1V Low Power&quot;   :
108                                                                                   actPwrMode eq POWER_PROFILE_3   ? &quot;1.0V Low Power&quot;   :
109																				   &quot;1.16V High Power&quot;}`" visible="false" editable="false" desc="Core Buck Voltage and Mode." />
110
111    <ParamString id="coreBuckVoltMacro" name="Core Buck Voltage Macro" group="Internal" default="`${coreBuckParam eq &quot;1.16V High Power&quot;    ? &quot;CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V&quot;   :
112                                                                                   coreBuckParam eq &quot;1.1V Low Power&quot;   ? &quot;CY_SYSPM_CORE_BUCK_VOLTAGE_1_10V&quot;   :
113                                                                                   coreBuckParam eq &quot;1.0V Low Power&quot;   ? &quot;CY_SYSPM_CORE_BUCK_VOLTAGE_1_00V&quot;   :
114																				   &quot;CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V&quot;}`" visible="false" editable="false" desc="Core Buck Voltage Macro." />
115
116    <ParamString id="coreBuckModeMacro" name="Core Buck Mode Macro" group="Internal" default="`${coreBuckParam eq &quot;1.16V High Power&quot;    ? &quot;CY_SYSPM_CORE_BUCK_MODE_HP&quot;   :
117                                                                                   coreBuckParam eq &quot;1.1V Low Power&quot;   ? &quot;CY_SYSPM_CORE_BUCK_MODE_LP&quot;   :
118                                                                                   coreBuckParam eq &quot;1.0V Low Power&quot;   ? &quot;CY_SYSPM_CORE_BUCK_MODE_LP&quot;   :
119																				   &quot;CY_SYSPM_CORE_BUCK_MODE_HP&quot;}`" visible="false" editable="false" desc="Core Buck Mode Macro." />
120
121    <ParamString id="ldoParam" name="LDO Parameters" group="Internal" default="`${actPwrMode eq LP    ? &quot;1.1V LP&quot;   :
122                                                                                   actPwrMode eq MF   ? &quot;1.0V MF&quot;   :
123                                                                                   actPwrMode eq OD  ? &quot;1.2V OD&quot;   :
124																				   &quot;0.9V ULP &quot;}`" visible="false" editable="false" desc="Core Buck Voltage and Mode." />
125
126    <ParamString id="coreBuckVoltagemode" name="Core Buck Voltage and Mode" group="Operating Conditions" default="`${coreBuckParam}`" visible="`${!isRegSetAPresent}`" editable="false" desc="Core Buck Voltage and Mode.." />
127    <ParamString id="ldoVoltagemode" name="LDO Voltage and Mode" group="Operating Conditions" default="`${ldoParam}`" visible="`${isRegSetAPresent}`" editable="false" desc="LDO Voltage and Mode.." />
128    <!-- SDR0 Regulator -->
129    <ParamString id="sdr0Param" name="SDR0 Parameters" group="Internal" default="`${actPwrMode eq POWER_PROFILE_0    ? &quot;1.1V Regulated&quot;   :
130                                                                                   actPwrMode eq POWER_PROFILE_1   ? &quot;1.0V Regulated&quot;   :
131                                                                                   actPwrMode eq POWER_PROFILE_2A  ? &quot;1.1V Regulated&quot;   :
132                                                                                   actPwrMode eq POWER_PROFILE_2B  ? &quot;1.1V Bypassed&quot;   :
133                                                                                   actPwrMode eq POWER_PROFILE_3   ? &quot;1.0V Bypassed&quot;   :
134																				   &quot;1.1V Regulated&quot;}`" visible="false" editable="false" desc="SDR0 Regulator Voltage and Mode." />
135
136    <ParamString id="sdr0VoltMacro" name="SDR0 Voltage Macro" group="Internal" default="`${sdr0Param eq &quot;1.1V Regulated&quot;    ? &quot;CY_SYSPM_SDR_VOLTAGE_1_100V&quot;   :
137                                                                                   sdr0Param eq &quot;1.1V Bypassed&quot;   ? &quot;CY_SYSPM_SDR_VOLTAGE_1_100V&quot;   :
138                                                                                   sdr0Param eq &quot;1.0V Regulated&quot;   ? &quot;CY_SYSPM_SDR_VOLTAGE_1_000V&quot;   :
139                                                                                   sdr0Param eq &quot;1.0V Bypassed&quot;   ? &quot;CY_SYSPM_SDR_VOLTAGE_1_000V&quot;   :
140																				   &quot;CY_SYSPM_SDR_VOLTAGE_1_100V&quot;}`" visible="false" editable="false" desc="SDR0 Voltage Macro." />
141
142    <ParamString id="sdr0Voltagemode" name="SDR0 Regulator Voltage and Mode" group="Operating Conditions" default="`${sdr0Param}`" visible="`${!isRegSetAPresent}`" editable="false" desc="SDR0 Regulator Voltage and Mode.." />
143
144    <ParamString id="sdr0DpSlpVoltage" name="SDR0 Regulator Deep Sleep Voltage" group="Operating Conditions" default="0.9V" visible="`${!isRegSetAPresent}`" editable="false" desc="SDR0 Deep Sleep Regulator Voltage " />
145
146	<ParamBool id="sdr0BypassModeMacro" name="SDR0 Bypass Mode Enable" group="Operating Conditions" default="true" visible="`${!isRegSetAPresent}`" editable="true" desc="SDR0 bypass Mode Selection" />
147
148    <!-- SDR1 Regulator -->
149    <ParamString id="sdr1Param" name="SDR1 Parameters" group="Internal" default="`${actPwrMode eq POWER_PROFILE_0    ? &quot;1.1V Regulated&quot;   :
150                                                                                   actPwrMode eq POWER_PROFILE_1   ? &quot;1.1V Regulated&quot;   :
151                                                                                   actPwrMode eq POWER_PROFILE_2A  ? &quot;Off&quot;   :
152                                                                                   actPwrMode eq POWER_PROFILE_2B  ? &quot;Off&quot;   :
153                                                                                   actPwrMode eq POWER_PROFILE_3   ? &quot;Off&quot;   :
154																				   &quot;Off&quot;}`" visible="false" editable="false" desc="SDR1 Regulator Voltage and Mode." />
155
156    <ParamString id="sdr1VoltMacro" name="SDR1 Voltage Macro" group="Internal" default="`${sdr1Param eq &quot;1.1V Regulated&quot;    ? &quot;CY_SYSPM_SDR_VOLTAGE_1_100V&quot;   :
157                                                                                   sdr1Param eq &quot;Off&quot;   ? &quot;0&quot;   :
158																				   &quot;0&quot;}`" visible="false" editable="false" desc="SDR1 Voltage Macro." />
159
160    <ParamString id="sdr1Voltagemode" name="SDR1 Regulator Voltage and Mode" group="Operating Conditions" default="`${sdr1Param}`" visible="`${!isRegSetAPresent}`" editable="false" desc="SDR1 Regulator Voltage and Mode.." />
161
162    <ParamRange id="vddaMv"    name="VDDA Voltage (mV)"    group="Operating Conditions" default="3300" min="1700" max="3600" resolution="1" visible="true" editable="true" desc="VDDA voltage in millivolts." />
163    <ParamRange id="vdddMv"    name="VDDD Voltage (mV)"    group="Operating Conditions" default="3300" min="1700" max="3600" resolution="1" visible="true" editable="true" desc="VDDD voltage in millivolts." />
164    <ParamRange id="vddbuckMv" name="VDDBUCK Voltage (mV)" group="Operating Conditions" default="3300" min="1700" max="3600" resolution="1" visible="true" editable="true" desc="VDDBUCK voltage in millivolts." />
165    <ParamRange id="vddio0Mv"  name="VDDIO0 Voltage (mV)"  group="Operating Conditions" default="3300" min="1700" max="3600" resolution="1" visible="true" editable="true" desc="VDDIO0 voltage in millivolts." />
166    <ParamRange id="vddio1Mv"  name="VDDIO1 Voltage (mV)"  group="Operating Conditions" default="3300" min="1700" max="3600" resolution="1" visible="true" editable="true" desc="VDDIO1 voltage in millivolts." />
167
168    <!-- Wakeup pins -->
169    <ParamSignal port="hibernate_wakeup[0]" name="Hibernate Wakeup (0)" group="Wakeup Pins" visible="`${hasVisibleOption(&quot;hibernate_wakeup[0]&quot;)}`"
170      desc="Reserve the hibernate_wakeup[0] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" >
171      <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" >
172        <Parameter id="DriveModes" severity="DEFAULT" reason="">
173          <Fixed value="CY_GPIO_DM_PULLUP" />
174        </Parameter>
175      </Constraint>
176      <Constraint type="ACCEPT" targetLocation=".*" valid="true" />
177    </ParamSignal>
178
179    <ParamSignal port="hibernate_wakeup[1]" name="Hibernate Wakeup (1)" group="Wakeup Pins" visible="`${hasVisibleOption(&quot;hibernate_wakeup[1]&quot;)}`"
180      desc="Reserve the hibernate_wakeup[1] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" >
181      <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" >
182        <Parameter id="DriveModes" severity="DEFAULT" reason="">
183          <Fixed value="CY_GPIO_DM_PULLUP" />
184        </Parameter>
185      </Constraint>
186      <Constraint type="ACCEPT" targetLocation=".*" valid="true" />
187    </ParamSignal>
188
189    <ParamSignal port="hibernate_wakeup[2]" name="Hibernate Wakeup (2)" group="Wakeup Pins" visible="`${hasVisibleOption(&quot;hibernate_wakeup[2]&quot;)}`"
190      desc="Reserve the hibernate_wakeup[2] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" >
191      <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" >
192        <Parameter id="DriveModes" severity="DEFAULT" reason="">
193          <Fixed value="CY_GPIO_DM_PULLUP" />
194        </Parameter>
195      </Constraint>
196      <Constraint type="ACCEPT" targetLocation=".*" valid="true" />
197    </ParamSignal>
198
199    <ParamSignal port="hibernate_wakeup[3]" name="Hibernate Wakeup (3)" group="Wakeup Pins" visible="`${hasVisibleOption(&quot;hibernate_wakeup[3]&quot;)}`"
200      desc="Reserve the hibernate_wakeup[3] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" >
201      <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" >
202        <Parameter id="DriveModes" severity="DEFAULT" reason="">
203          <Fixed value="CY_GPIO_DM_PULLUP" />
204        </Parameter>
205      </Constraint>
206      <Constraint type="ACCEPT" targetLocation=".*" valid="true" />
207    </ParamSignal>
208
209    <ParamSignal port="pmic_wakeup_in[0]" name="PMIC Wakeup Input" group="Wakeup Pins" visible="`${pmicEnable}`"
210      desc="Reserve the pmic_wakeup_in pin" canBeEmpty="true" >
211      <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="`${pmicEnable}`" >
212        <Parameter id="DriveModes" severity="DEFAULT" reason="">
213          <Fixed value="CY_GPIO_DM_PULLUP" />
214        </Parameter>
215      </Constraint>
216      <Constraint type="ACCEPT" targetLocation=".*" valid="true" />
217    </ParamSignal>
218
219    <ParamSignal port="pmic_wakeup_out[0]" name="PMIC Wakeup Output" group="Wakeup Pins" visible="`${pmicEnable}`"
220      desc="Reserve the pmic_wakeup_out pin" canBeEmpty="`${!pmicEnable}`" >
221      <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="`${pmicEnable}`" >
222        <Parameter id="DriveModes" severity="DEFAULT" reason="">
223          <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" />
224        </Parameter>
225      </Constraint>
226      <Constraint type="ACCEPT" targetLocation=".*" valid="true" />
227    </ParamSignal>
228    <ParamBool id="usingUlp" name="usingUlp" group="Internal" default="`${activePowerMode eq &quot;ULP&quot;}`" visible="false" editable="false" desc="" />
229    <ParamBool id="deepsleepWhenIdle" name="deepsleepWhenIdle" group="Internal" default="`${idlePwrMode eq CY_CFG_PWR_MODE_DEEPSLEEP}`" visible="false" editable="false" desc="" />
230
231  </Parameters>
232
233  <!-- Error checking -->
234  <DRCs>
235    <DRC type="ERROR" text="The input voltage of VDDD is set to `${vdddMv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vdddMv &gt; vddaMv)}`" />
236    <DRC type="ERROR" text="The input voltage of VDDBUCK is set to `${vddbuckMv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vddbuckMv &gt; vddaMv)}`" />
237    <DRC type="ERROR" text="The input voltage of VDDIO0 is set to `${vddio0Mv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vddio0Mv &gt; vddaMv)}`" />
238    <DRC type="ERROR" text="The input voltage of VDDIO1 is set to `${vddio1Mv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vddio1Mv &gt; vddaMv)}`" />
239    <DRC type="WARNING" text="SMIF Config should not be in FLASH when DS-RAM is selected as System Idle Power Mode" condition="`${isBlockUsed(&quot;smif[0]&quot;) ? (((idlePwrMode eq CY_CFG_PWR_MODE_DEEPSLEEP_RAM) &amp;&amp; (getExposedMember(&quot;smif[0]&quot;, &quot;inFlash&quot;)) eq true)) : false}`" />
240  </DRCs>
241
242  <!-- Generated firmware -->
243  <ConfigFirmware>
244    <ConfigInclude value="cy_syspm.h" include="true" />
245    <ConfigDefine name="CY_CFG_PWR_MODE_LP"             public="true" value="0x01UL" include="true" />
246    <ConfigDefine name="CY_CFG_PWR_MODE_ULP"            public="true" value="0x02UL" include="true" />
247    <ConfigDefine name="CY_CFG_PWR_MODE_ACTIVE"         public="true" value="0x04UL" include="true" />
248    <ConfigDefine name="CY_CFG_PWR_MODE_MF"             public="true" value="0x05UL" include="true" />
249    <ConfigDefine name="CY_CFG_PWR_MODE_OD"             public="true" value="0x06UL" include="true" />
250    <ConfigDefine name="CY_CFG_PWR_MODE_SLEEP"          public="true" value="0x08UL" include="true" />
251    <ConfigDefine name="CY_CFG_PWR_MODE_DEEPSLEEP"      public="true" value="0x10UL" include="true" />
252    <ConfigDefine name="CY_CFG_PWR_MODE_DEEPSLEEP_RAM"  public="true" value="0x11UL" include="true" />
253    <ConfigDefine name="CY_CFG_PWR_MODE_DEEPSLEEP_OFF"  public="true" value="0x12UL" include="true" />
254    <ConfigDefine name="CY_CFG_PWR_SYS_IDLE_MODE"       public="true" value="`${idlePwrMode}`" include="true" />
255	<ConfigDefine name="CY_CFG_PWR_DEEPSLEEP_LATENCY"   public="true" value="`${deepsleepLatency}`UL" include="true" />
256    <ConfigDefine name="CY_CFG_PWR_SYS_ACTIVE_MODE"  public="true" value="CY_CFG_PWR_MODE_`${activePowerMode}`" include="true" />
257    <ConfigDefine name="CY_CFG_PWR_SYS_ACTIVE_PROFILE"  public="true" value="CY_CFG_PWR_MODE_`${actPwrMode}`" include="true" />
258    <ConfigDefine name="CY_CFG_PWR_SYS_LP_PROFILE_MODE" public="true" value="`${enableLowPowerProfileMode ? 1 : 0}`" include="true" />
259    <ConfigDefine name="CY_CFG_PWR_ENABLED"             public="false" value="1" include="true" />
260	<ConfigDefine name="CY_CFG_PWR_INIT"                public="false" value="1" include="true" />
261    <ConfigDefine name="CY_CFG_PWR_USING_PMIC"          public="false" value="`${pmicEnable ? 1 : 0}`" include="true" />
262    <ConfigDefine name="CY_CFG_PWR_VBACKUP_USING_VDDD"  public="false" value="`${(backupSrc eq VDDD) ? 1 : 0}`" include="true" />
263	<ConfigDefine name="CY_CFG_PWR_REGULATOR_MODE_MIN"  public="false" value="`${((minCurrRegulator eq CY_SYSPM_LDO_MODE_MIN)) ? 1 : 0}`" include="true" />
264    <ConfigDefine name="CY_CFG_PWR_USING_ULP"           public="false" value="`${usingUlp ? 1 : 0}`" include="true" />
265    <!-- Operating conditions -->
266    <ConfigDefine name="CY_CFG_PWR_VDDA_MV"                public="true" value="`${vddaMv}`" include="true" />
267    <ConfigDefine name="CY_CFG_PWR_VDDD_MV"                public="true" value="`${vdddMv}`" include="true" />
268    <ConfigDefine name="CY_CFG_PWR_VDDBUCK"                public="true" value="`${vddbuckMv}`" include="true" />
269    <ConfigDefine name="CY_CFG_PWR_VDDIO0_MV"              public="true" value="`${vddio0Mv}`" include="true" />
270    <ConfigDefine name="CY_CFG_PWR_VDDIO1_MV"              public="true" value="`${vddio1Mv}`" include="true" />
271	<ConfigDefine name="CY_CFG_PWR_CBUCK_VOLT"             public="true" value="`${coreBuckVoltMacro}`" include="true" />
272	<ConfigDefine name="CY_CFG_PWR_CBUCK_MODE"             public="true" value="`${coreBuckModeMacro}`" include="true" />
273	<ConfigDefine name="CY_CFG_PWR_SDR0_VOLT"              public="true" value="`${sdr0VoltMacro}`" include="true" />
274	<ConfigDefine name="CY_CFG_PWR_SDR0_MODE_BYPASS"       public="true" value="`${sdr0BypassModeMacro}`" include="true" />
275	<ConfigDefine name="CY_CFG_PWR_SDR1_VOLT"              public="true" value="`${sdr1VoltMacro}`" include="true" />
276    <ConfigDefine name="CY_CFG_PWR_SDR1_ENABLE"            public="true" value="`${sdr1VoltMacro ? true : false}`" include="true" />
277
278    <ConfigStruct name="coreBuckConfigParam" type="cy_stc_syspm_core_buck_params_t" const="false" public="false" include="`${!isRegSetAPresent}`">
279      <Member name="voltageSel" value="CY_CFG_PWR_CBUCK_VOLT" />
280      <Member name="mode" value="CY_CFG_PWR_CBUCK_MODE" />
281      <Member name="override" value="false" />
282	  <Member name="copySettings" value="false" />
283	  <Member name="useSettings" value="false" />
284      <Member name="inRushLimitSel" value="0" />
285    </ConfigStruct>
286
287    <ConfigStruct name="sdr0ConfigParam" type="cy_stc_syspm_sdr_params_t" const="false" public="false" include="`${!isRegSetAPresent}`">
288      <Member name="coreBuckVoltSel" value="CY_CFG_PWR_CBUCK_VOLT" />
289      <Member name="coreBuckMode" value="CY_CFG_PWR_CBUCK_MODE" />
290	  <Member name="coreBuckDpSlpVoltSel" value="CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V" />
291	  <Member name="coreBuckDpSlpMode" value="CY_SYSPM_CORE_BUCK_MODE_LP" />
292      <Member name="sdr0DpSlpVoltSel" value="CY_SYSPM_SDR_VOLTAGE_0_900V" />
293	  <Member name="sdrVoltSel" value="CY_CFG_PWR_SDR0_VOLT" />
294      <Member name="sdr0Allowbypass" value="CY_CFG_PWR_SDR0_MODE_BYPASS" />
295    </ConfigStruct>
296
297    <ConfigStruct name="sdr1ConfigParam" type="cy_stc_syspm_sdr_params_t" const="false" public="false" include="`${!isRegSetAPresent}`">
298      <Member name="coreBuckVoltSel" value="CY_CFG_PWR_CBUCK_VOLT" />
299      <Member name="coreBuckMode" value="CY_CFG_PWR_CBUCK_MODE" />
300      <Member name="sdrVoltSel" value="CY_CFG_PWR_SDR1_VOLT" />
301      <Member name="sdr1HwControl" value="true" />
302	  <Member name="sdr1Enable" value="true" />
303    </ConfigStruct>
304
305    <ConfigFunction signature="__STATIC_INLINE void init_cycfg_power(void)" body="
306   CY_UNUSED_PARAMETER(sdr1ConfigParam); /* Suppress a compiler warning about unused variables */&#xA;&#xA;
307   Cy_SysPm_Init();&#xA;
308   /* **Reset the Backup domain on POR, XRES, BOD only if Backup domain is supplied by VDDD** */&#xA;
309   #if (CY_CFG_PWR_VBACKUP_USING_VDDD)&#xA;
310       #ifdef CY_CFG_SYSCLK_ILO_ENABLED&#xA;
311           if (0u == Cy_SysLib_GetResetReason() /* POR, XRES, or BOD */)&#xA;
312           {&#xA;
313               Cy_SysLib_ResetBackupDomain();&#xA;
314               Cy_SysClk_IloDisable();&#xA;
315               Cy_SysClk_IloInit();&#xA;
316           }&#xA;
317       #endif /* CY_CFG_SYSCLK_ILO_ENABLED */&#xA;
318   #endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */&#xA;&#xA;
319   /* **System Active Power Mode Profile Configuration** */&#xA;
320   /* Core Buck Regulator Configuration */&#xA;
321   Cy_SysPm_CoreBuckConfig(&amp;coreBuckConfigParam);&#xA;&#xA;
322   /* SDR0 Regulator Configuration */&#xA;
323   Cy_SysPm_SdrConfigure(CY_SYSPM_SDR_0, &amp;sdr0ConfigParam);&#xA;&#xA;
324   /* SDR1 Regulator Configuration */&#xA;
325   #if (CY_CFG_PWR_SDR1_ENABLE)&#xA;
326       Cy_SysPm_SdrConfigure(CY_SYSPM_SDR_1, &amp;sdr1ConfigParam);&#xA;
327   #endif /* CY_CFG_PWR_SDR1_VOLT */&#xA;&#xA;
328   /* **System Active Low Power Profile(LPACTIVE/LPSLEEP) Configuration** */&#xA;
329   #if (CY_CFG_PWR_SYS_LP_PROFILE_MODE)&#xA;
330       Cy_SysPm_SystemLpActiveEnter();&#xA;
331   #endif /* CY_CFG_PWR_SYS_ACTIVE_MODE */&#xA;&#xA;
332   /* **System Regulators Low Current Configuration** */&#xA;
333   #if (CY_CFG_PWR_REGULATOR_MODE_MIN)&#xA;
334       Cy_SysPm_SystemSetMinRegulatorCurrent();&#xA;
335   #endif /* CY_CFG_PWR_REGULATOR_MODE_MIN */&#xA;&#xA;
336   /* **System Idle Power Mode Configuration** */&#xA;
337   #if (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP)&#xA;
338       Cy_SysPm_SetDeepSleepMode(CY_SYSPM_MODE_DEEPSLEEP);&#xA;
339   #elif (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP_RAM)&#xA;
340       Cy_SysPm_SetDeepSleepMode(CY_SYSPM_MODE_DEEPSLEEP_RAM);&#xA;
341   #elif (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP_OFF)&#xA;
342       Cy_SysPm_SetDeepSleepMode(CY_SYSPM_MODE_DEEPSLEEP_OFF);&#xA;
343   #endif /* CY_CFG_PWR_SYS_IDLE_MODE */"
344    public="false" include="`${!isRegSetAPresent}`" />
345<ConfigFunction signature="__STATIC_INLINE void init_cycfg_power(void)" body="
346   Cy_SysPm_Init();&#xA;
347   /* **Reset the Backup domain on POR, XRES, BOD only if Backup domain is supplied by VDDD** */&#xA;
348   #if (CY_CFG_PWR_VBACKUP_USING_VDDD)&#xA;
349       #ifdef CY_CFG_SYSCLK_ILO_ENABLED&#xA;
350           if (0u == Cy_SysLib_GetResetReason() /* POR, XRES, or BOD */)&#xA;
351           {&#xA;
352               Cy_SysLib_ResetBackupDomain();&#xA;
353               Cy_SysClk_IloDisable();&#xA;
354               Cy_SysClk_IloInit();&#xA;
355           }&#xA;
356       #endif /* CY_CFG_SYSCLK_ILO_ENABLED */&#xA;
357   #endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */&#xA;&#xA;
358   /* **System Active Power Mode Profile Configuration** */&#xA;
359   /* **System Active Low Power Profile(LPACTIVE/LPSLEEP) Configuration** */&#xA;
360   #if (CY_CFG_PWR_SYS_LP_PROFILE_MODE)&#xA;
361       Cy_SysPm_SystemLpActiveEnter();&#xA;
362   #endif /* CY_CFG_PWR_SYS_ACTIVE_MODE */&#xA;&#xA;
363   /* **System Regulators Low Current Configuration** */&#xA;
364   #if (CY_CFG_PWR_REGULATOR_MODE_MIN)&#xA;
365       Cy_SysPm_SystemSetMinRegulatorCurrent();&#xA;
366   #endif /* CY_CFG_PWR_REGULATOR_MODE_MIN */&#xA;&#xA;
367   /* **System Idle Power Mode Configuration** */&#xA;
368   #if (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP)&#xA;
369       Cy_SysPm_SetDeepSleepMode(CY_SYSPM_MODE_DEEPSLEEP);&#xA;
370   #elif (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP_RAM)&#xA;
371       Cy_SysPm_SetDeepSleepMode(CY_SYSPM_MODE_DEEPSLEEP_RAM);&#xA;
372   #elif (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP_OFF)&#xA;
373       Cy_SysPm_SetDeepSleepMode(CY_SYSPM_MODE_DEEPSLEEP_OFF);&#xA;
374   #endif /* CY_CFG_PWR_SYS_IDLE_MODE */"
375    public="false" include="`${isRegSetAPresent}`" />
376  </ConfigFirmware>
377</Personality>
378