1<?xml version="1.0" encoding="utf-8"?> 2 3 4<!--**************************************************************************** 5* \file pdm_pcm.cypersonality 6* \version 3.0 7* 8* \brief 9* PDM-PCM personality description file. Supports CAT1B and CAT1D family of devices. 10* 11******************************************************************************** 12* \copyright 13* Copyright (c) (2022), Cypress Semiconductor Corporation (an Infineon company) or 14* an affiliate of Cypress Semiconductor Corporation. 15* SPDX-License-Identifier: Apache-2.0 16* 17* Licensed under the Apache License, Version 2.0 (the "License"); 18* you may not use this file except in compliance with the License. 19* You may obtain a copy of the License at 20* 21* http://www.apache.org/licenses/LICENSE-2.0 22* 23* Unless required by applicable law or agreed to in writing, software 24* distributed under the License is distributed on an "AS IS" BASIS, 25* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 26* See the License for the specific language governing permissions and 27* limitations under the License. 28*****************************************************************************--> 29 30<Personality id="pdm_v2" name="PDM-PCM Converter" version="3.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v7"> 31 <Dependencies> 32 <IpBlock name="mxpdm" /> 33 <Resource name="pdm" /> 34 </Dependencies> 35 <ExposedMembers /> 36 <Parameters> 37 <!-- PDL documentation --> 38 <!-- PDL documentation --> 39 <ParamDoc id="pdlDoc" name="Configuration Help" group="Overview" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__pdm__pcm__v2.html" linkText="Open PDM_PCM Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation." /> 40 41 <!-- Channels --> 42 <ParamChoice id="rxChannels" name="Channels Enabled" group="Channel Info" default="1" visible="true" editable="true" desc="Set channels enabled (Total 2 Channels can be enabled)"> 43 <Entry name="1" value="1" visible="true" /> 44 <Entry name="2" value="2" visible="true" /> 45 <Entry name="3" value="3" visible="false" /> 46 <Entry name="4" value="4" visible="false" /> 47 <Entry name="5" value="5" visible="false" /> 48 <Entry name="6" value="6" visible="false" /> 49 <Entry name="7" value="7" visible="false" /> 50 <Entry name="8" value="8" visible="false" /> 51 </ParamChoice> 52 <ParamChoice id="monoChannel" name="Mono Channel" group="Channel Info" default="1" visible="`${rxChannels == 1}`" editable="true" desc="Set Mono channel to be enabled (Any one of the 2 Channels can be used as mono)"> 53 <Entry name="1" value="1" visible="true" /> 54 <Entry name="2" value="2" visible="true" /> 55 </ParamChoice> 56 57 <!-- Channel One Config --> 58 <ParamSignal port="tr_activate[0]" name="Trigger Input" group="Channel One Config" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" desc="Sets up the trigger input signal for the PDM Channel 1 start." canBeEmpty="true" /> 59 60 <ParamRange id="sampleDelay" name="Interface Sample Delay" group="Channel One Config" default="3" min="0" max="255" resolution="1" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="Interface sample delay. This field specifies when a PDM value is captured. Internally user selected value will be incremented by 1. Value 0 means 1 clock cycle after the rising edge." /> 61 62 <ParamChoice id="wordSize" name="Word Size" group="Channel One Config" default="CY_PDM_PCM_WSIZE_16_BIT" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="Set word length (in bits)"> 63 <Entry name="8" value="CY_PDM_PCM_WSIZE_8_BIT" visible="true" /> 64 <Entry name="10" value="CY_PDM_PCM_WSIZE_10_BIT" visible="true" /> 65 <Entry name="12" value="CY_PDM_PCM_WSIZE_12_BIT" visible="true" /> 66 <Entry name="14" value="CY_PDM_PCM_WSIZE_14_BIT" visible="true" /> 67 <Entry name="16" value="CY_PDM_PCM_WSIZE_16_BIT" visible="true" /> 68 <Entry name="18" value="CY_PDM_PCM_WSIZE_18_BIT" visible="true" /> 69 <Entry name="20" value="CY_PDM_PCM_WSIZE_20_BIT" visible="true" /> 70 <Entry name="24" value="CY_PDM_PCM_WSIZE_24_BIT" visible="true" /> 71 <Entry name="32" value="CY_PDM_PCM_WSIZE_32_BIT" visible="true" /> 72 </ParamChoice> 73 74 <ParamBool id="signExtension" name="Sign Extension" group="Channel One Config" default="true" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="Sign extension type:" /> 75 76 <ParamRange id="rxFifoTriggerLevel" name="FIFO Trigger Level" group="Channel One Config" default="0" min="0" max="63" resolution="1" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="Set FIFO level to trigger an event (interrupt or DMA request). Should not be greater than 63." /> 77 78 <ParamBool id="fir0Enable" name="FIR0 Enable" group="Channel One Config" default="false" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="FIR 0 filter coefficient enable. " /> 79 80 <ParamChoice id="cicDecimCode" name="CIC FILTER DECIMATION" group="Channel One Config" default="CY_PDM_PCM_CHAN_CIC_DECIM_4" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="CIC filter decimation. The CIC filter PCM frequency is a fraction of the PDM frequency"> 81 <Entry name="1/2" value="CY_PDM_PCM_CHAN_CIC_DECIM_2" visible="true" /> 82 <Entry name="1/4" value="CY_PDM_PCM_CHAN_CIC_DECIM_4" visible="true" /> 83 <Entry name="1/8" value="CY_PDM_PCM_CHAN_CIC_DECIM_8" visible="true" /> 84 <Entry name="1/16" value="CY_PDM_PCM_CHAN_CIC_DECIM_16" visible="true" /> 85 <Entry name="1/32" value="CY_PDM_PCM_CHAN_CIC_DECIM_32" visible="true" /> 86 </ParamChoice> 87 88 <ParamChoice id="fir0DecimCode" name="FIR0 FILTER DECIMATION" group="Channel One Config" default="CY_PDM_PCM_CHAN_FIR0_DECIM_1" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="FIR filter decimation. The FIR filter PCM frequency is a fraction of the CIC filter PCM frequency"> 89 <Entry name="1/1" value="CY_PDM_PCM_CHAN_FIR0_DECIM_1" visible="true" /> 90 <Entry name="1/2" value="CY_PDM_PCM_CHAN_FIR0_DECIM_2" visible="true" /> 91 <Entry name="1/3" value="CY_PDM_PCM_CHAN_FIR0_DECIM_3" visible="true" /> 92 <Entry name="1/4" value="CY_PDM_PCM_CHAN_FIR0_DECIM_4" visible="true" /> 93 <Entry name="1/5" value="CY_PDM_PCM_CHAN_FIR0_DECIM_5" visible="true" /> 94 </ParamChoice> 95 96 <ParamRange id="fir0Scale" name="FIR0 Scale" group="Channel One Config" default="0" min="0" max="31" resolution="1" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="FIR 0 filter PCM scaling. FIR 0 filter PCM values are scaled to 26-bit signed PCM values Range 0 to 31." /> 97 98 <ParamChoice id="fir1DecimCode" name="FIR1 FILTER DECIMATION" group="Channel One Config" default="CY_PDM_PCM_CHAN_FIR1_DECIM_1" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="FIR filter decimation. The FIR filter PCM frequency is a fraction of the CIC filter PCM frequency"> 99 <Entry name="1/1" value="CY_PDM_PCM_CHAN_FIR1_DECIM_1" visible="true" /> 100 <Entry name="1/2" value="CY_PDM_PCM_CHAN_FIR1_DECIM_2" visible="true" /> 101 <Entry name="1/3" value="CY_PDM_PCM_CHAN_FIR1_DECIM_3" visible="true" /> 102 <Entry name="1/4" value="CY_PDM_PCM_CHAN_FIR1_DECIM_4" visible="true" /> 103 </ParamChoice> 104 105 <ParamRange id="fir1Scale" name="FIR1 Scale" group="Channel One Config" default="15" min="0" max="31" resolution="1" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="FIR 1 filter PCM scaling. FIR 1 filter PCM values are scaled to 26-bit signed PCM values Range 0 to 31." /> 106 107 <ParamBool id="dcBlockDisable" name="DC Block Enable" group="Channel One Config" default="true" visible="`${(rxChannels >= 2) || (monoChannel == 1)}`" editable="true" desc="DC block to is by default enabled. Disable this bit to disable the DC Block. This is used for test purpose only. " /> 108 109 <ParamChoice id="dcBlockCode" name="DC Block Code" group="Channel One Config" default="CY_PDM_PCM_CHAN_DCBLOCK_CODE_2" visible="`${((rxChannels >= 2) || (monoChannel == 1)) && dcBlockDisable}`" editable="true" desc="DC blocker coefficient"> 110 <Entry name="CODE 1" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_1" visible="true" /> 111 <Entry name="CODE 2" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_2" visible="true" /> 112 <Entry name="CODE 4" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_4" visible="true" /> 113 <Entry name="CODE 8" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_8" visible="true" /> 114 <Entry name="CODE 16" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_16" visible="true" /> 115 <Entry name="CODE 32" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_32" visible="true" /> 116 <Entry name="CODE 64" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_64" visible="true" /> 117 <Entry name="CODE 128" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_128" visible="true" /> 118 </ParamChoice> 119 120 <!-- Channel Two Config --> 121 <ParamSignal port="tr_activate[1]" name="Trigger Input" group="Channel Two Config" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" desc="Sets up the trigger input signal for the PDM Channel 2 start." canBeEmpty="true" /> 122 123 <ParamRange id="sampleDelay2" name="Interface Sample Delay" group="Channel Two Config" default="3" min="0" max="255" resolution="1" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="Interface sample delay. This field specifies when a PDM value is captured. Internally user selected value will be incremented by 1. Value 0 means 1 clock cycle after the rising edge." /> 124 125 <ParamChoice id="wordSize2" name="Word Size" group="Channel Two Config" default="CY_PDM_PCM_WSIZE_16_BIT" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="Set word length (in bits)"> 126 <Entry name="8" value="CY_PDM_PCM_WSIZE_8_BIT" visible="true" /> 127 <Entry name="10" value="CY_PDM_PCM_WSIZE_10_BIT" visible="true" /> 128 <Entry name="12" value="CY_PDM_PCM_WSIZE_12_BIT" visible="true" /> 129 <Entry name="14" value="CY_PDM_PCM_WSIZE_14_BIT" visible="true" /> 130 <Entry name="16" value="CY_PDM_PCM_WSIZE_16_BIT" visible="true" /> 131 <Entry name="18" value="CY_PDM_PCM_WSIZE_18_BIT" visible="true" /> 132 <Entry name="20" value="CY_PDM_PCM_WSIZE_20_BIT" visible="true" /> 133 <Entry name="24" value="CY_PDM_PCM_WSIZE_24_BIT" visible="true" /> 134 <Entry name="32" value="CY_PDM_PCM_WSIZE_32_BIT" visible="true" /> 135 </ParamChoice> 136 137 <ParamBool id="signExtension2" name="Sign Extension" group="Channel Two Config" default="true" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="Sign extension type:" /> 138 139 <ParamRange id="rxFifoTriggerLevel2" name="FIFO Trigger Level" group="Channel Two Config" default="0" min="0" max="63" resolution="1" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="Set FIFO level to trigger an event (interrupt or DMA request). Should not be greater than 63." /> 140 141 <ParamBool id="fir0Enable2" name="FIR0 Enable" group="Channel Two Config" default="false" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="FIR 0 filter coefficient enable. " /> 142 143 <ParamChoice id="cicDecimCode2" name="CIC FILTER DECIMATION" group="Channel Two Config" default="CY_PDM_PCM_CHAN_CIC_DECIM_4" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="CIC filter decimation. The CIC filter PCM frequency is a fraction of the PDM frequency"> 144 <Entry name="1/2" value="CY_PDM_PCM_CHAN_CIC_DECIM_2" visible="true" /> 145 <Entry name="1/4" value="CY_PDM_PCM_CHAN_CIC_DECIM_4" visible="true" /> 146 <Entry name="1/8" value="CY_PDM_PCM_CHAN_CIC_DECIM_8" visible="true" /> 147 <Entry name="1/16" value="CY_PDM_PCM_CHAN_CIC_DECIM_16" visible="true" /> 148 <Entry name="1/32" value="CY_PDM_PCM_CHAN_CIC_DECIM_32" visible="true" /> 149 </ParamChoice> 150 151 <ParamChoice id="fir0DecimCode2" name="FIR0 FILTER DECIMATION" group="Channel Two Config" default="CY_PDM_PCM_CHAN_FIR0_DECIM_1" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="FIR filter decimation. The FIR filter PCM frequency is a fraction of the CIC filter PCM frequency"> 152 <Entry name="1/1" value="CY_PDM_PCM_CHAN_FIR0_DECIM_1" visible="true" /> 153 <Entry name="1/2" value="CY_PDM_PCM_CHAN_FIR0_DECIM_2" visible="true" /> 154 <Entry name="1/3" value="CY_PDM_PCM_CHAN_FIR0_DECIM_3" visible="true" /> 155 <Entry name="1/4" value="CY_PDM_PCM_CHAN_FIR0_DECIM_4" visible="true" /> 156 <Entry name="1/5" value="CY_PDM_PCM_CHAN_FIR0_DECIM_5" visible="true" /> 157 </ParamChoice> 158 159 <ParamRange id="fir0Scale2" name="FIR0 Scale" group="Channel Two Config" default="0" min="0" max="31" resolution="1" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="FIR 0 filter PCM scaling. FIR 0 filter PCM values are scaled to 26-bit signed PCM values Range 0 to 31." /> 160 161 <ParamChoice id="fir1DecimCode2" name="FIR1 FILTER DECIMATION" group="Channel Two Config" default="CY_PDM_PCM_CHAN_FIR1_DECIM_1" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="FIR filter decimation. The FIR filter PCM frequency is a fraction of the CIC filter PCM frequency"> 162 <Entry name="1/1" value="CY_PDM_PCM_CHAN_FIR1_DECIM_1" visible="true" /> 163 <Entry name="1/2" value="CY_PDM_PCM_CHAN_FIR1_DECIM_2" visible="true" /> 164 <Entry name="1/3" value="CY_PDM_PCM_CHAN_FIR1_DECIM_3" visible="true" /> 165 <Entry name="1/4" value="CY_PDM_PCM_CHAN_FIR1_DECIM_4" visible="true" /> 166 </ParamChoice> 167 168 <ParamRange id="fir1Scale2" name="FIR1 Scale" group="Channel Two Config" default="15" min="0" max="31" resolution="1" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="FIR 1 filter PCM scaling. FIR 1 filter PCM values are scaled to 26-bit signed PCM values Range 0 to 31." /> 169 170 <ParamBool id="dcBlockDisable2" name="DC Block Enable" group="Channel Two Config" default="true" visible="`${(rxChannels >= 2) || (monoChannel == 2)}`" editable="true" desc="DC block to is by default enabled. Disable this bit to disable the DC Block. This is used for test purpose only. " /> 171 172 <ParamChoice id="dcBlockCode2" name="DC Block Code" group="Channel Two Config" default="CY_PDM_PCM_CHAN_DCBLOCK_CODE_2" visible="`${((rxChannels >= 2) || (monoChannel == 2)) && dcBlockDisable2}`" editable="true" desc="DC blocker coefficient"> 173 <Entry name="CODE 1" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_1" visible="true" /> 174 <Entry name="CODE 2" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_2" visible="true" /> 175 <Entry name="CODE 4" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_4" visible="true" /> 176 <Entry name="CODE 8" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_8" visible="true" /> 177 <Entry name="CODE 16" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_16" visible="true" /> 178 <Entry name="CODE 32" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_32" visible="true" /> 179 <Entry name="CODE 64" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_64" visible="true" /> 180 <Entry name="CODE 128" value="CY_PDM_PCM_CHAN_DCBLOCK_CODE_128" visible="true" /> 181 </ParamChoice> 182 183 <!-- PDM Config --> 184 <ParamRange id="clockDiv" name="Clock Divider" group="PDM Config" default="7" min="0" max="255" resolution="1" visible="true" editable="true" desc="Sets the input Clock Divider. The actual range is 1 to 256. The value that user assigns here will be incremented by 1 and assigned internally. For example value 0 is 'divide by 1'" /> 185 186 <ParamChoice id="clockSelect" name="Clock Select" group="PDM Config" default="CY_PDM_PCM_SEL_SRSS_CLOCK" visible="true" editable="true" desc="Set interface source clock: SRSS, DATA[0], DATA[1], OFF"> 187 <Entry name="SRSS CLOCK" value="CY_PDM_PCM_SEL_SRSS_CLOCK" visible="true" /> 188 <Entry name="PDM DATA0" value="CY_PDM_PCM_SEL_PDM_DATA0" visible="false" /> 189 <Entry name="PDM DATA1" value="CY_PDM_PCM_SEL_PDM_DATA1" visible="false" /> 190 <Entry name="SEL OFF" value="CY_PDM_PCM_SEL_OFF" visible="false" /> 191 </ParamChoice> 192 193 <ParamChoice id="halveRate" name="Halve Rate" group="PDM Config" default="CY_PDM_PCM_RATE_FULL" visible="true" editable="true" desc="Halve rate sampling."> 194 <Entry name="Channel Full" value="CY_PDM_PCM_RATE_FULL" visible="true" /> 195 <Entry name="Channel Halve" value="CY_PDM_PCM_RATE_HALVE" visible="true" /> 196 </ParamChoice> 197 198 <ParamChoice id="routeCtl" name="Route Control" group="PDM Config" default="0" visible="true" editable="true" desc="Specifies which PDM Data should route to specific PDM receiver."> 199 <Entry name="Two Mono Channels" value="0" visible="true" /> 200 <Entry name="Channel 1 Data routed to Channel 2 Receiver" value="1" visible="true" /> 201 <Entry name="Channel 2 Data routed to Channel 1 Receiver" value="2" visible="true" /> 202 <Entry name="Channel 1 Data to Channel 2 Receiver and Channel 2 Data to Channel 1 Receiver" value="3" visible="true" /> 203 </ParamChoice> 204 205 <ParamBool id="userConfigureFIR0" name="USER Configure FIR0" group="PDM Config" default="true" visible="true" editable="true" desc="Word extension type:" /> 206 207 <ParamBool id="userConfigureFIR1" name="USER Configure FIR1" group="PDM Config" default="true" visible="true" editable="true" desc="Word extension type:" /> 208 209 <ParamRange id="fir0Coeff0data0" name="FIR0 Coeff0 Data0" group="FIR0 Config" default="-3" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 210 211 <ParamRange id="fir0Coeff0data1" name="FIR0 Coeff0 Data1" group="FIR0 Config" default="-9" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 212 213 <ParamRange id="fir0Coeff1data0" name="FIR0 Coeff1 Data0" group="FIR0 Config" default="6" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 214 215 <ParamRange id="fir0Coeff1data1" name="FIR0 Coeff1 Data1" group="FIR0 Config" default="49" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 216 217 <ParamRange id="fir0Coeff2data0" name="FIR0 Coeff2 Data0" group="FIR0 Config" default="43" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 218 219 <ParamRange id="fir0Coeff2data1" name="FIR0 Coeff2 Data1" group="FIR0 Config" default="-105" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 220 221 <ParamRange id="fir0Coeff3data0" name="FIR0 Coeff3 Data0" group="FIR0 Config" default="-238" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 222 223 <ParamRange id="fir0Coeff3data1" name="FIR0 Coeff3 Data1" group="FIR0 Config" default="18" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 224 225 <ParamRange id="fir0Coeff4data0" name="FIR0 Coeff4 Data0" group="FIR0 Config" default="581" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 226 227 <ParamRange id="fir0Coeff4data1" name="FIR0 Coeff4 Data1" group="FIR0 Config" default="539" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 228 229 <ParamRange id="fir0Coeff5data0" name="FIR0 Coeff5 Data0" group="FIR0 Config" default="-719" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 230 231 <ParamRange id="fir0Coeff5data1" name="FIR0 Coeff5 Data1" group="FIR0 Config" default="-1878" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 232 233 <ParamRange id="fir0Coeff6data0" name="FIR0 Coeff6 Data0" group="FIR0 Config" default="-435" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 234 235 <ParamRange id="fir0Coeff6data1" name="FIR0 Coeff6 Data1" group="FIR0 Config" default="-719" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 236 237 <ParamRange id="fir0Coeff7data0" name="FIR0 Coeff7 Data0" group="FIR0 Config" default="539" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 238 239 <ParamRange id="fir0Coeff7data1" name="FIR0 Coeff7 Data1" group="FIR0 Config" default="581" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR0}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 240 241 242 <ParamRange id="fir1Coeff0data0" name="FIR1 Coeff0 Data0" group="FIR1 Config" default="-2" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 243 244 <ParamRange id="fir1Coeff0data1" name="FIR1 Coeff0 Data1" group="FIR1 Config" default="21" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 245 246 <ParamRange id="fir1Coeff1data0" name="FIR1 Coeff1 Data0" group="FIR1 Config" default="26" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 247 248 <ParamRange id="fir1Coeff1data1" name="FIR1 Coeff1 Data1" group="FIR1 Config" default="-17" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 249 250 <ParamRange id="fir1Coeff2data0" name="FIR1 Coeff2 Data0" group="FIR1 Config" default="-41" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 251 252 <ParamRange id="fir1Coeff2data1" name="FIR1 Coeff2 Data1" group="FIR1 Config" default="25" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 253 254 <ParamRange id="fir1Coeff3data0" name="FIR1 Coeff3 Data0" group="FIR1 Config" default="68" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 255 256 <ParamRange id="fir1Coeff3data1" name="FIR1 Coeff3 Data1" group="FIR1 Config" default="-33" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 257 258 <ParamRange id="fir1Coeff4data0" name="FIR1 Coeff4 Data0" group="FIR1 Config" default="-107" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 259 260 <ParamRange id="fir1Coeff4data1" name="FIR1 Coeff4 Data1" group="FIR1 Config" default="41" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 261 262 <ParamRange id="fir1Coeff5data0" name="FIR1 Coeff5 Data0" group="FIR1 Config" default="160" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 263 264 <ParamRange id="fir1Coeff5data1" name="FIR1 Coeff5 Data1" group="FIR1 Config" default="-48" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 265 266 <ParamRange id="fir1Coeff6data0" name="FIR1 Coeff6 Data0" group="FIR1 Config" default="-230" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 267 268 <ParamRange id="fir1Coeff6data1" name="FIR1 Coeff6 Data1" group="FIR1 Config" default="54" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 269 270 <ParamRange id="fir1Coeff7data0" name="FIR1 Coeff7 Data0" group="FIR1 Config" default="325" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 271 272 <ParamRange id="fir1Coeff7data1" name="FIR1 Coeff7 Data1" group="FIR1 Config" default="-56" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 273 274 <ParamRange id="fir1Coeff8data0" name="FIR1 Coeff8 Data0" group="FIR1 Config" default="-453" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 275 276 <ParamRange id="fir1Coeff8data1" name="FIR1 Coeff8 Data1" group="FIR1 Config" default="51" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 277 278 <ParamRange id="fir1Coeff9data0" name="FIR1 Coeff9 Data0" group="FIR1 Config" default="631" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 279 280 <ParamRange id="fir1Coeff9data1" name="FIR1 Coeff9 Data1" group="FIR1 Config" default="-31" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 281 282 <ParamRange id="fir1Coeff10data0" name="FIR1 Coeff10 Data0" group="FIR1 Config" default="-894" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 283 284 <ParamRange id="fir1Coeff10data1" name="FIR1 Coeff10 Data1" group="FIR1 Config" default="-21" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 285 286 <ParamRange id="fir1Coeff11data0" name="FIR1 Coeff11 Data0" group="FIR1 Config" default="1326" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 287 288 <ParamRange id="fir1Coeff11data1" name="FIR1 Coeff11 Data1" group="FIR1 Config" default="172" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 289 290 <ParamRange id="fir1Coeff12data0" name="FIR1 Coeff12 Data0" group="FIR1 Config" default="-2191" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 291 292 <ParamRange id="fir1Coeff12data1" name="FIR1 Coeff12 Data1" group="FIR1 Config" default="-770" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 293 294 <ParamRange id="fir1Coeff13data0" name="FIR1 Coeff13 Data0" group="FIR1 Config" default="4859" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 295 296 <ParamRange id="fir1Coeff13data1" name="FIR1 Coeff13 Data1" group="FIR1 Config" default="8191" min="-8192" max="8191" resolution="1" visible="`${userConfigureFIR1}`" editable="true" desc="The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients(in the range [-8192, 8191])." /> 297 298 <!-- Connections --> 299 <ParamSignal port="pdm_data[3]" name="PDM Data3" group="Inputs" visible="`${(((rxChannels >= 2) || (monoChannel == 1)) && (NR == 6 ))}`" desc="PDM Channel 1 input signal from PDM device for conversion. Can be connected to digital input pin." canBeEmpty="true" > 300 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 301 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 302 <Fixed value="CY_GPIO_DM_HIGHZ" /> 303 </Parameter> 304 </Constraint> 305 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 306 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 307 <Fixed value="CY_GPIO_DM_HIGHZ" /> 308 </Parameter> 309 </Constraint> 310 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 311 </ParamSignal> 312 <ParamSignal port="pdm_clk[3]" name="PDM Clock3" group="Outputs" visible="`${(((rxChannels >= 2) || (monoChannel == 1)) && (NR == 6 ))}`" desc="Channel 1 Clock output signal for PDM sampling. Can be connected to digital output pin." canBeEmpty="true" > 313 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 314 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 315 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 316 </Parameter> 317 </Constraint> 318 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 319 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 320 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 321 </Parameter> 322 </Constraint> 323 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 324 </ParamSignal> 325 <ParamSignal port="pdm_data[4]" name="PDM Data4" group="Inputs" visible="`${(((rxChannels >= 2) || (monoChannel == 2)) && (NR == 6 ))}`" desc="PDM Channel 1 input signal from PDM device for conversion. Can be connected to digital input pin." canBeEmpty="true" > 326 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 327 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 328 <Fixed value="CY_GPIO_DM_HIGHZ" /> 329 </Parameter> 330 </Constraint> 331 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 332 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 333 <Fixed value="CY_GPIO_DM_HIGHZ" /> 334 </Parameter> 335 </Constraint> 336 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 337 </ParamSignal> 338 <ParamSignal port="pdm_clk[4]" name="PDM Clock4" group="Outputs" visible="`${(((rxChannels >= 2) || (monoChannel == 2)) && (NR == 6 ))}`" desc="Channel 1 Clock output signal for PDM sampling. Can be connected to digital output pin." canBeEmpty="true" > 339 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 340 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 341 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 342 </Parameter> 343 </Constraint> 344 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 345 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 346 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 347 </Parameter> 348 </Constraint> 349 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 350 </ParamSignal> 351 <ParamSignal port="pdm_data[0]" name="PDM Data0" group="Inputs" visible="`${(((rxChannels >= 2) || (monoChannel == 1)) && (NR != 6 ))}`" desc="PDM Channel 1 input signal from PDM device for conversion. Can be connected to digital input pin." canBeEmpty="true" > 352 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 353 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 354 <Fixed value="CY_GPIO_DM_HIGHZ" /> 355 </Parameter> 356 </Constraint> 357 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 358 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 359 <Fixed value="CY_GPIO_DM_HIGHZ" /> 360 </Parameter> 361 </Constraint> 362 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 363 </ParamSignal> 364 <ParamSignal port="pdm_clk[0]" name="PDM Clock0" group="Outputs" visible="`${(((rxChannels >= 2) || (monoChannel == 1)) && (NR != 6 ))}`" desc="Channel 1 Clock output signal for PDM sampling. Can be connected to digital output pin." canBeEmpty="true" > 365 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 366 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 367 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 368 </Parameter> 369 </Constraint> 370 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 371 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 372 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 373 </Parameter> 374 </Constraint> 375 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 376 </ParamSignal> 377 <ParamSignal port="pdm_data[1]" name="PDM Data1" group="Inputs" visible="`${(((rxChannels >= 2) || (monoChannel == 2)) && (NR != 6 ))}`" desc="PDM Channel 2 input signal from PDM device for conversion. Can be connected to digital input pin." canBeEmpty="true" > 378 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 379 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 380 <Fixed value="CY_GPIO_DM_HIGHZ" /> 381 </Parameter> 382 </Constraint> 383 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 384 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 385 <Fixed value="CY_GPIO_DM_HIGHZ" /> 386 </Parameter> 387 </Constraint> 388 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 389 </ParamSignal> 390 <ParamSignal port="pdm_clk[1]" name="PDM Clock1" group="Outputs" visible="`${(((rxChannels >= 2) || (monoChannel == 2)) && (NR != 6 ))}`" desc="Channel 2 Clock output signal for PDM sampling. Can be connected to digital output pin." canBeEmpty="true" > 391 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 392 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 393 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 394 </Parameter> 395 </Constraint> 396 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 397 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 398 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 399 </Parameter> 400 </Constraint> 401 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 402 </ParamSignal> 403 <ParamSignal port="clk_if_srss[0]" name="Interface Clock" group="Inputs" visible="true" desc="Clock input signal for PDM interface." canBeEmpty="false" > 404 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 405 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 406 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 407 </Parameter> 408 </Constraint> 409 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 410 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 411 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 412 </Parameter> 413 </Constraint> 414 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 415 </ParamSignal> 416 <ParamBool id="rxDmaTrigger" name="DMA Trigger Enable" group="Outputs" default="false" visible="true" editable="true" desc="Enables DMA trigger" /> 417 <ParamSignal port="tr_rx_req[0]" name="DMA Channel0" group="Outputs" visible="`${((rxDmaTrigger) && (monoChannel == 1)) || ((rxDmaTrigger) && (rxChannels >= 2)) }`" desc="DMA transfer request signal for channel 1. Visible when the DMA Trigger Enable is selected." canBeEmpty="true" > 418 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 419 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 420 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 421 </Parameter> 422 </Constraint> 423 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 424 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 425 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 426 </Parameter> 427 </Constraint> 428 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 429 </ParamSignal> 430 <ParamSignal port="tr_rx_req[1]" name="DMA Channel1" group="Outputs" visible="`${((rxDmaTrigger) && (monoChannel == 2)) || ((rxDmaTrigger) && (rxChannels >= 2)) }`" desc="DMA transfer request signal for channel 2. Visible when the DMA Trigger Enable is selected." canBeEmpty="true" > 431 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 432 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 433 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 434 </Parameter> 435 </Constraint> 436 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 437 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 438 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 439 </Parameter> 440 </Constraint> 441 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 442 </ParamSignal> 443 444 <ParamBool id="inFlash" name="Store Config in Flash" group="Advanced" default="true" visible="true" editable="true" desc="Controls whether the configuration structure is stored in flash (const, true) or SRAM (not const, false)." /> 445 446 <ParamString id="sourceClock" name="sourceClock" group="Internal" default="`${getBlockFromSignal("clk_if_srss[0]")}`" visible="false" editable="false" desc="Source Clock Resource" /> 447 448 <!-- PDM instance number --> 449 <ParamString id="InstNumber" name="Instance Number" group="Internal" default="`${getInstNumber("pdm")}`" visible="false" editable="false" desc="PDM Instance number." /> 450 <ParamBool id="hasPDM0" name="hasPDM0" group="Internal" default="`${hasBlock("pdm[0]")}`" visible="false" editable="false" desc="Check whether device has more than one pdm" /> 451 452 <!-- Peripheral clock divider connection --> 453 <ParamBool id="pclkOk" name="PCLK Valid" group="Internal" default="`${hasConnection("clk_if_srss", 0) && isBlockUsed(sourceClock)}`" visible="false" editable="false" desc="Checks whether there is a PCLK connected and enabled." /> 454 <ParamBool id="blockUsesPeriClock" name="PERI clock used" group="Internal" default="`${!hasMatch(sourceClock, ".*hfclk.*")}`" visible="false" editable="false" desc="Checks whether block uses a PERI derived clock." /> 455 <ParamString id="pclkDst" name="PCLK Destination" group="Internal" default="PCLK_PDM`${InstNumber}`_CLK_IF_SRSS" visible="false" editable="false" desc="Generates PCLK connection define." /> 456 457 </Parameters> 458 459 <DRCs> 460 <!-- ACLK Divider --> 461 <DRC type="ERROR" text="To achieve 50 percent duty cycle a minimum of divide by 2 of assigned divider is required." condition="`${(blockUsesPeriClock) && getExposedMember(sourceClock, "divider") == 1}`" /> 462 463 </DRCs> 464 465 <ConfigFirmware> 466 <ConfigInclude value="cy_pdm_pcm_v2.h" include="true" /> 467 <ConfigInclude value="cy_sysclk.h" include="`${pclkOk}`" /> 468 <ConfigInclude value="cyhal.h" include="true" guard="defined (CY_USING_HAL)" /> 469 470 <ConfigDefine name="`${INST_NAME}`_HW" value="PDM`${hasPDM0 ? InstNumber : ""}`" public="true" include="true" /> 471 <ConfigDefine name="`${INST_NAME}`_CHANNEL_0_IRQ" value="pdm_`${hasPDM0 ? InstNumber . "_" : ""}`interrupts_0_IRQn" public="true" include="`${monoChannel == 1 && (NR != 6 )}`" /> 472 <ConfigDefine name="`${INST_NAME}`_CHANNEL_1_IRQ" value="pdm_`${hasPDM0 ? InstNumber . "_" : ""}`interrupts_1_IRQn" public="true" include="`${((rxChannels >= 2) || (monoChannel == 2)) && (NR != 6 )}`" /> 473 <ConfigDefine name="`${INST_NAME}`_CHANNEL_0_IRQ" value="pdm_`${hasPDM0 ? InstNumber . "_" : ""}`interrupts_3_IRQn" public="true" include="`${monoChannel == 1 && (NR == 6 )}`" /> 474 <ConfigDefine name="`${INST_NAME}`_CHANNEL_1_IRQ" value="pdm_`${hasPDM0 ? InstNumber . "_" : ""}`interrupts_4_IRQn" public="true" include="`${((rxChannels >= 2) || (monoChannel == 2)) && (NR == 6 )}`" /> 475 476 <ConfigStruct name="`${INST_NAME . "_config"}`" type="cy_stc_pdm_pcm_config_v2_t" const="`${inFlash}`" public="true" include="true" > 477 <Member name="clkDiv" value="`${clockDiv}`" /> 478 <Member name="clksel" value="`${clockSelect}`" /> 479 <Member name="halverate" value="`${halveRate}`" /> 480 <Member name="route" value="`${routeCtl}`" /> 481 <Member name="fir0_coeff_user_value" value="`${userConfigureFIR0}`" /> 482 <Member name="fir1_coeff_user_value" value="`${userConfigureFIR1}`" /> 483 <Member name="fir0_coeff" value="{{`${fir0Coeff0data0}`, `${fir0Coeff0data1}`}, {`${fir0Coeff1data0}`, `${fir0Coeff1data1}`}, {`${fir0Coeff2data0}`, `${fir0Coeff2data1}`}, {`${fir0Coeff3data0}`, `${fir0Coeff3data1}`}, {`${fir0Coeff4data0}`, `${fir0Coeff4data1}`}, {`${fir0Coeff5data0}`, `${fir0Coeff5data1}`}, {`${fir0Coeff6data0}`, `${fir0Coeff6data1}`}, {`${fir0Coeff7data0}`, `${fir0Coeff7data1}`} }" include="`${userConfigureFIR0}`" /> 484 <Member name="fir1_coeff" value="{{`${fir1Coeff0data0}`, `${fir1Coeff0data1}`}, {`${fir1Coeff1data0}`, `${fir1Coeff1data1}`}, {`${fir1Coeff2data0}`, `${fir1Coeff2data1}`}, {`${fir1Coeff3data0}`, `${fir1Coeff3data1}`}, {`${fir1Coeff4data0}`, `${fir1Coeff4data1}`}, {`${fir1Coeff5data0}`, `${fir1Coeff5data1}`}, {`${fir1Coeff6data0}`, `${fir1Coeff6data1}`}, {`${fir1Coeff7data0}`, `${fir1Coeff7data1}`}, {`${fir1Coeff8data0}`, `${fir1Coeff8data1}`}, {`${fir1Coeff9data0}`, `${fir1Coeff9data1}`}, {`${fir1Coeff10data0}`, `${fir1Coeff10data1}`}, {`${fir1Coeff11data0}`, `${fir1Coeff11data1}`}, {`${fir1Coeff12data0}`, `${fir1Coeff12data1}`}, {`${fir1Coeff13data0}`, `${fir1Coeff13data1}`} }" include="`${userConfigureFIR1}`" /> 485 486 </ConfigStruct> 487 488 <ConfigStruct name="channel_0_config" type="cy_stc_pdm_pcm_channel_config_t" const="`${inFlash}`" public="true" include="`${monoChannel == 1}`" > 489 <Member name="sampledelay" value="`${sampleDelay}`" /> 490 <Member name="wordSize" value="`${wordSize}`" /> 491 <Member name="signExtension" value="`${signExtension}`" /> 492 <Member name="rxFifoTriggerLevel" value="`${rxFifoTriggerLevel}`" /> 493 <Member name="fir0_enable" value="`${fir0Enable}`" /> 494 <Member name="cic_decim_code" value="`${cicDecimCode}`" /> 495 <Member name="fir0_decim_code" value="`${fir0DecimCode}`" /> 496 <Member name="fir0_scale" value="`${fir0Scale}`" /> 497 <Member name="fir1_decim_code" value="`${fir1DecimCode}`" /> 498 <Member name="fir1_scale" value="`${fir1Scale}`" /> 499 <Member name="dc_block_disable" value="`${!dcBlockDisable}`" /> 500 <Member name="dc_block_code" value="`${dcBlockCode}`" /> 501 </ConfigStruct> 502 503 <ConfigStruct name="channel_1_config" type="cy_stc_pdm_pcm_channel_config_t" const="`${inFlash}`" public="true" include="`${(rxChannels >= 2) || (monoChannel == 2)}`" > 504 <Member name="sampledelay" value="`${sampleDelay2}`" /> 505 <Member name="wordSize" value="`${wordSize2}`" /> 506 <Member name="signExtension" value="`${signExtension2}`" /> 507 <Member name="rxFifoTriggerLevel" value="`${rxFifoTriggerLevel2}`" /> 508 <Member name="fir0_enable" value="`${fir0Enable2}`" /> 509 <Member name="cic_decim_code" value="`${cicDecimCode2}`" /> 510 <Member name="fir0_decim_code" value="`${fir0DecimCode2}`" /> 511 <Member name="fir0_scale" value="`${fir0Scale2}`" /> 512 <Member name="fir1_decim_code" value="`${fir1DecimCode2}`" /> 513 <Member name="fir1_scale" value="`${fir1Scale2}`" /> 514 <Member name="dc_block_disable" value="`${!dcBlockDisable2}`" /> 515 <Member name="dc_block_code" value="`${dcBlockCode2}`" /> 516 </ConfigStruct> 517 518 <ConfigStruct name="`${INST_NAME}`_channel_0_obj" type="cyhal_resource_inst_t" const="true" public="true" include="`${monoChannel == 1}`" guard="defined (CY_USING_HAL)"> 519 <Member name="type" value="CYHAL_RSC_PDM" /> 520 <Member name="block_num" value="0U" /> 521 <Member name="channel_num" value="0U" /> 522 </ConfigStruct> 523 524 <ConfigStruct name="`${INST_NAME}`_channel_1_obj" type="cyhal_resource_inst_t" const="true" public="true" include="`${(rxChannels >= 2) || (monoChannel == 2)}`" guard="defined (CY_USING_HAL)"> 525 <Member name="type" value="CYHAL_RSC_PDM" /> 526 <Member name="block_num" value="0U" /> 527 <Member name="channel_num" value="1U" /> 528 </ConfigStruct> 529 530 <ConfigStruct name="`${INST_NAME}`_clock" type="cyhal_clock_t" const="`${inFlash}`" public="true" include="true" guard="defined (CY_USING_HAL)"> 531 <Member name="block" value="`${getExposedMember(sourceClock, "hal_block")}`" /> 532 <Member name="channel" value="`${getExposedMember(sourceClock, "number")}`" /> 533 <Member name="reserved" value="false" /> 534 <Member name="funcs" value="NULL" /> 535 </ConfigStruct> 536 537 <ConfigStruct name="`${INST_NAME}`_channel_0_hal_config" type="cyhal_pdm_pcm_configurator_t" const="`${inFlash}`" public="true" include="`${monoChannel == 1}`" guard="defined (CY_USING_HAL)"> 538 <Member name="resource" value="&`${INST_NAME}`_channel_0_obj" /> 539 <Member name="config" value="&`${INST_NAME . "_config"}`" /> 540 <Member name="chan_config" value="&channel_0_config" /> 541 <Member name="clock" value="&`${INST_NAME}`_clock" /> 542 </ConfigStruct> 543 544 <ConfigStruct name="`${INST_NAME}`_channel_1_hal_config" type="cyhal_pdm_pcm_configurator_t" const="`${inFlash}`" public="true" include="`${(rxChannels >= 2) || (monoChannel == 2)}`" guard="defined (CY_USING_HAL)"> 545 <Member name="resource" value="&`${INST_NAME}`_channel_1_obj" /> 546 <Member name="config" value="&`${INST_NAME . "_config"}`" /> 547 <Member name="chan_config" value="&channel_1_config" /> 548 <Member name="clock" value="&`${INST_NAME}`_clock" /> 549 </ConfigStruct> 550 551 <ConfigInstruction value="Cy_SysClk_PeriGroupSlaveInit(CY_MMIO_PDM`${InstNumber}`_PERI_NR, CY_MMIO_PDM`${InstNumber}`_GROUP_NR, CY_MMIO_PDM`${InstNumber}`_SLAVE_NR, CY_MMIO_PDM`${InstNumber}`_CLK_HF_NR);" include="true" guard="defined (CY_DEVICE_CONFIGURATOR_IP_ENABLE_FEATURE)" /> 552 <ConfigInstruction value="Cy_SysClk_PeriPclkAssignDivider(`${pclkDst}`, `${getExposedMember(sourceClock, "clockSel")}`);" include="`${blockUsesPeriClock}`" /> 553 </ConfigFirmware> 554</Personality> 555
