1<?xml version="1.0" encoding="utf-8"?> 2 3 4<!--**************************************************************************** 5* \file sysclock.cypersonality 6* \version 3.0 7* 8* \brief 9* SysClocks personality description file. It supports CAT1A, CAT1B, CAT1C and 10* CAT1D devices. 11* 12******************************************************************************** 13* \copyright 14* Copyright (c) 2022, Cypress Semiconductor Corporation (an Infineon company) or 15* an affiliate of Cypress Semiconductor Corporation. 16* SPDX-License-Identifier: Apache-2.0 17* 18* Licensed under the Apache License, Version 2.0 (the "License"); 19* you may not use this file except in compliance with the License. 20* You may obtain a copy of the License at 21* 22* http://www.apache.org/licenses/LICENSE-2.0 23* 24* Unless required by applicable law or agreed to in writing, software 25* distributed under the License is distributed on an "AS IS" BASIS, 26* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 27* See the License for the specific language governing permissions and 28* limitations under the License. 29*****************************************************************************--> 30 31<Personality id="sysclocks" name="SysClocks" version="3.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v7"> 32 <Dependencies> 33 <IpBlock name="mxs40srss,mxs40ssrss,mxs40srss_ver3,mxs40srss_ver2,mxs22srss" /> 34 <Resource name="srss\.clock" /> 35 </Dependencies> 36 <ExposedMembers> 37 <ExposedMember key="frequency" paramId="frequency" /> 38 </ExposedMembers> 39 <Parameters> 40 <ParamString id="description" name="" group="About" default="This personality has no configuration options. It is used to generate an overall configuration function for setting all the system clock options. The code preview shows what will be generated based on the current configuration. The generated code will be located in GeneratedSource/cycfg_system.c" visible="true" editable="false" desc="" /> 41 <ParamString id="longIndent" name="Long Indent" group="Internal" default="			" visible="false" editable="false" desc="Long indent for structure generation." /> 42 <ParamBool 43 id="is40srssAvailable" name="is40srssAvailable" group="" 44 default="`${("mxs40srss" eq getIpBlockName())}`" visible="false" editable="false" desc="" /> 45 <ParamBool 46 id="is40ssrssPllAvailable" name="is40srssAvailable" group="" 47 default="`${("mxs40ssrss" eq getIpBlockName()) && NUM_TOTAL_PLL ne 0}`" 48 visible="false" editable="false" desc="" /> 49 <ParamBool 50 id="is40ssrssAvailable" name="is40ssrssAvailable" group="" 51 default="`${("mxs40ssrss" eq getIpBlockName())}`" visible="false" editable="false" desc="" /> 52 <ParamBool 53 id="is40srss_ver2or3Available" name="is40srss_ver2or3Available" group="" 54 default="`${(("mxs40srss_ver2" eq getIpBlockName()) || ("mxs40srss_ver3" eq getIpBlockName()))}`" 55 visible="false" editable="false" desc="" /> 56 <ParamBool 57 id="is40srss_ver2or3withCM4" name="is40srss_ver2or3withCM4" group="" 58 default="`${(is40srss_ver2or3Available) && 59 !hasBlock("srss[0].clock[0].memclk[0]") 60 }`" 61 visible="false" editable="false" desc="" /> 62 <ParamBool 63 id="is22srssAvailable" name="is22srssAvailable" group="" 64 default="`${("mxs22srss" eq getIpBlockName())}`" visible="false" editable="false" desc="" /> 65 <ParamBool 66 id="is22srssNotAvailable" name="is22srssNotAvailable" group="" 67 default="`${("mxs22srss" ne getIpBlockName())}`" 68 visible="false" editable="false" desc="" /> 69 <ParamBool 70 id="isLpecoAvailable" name="isLpecoAvailable" group="" 71 default="`${("mxs40srss_ver3" eq getIpBlockName()) && lookupExpression("S40E_LPECO_PRESENT", 0)}`" 72 visible="false" editable="false" desc="" /> 73 </Parameters> 74 <DRCs> 75 <DRC type="ERROR" text="CLK_HF0 is not enabled." condition="`${!isBlockUsed("srss[0].clock[0].hfclk[0]") && (is40ssrssAvailable || is40srss_ver2or3Available || is22srssAvailable)}`" > 76 <FixIt action="ENABLE_BLOCK" target="`${"srss[0].clock[0].hfclk[0]"}`" value="" valid="true" /> 77 </DRC> 78 </DRCs> 79 <ConfigFirmware> 80 <ConfigInclude value="cy_sysclk.h" include="true" /> 81 <ConfigInclude value="cy_pra.h" include="`${is40srssAvailable}`" /> 82 <ConfigInclude value="cy_pra_cfg.h" include="`${is40srssAvailable}`" /> 83 <ConfigInclude value="cy_wdt.h" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 84 <ConfigInclude value="cy_ble_clk.h" include="`${hasBlock("bless[0]")}`" /> 85 86 87 <ConfigDefine name="CY_CFG_SYSCLK_ECO_ERROR" value="1" public="false" include="true" /> 88 <ConfigDefine name="CY_CFG_SYSCLK_ALTHF_ERROR" value="2" public="false" include="true" /> 89 <ConfigDefine name="CY_CFG_SYSCLK_PLL_ERROR" value="3" public="false" include="`${is40srss_ver2or3Available || is40srssAvailable || is22srssAvailable || is40ssrssPllAvailable}`" /> 90 <ConfigDefine name="CY_CFG_SYSCLK_FLL_ERROR" value="4" public="false" include="`${is40srss_ver2or3Available || is40srssAvailable || is40ssrssAvailable}`" /> 91 <ConfigDefine name="CY_CFG_SYSCLK_WCO_ERROR" value="5" public="false" include="true" /> 92 <ConfigDefine name="CY_CFG_SYSCLK_LPECO_ERROR" value="6" public="false" include="`${isLpecoAvailable}`" /> 93 94 <ConfigStruct name="`${INST_NAME . "_secureConfig"}`" type="cy_stc_pra_system_config_t" const="false" public="false" include="`${is40srssAvailable}`" guard="defined (CY_DEVICE_SECURE)" > 95 </ConfigStruct> 96 97 <ConfigFunction signature="__WEAK void __NO_RETURN cycfg_ClockStartupError(uint32_t error)" body=" (void)error; /* Suppress the compiler warning */
 while(1);" public="false" include="`${is40srssAvailable}`" /> 98 <ConfigFunction signature="__WEAK void cycfg_ClockStartupError(uint32_t error)" body=" (void)error; /* Suppress the compiler warning */
 while(1);" public="false" include="`${is40srss_ver2or3Available || is40ssrssAvailable || is22srssAvailable}`" /> 99 100 <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_Ilo0DeInit()" body=" if(Cy_SysPm_IsBgRefCtrl())
 {
 Cy_SysPm_BgRefCtrl(false);
 Cy_WDT_Unlock();
 Cy_SysClk_IloSrcDisable(0);
 Cy_SysClk_IloSrcHibernateOn(0, false);
 Cy_WDT_Lock();
 Cy_SysPm_BgRefCtrl(true);
 }
 else
 {
 Cy_WDT_Unlock();
 Cy_SysClk_IloSrcDisable(0);
 Cy_SysClk_IloSrcHibernateOn(0, false);
 Cy_WDT_Lock();
 }" public="false" include="`${is40srss_ver2or3Available}`" guard="!defined (CY_CFG_SYSCLK_ILO0_ENABLED)"/> 101 <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_Ilo1DeInit()" body=" Cy_SysClk_IloSrcDisable(1);
 Cy_SysClk_IloSrcHibernateOn(1, false);" public="false" include="`${is40srss_ver2or3Available}`" guard="!defined (CY_CFG_SYSCLK_ILO1_ENABLED)"/> 102 103 <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_FllDeInit()" body=" Cy_SysClk_FllDisable();" public="false" include="`${is40srss_ver2or3Available}`" guard="((!defined(CY_DEVICE_SECURE)))"/> 104 <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_FllDeInit()" body=" Cy_SysClk_FllDisable();" public="false" include="`${is40srssAvailable || is40ssrssAvailable}`" guard="((!defined(CY_DEVICE_SECURE)) && (defined(CY_CFG_SYSCLK_FLL_ENABLED)))"/> 105 106 <ConfigFunction signature="void init_cycfg_secure_struct(cy_stc_pra_system_config_t * secure_config)" body=" 107 #ifdef CY_CFG_PWR_ENABLED
 108 secure_config->powerEnable = CY_CFG_PWR_ENABLED;
 109 #endif /* CY_CFG_PWR_ENABLED */
 110
 111 #ifdef CY_CFG_PWR_USING_LDO
 112 secure_config->ldoEnable = CY_CFG_PWR_USING_LDO;
 113 #endif /* CY_CFG_PWR_USING_LDO */
 114
 115 #ifdef CY_CFG_PWR_USING_PMIC
 116 secure_config->pmicEnable = CY_CFG_PWR_USING_PMIC;
 117 #endif /* CY_CFG_PWR_USING_PMIC */
 118
 119 #ifdef CY_CFG_PWR_VBACKUP_USING_VDDD
 120 secure_config->vBackupVDDDEnable = CY_CFG_PWR_VBACKUP_USING_VDDD;
 121 #endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */
 122
 123 #ifdef CY_CFG_PWR_USING_ULP
 124 secure_config->ulpEnable = CY_CFG_PWR_USING_ULP;
 125 #endif /* CY_CFG_PWR_USING_ULP */
 126
 127 #ifdef CY_CFG_SYSCLK_ECO_ENABLED
 128 secure_config->ecoEnable = CY_CFG_SYSCLK_ECO_ENABLED;
 129 #endif /* CY_CFG_SYSCLK_ECO_ENABLED */
 130
 131 #ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED
 132 secure_config->extClkEnable = CY_CFG_SYSCLK_EXTCLK_ENABLED;
 133 #endif /* CY_CFG_SYSCLK_EXTCLK_ENABLED */
 134
 135 #ifdef CY_CFG_SYSCLK_ILO_ENABLED
 136 secure_config->iloEnable = CY_CFG_SYSCLK_ILO_ENABLED;
 137 #endif /* CY_CFG_SYSCLK_ILO_ENABLED */
 138
 139 #ifdef CY_CFG_SYSCLK_WCO_ENABLED
 140 secure_config->wcoEnable = CY_CFG_SYSCLK_WCO_ENABLED;
 141 #endif /* CY_CFG_SYSCLK_WCO_ENABLED */
 142
 143 #ifdef CY_CFG_SYSCLK_FLL_ENABLED
 144 secure_config->fllEnable = CY_CFG_SYSCLK_FLL_ENABLED;
 145 #endif /* CY_CFG_SYSCLK_FLL_ENABLED */
 146
 147 #ifdef CY_CFG_SYSCLK_PLL0_ENABLED
 148 secure_config->pll0Enable = CY_CFG_SYSCLK_PLL0_ENABLED;
 149 #endif /* CY_CFG_SYSCLK_PLL0_ENABLED */
 150
 151 #ifdef CY_CFG_SYSCLK_PLL1_ENABLED
 152 secure_config->pll1Enable = CY_CFG_SYSCLK_PLL1_ENABLED;
 153 #endif /* CY_CFG_SYSCLK_PLL1_ENABLED */
 154
 155 #ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED
 156 secure_config->path0Enable = CY_CFG_SYSCLK_CLKPATH0_ENABLED;
 157 #endif /* CY_CFG_SYSCLK_CLKPATH0_ENABLED */
 158
 159 #ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED
 160 secure_config->path1Enable = CY_CFG_SYSCLK_CLKPATH1_ENABLED;
 161 #endif /* CY_CFG_SYSCLK_CLKPATH1_ENABLED */
 162
 163 #ifdef CY_CFG_SYSCLK_CLKPATH2_ENABLED
 164 secure_config->path2Enable = CY_CFG_SYSCLK_CLKPATH2_ENABLED;
 165 #endif /* CY_CFG_SYSCLK_CLKPATH2_ENABLED */
 166
 167 #ifdef CY_CFG_SYSCLK_CLKPATH3_ENABLED
 168 secure_config->path3Enable = CY_CFG_SYSCLK_CLKPATH3_ENABLED;
 169 #endif /* CY_CFG_SYSCLK_CLKPATH3_ENABLED */
 170
 171 #ifdef CY_CFG_SYSCLK_CLKPATH4_ENABLED
 172 secure_config->path4Enable = CY_CFG_SYSCLK_CLKPATH4_ENABLED;
 173 #endif /* CY_CFG_SYSCLK_CLKPATH4_ENABLED */
 174
 175 #ifdef CY_CFG_SYSCLK_CLKPATH5_ENABLED
 176 secure_config->path5Enable = CY_CFG_SYSCLK_CLKPATH5_ENABLED;
 177 #endif /* CY_CFG_SYSCLK_CLKPATH5_ENABLED */
 178
 179 #ifdef CY_CFG_SYSCLK_CLKFAST_ENABLED
 180 secure_config->clkFastEnable = CY_CFG_SYSCLK_CLKFAST_ENABLED;
 181 #endif /* CY_CFG_SYSCLK_CLKFAST_ENABLED */
 182
 183 #ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED
 184 secure_config->clkPeriEnable = CY_CFG_SYSCLK_CLKPERI_ENABLED;
 185 #endif /* CY_CFG_SYSCLK_CLKPERI_ENABLED */
 186
 187 #ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED
 188 secure_config->clkSlowEnable = CY_CFG_SYSCLK_CLKSLOW_ENABLED;
 189 #endif /* CY_CFG_SYSCLK_CLKSLOW_ENABLED */
 190
 191 #ifdef CY_CFG_SYSCLK_CLKHF0_ENABLED
 192 secure_config->clkHF0Enable = CY_CFG_SYSCLK_CLKHF0_ENABLED;
 193 #endif /* CY_CFG_SYSCLK_CLKHF0_ENABLED */
 194
 195 #ifdef CY_CFG_SYSCLK_CLKHF1_ENABLED
 196 secure_config->clkHF1Enable = CY_CFG_SYSCLK_CLKHF1_ENABLED;
 197 #endif /* CY_CFG_SYSCLK_CLKHF1_ENABLED */
 198
 199 #ifdef CY_CFG_SYSCLK_CLKHF2_ENABLED
 200 secure_config->clkHF2Enable = CY_CFG_SYSCLK_CLKHF2_ENABLED;
 201 #endif /* CY_CFG_SYSCLK_CLKHF2_ENABLED */
 202
 203 #ifdef CY_CFG_SYSCLK_CLKHF3_ENABLED
 204 secure_config->clkHF3Enable = CY_CFG_SYSCLK_CLKHF3_ENABLED;
 205 #endif /* CY_CFG_SYSCLK_CLKHF3_ENABLED */
 206
 207 #ifdef CY_CFG_SYSCLK_CLKHF4_ENABLED
 208 secure_config->clkHF4Enable = CY_CFG_SYSCLK_CLKHF4_ENABLED;
 209 #endif /* CY_CFG_SYSCLK_CLKHF4_ENABLED */
 210
 211 #ifdef CY_CFG_SYSCLK_CLKHF5_ENABLED
 212 secure_config->clkHF5Enable = CY_CFG_SYSCLK_CLKHF5_ENABLED;
 213 #endif /* CY_CFG_SYSCLK_CLKHF5_ENABLED */
 214
 215 #ifdef CY_CFG_SYSCLK_CLKPUMP_ENABLED
 216 secure_config->clkPumpEnable = CY_CFG_SYSCLK_CLKPUMP_ENABLED;
 217 #endif /* CY_CFG_SYSCLK_CLKPUMP_ENABLED */
 218
 219 #ifdef CY_CFG_SYSCLK_CLKLF_ENABLED
 220 secure_config->clkLFEnable = CY_CFG_SYSCLK_CLKLF_ENABLED;
 221 #endif /* CY_CFG_SYSCLK_CLKLF_ENABLED */
 222
 223 #ifdef CY_CFG_SYSCLK_CLKBAK_ENABLED
 224 secure_config->clkBakEnable = CY_CFG_SYSCLK_CLKBAK_ENABLED;
 225 #endif /* CY_CFG_SYSCLK_CLKBAK_ENABLED */
 226
 227 #ifdef CY_CFG_SYSCLK_CLKTIMER_ENABLED
 228 secure_config->clkTimerEnable = CY_CFG_SYSCLK_CLKTIMER_ENABLED;
 229 #endif /* CY_CFG_SYSCLK_CLKTIMER_ENABLED */
 230
 231 #ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED
 232 #error Configuration Error : ALT SYSTICK cannot be enabled for Secure devices. 
 233 #endif /* CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED */
 234
 235 #ifdef CY_CFG_SYSCLK_PILO_ENABLED
 236 secure_config->piloEnable = CY_CFG_SYSCLK_PILO_ENABLED;
 237 #endif /* CY_CFG_SYSCLK_PILO_ENABLED */
 238
 239 #ifdef CY_CFG_SYSCLK_ALTHF_ENABLED
 240 secure_config->clkAltHfEnable = CY_CFG_SYSCLK_ALTHF_ENABLED;
 241 #endif /* CY_CFG_SYSCLK_ALTHF_ENABLED */
 242
 243 #ifdef CY_CFG_PWR_LDO_VOLTAGE
 244 secure_config->ldoVoltage = CY_CFG_PWR_LDO_VOLTAGE;
 245 #endif /* CY_CFG_PWR_LDO_VOLTAGE */
 246
 247 #ifdef CY_CFG_PWR_REGULATOR_MODE_MIN
 248 secure_config->pwrCurrentModeMin = CY_CFG_PWR_REGULATOR_MODE_MIN;
 249 #endif /* CY_CFG_PWR_REGULATOR_MODE_MIN */
 250
 251 #ifdef CY_CFG_PWR_BUCK_VOLTAGE
 252 secure_config->buckVoltage = CY_CFG_PWR_BUCK_VOLTAGE;
 253 #endif /* CY_CFG_PWR_BUCK_VOLTAGE */
 254
 255 #ifdef CY_CFG_SYSCLK_ECO_FREQ
 256 secure_config->ecoFreqHz = CY_CFG_SYSCLK_ECO_FREQ;
 257 #endif /* CY_CFG_SYSCLK_ECO_FREQ */
 258
 259 #ifdef CY_CFG_SYSCLK_ECO_CLOAD
 260 secure_config->ecoLoad = CY_CFG_SYSCLK_ECO_CLOAD;
 261 #endif /* CY_CFG_SYSCLK_ECO_CLOAD */
 262
 263 #ifdef CY_CFG_SYSCLK_ECO_ESR
 264 secure_config->ecoEsr = CY_CFG_SYSCLK_ECO_ESR;
 265 #endif /* CY_CFG_SYSCLK_ECO_ESR */
 266
 267 #ifdef CY_CFG_SYSCLK_ECO_DRIVE_LEVEL
 268 secure_config->ecoDriveLevel = CY_CFG_SYSCLK_ECO_DRIVE_LEVEL;
 269 #endif /* CY_CFG_SYSCLK_ECO_DRIVE_LEVEL */
 270
 271 #ifdef CY_CFG_SYSCLK_ECO_GPIO_IN_PRT
 272 secure_config->ecoInPort = CY_CFG_SYSCLK_ECO_GPIO_IN_PRT;
 273 #endif /* CY_CFG_SYSCLK_ECO_GPIO_IN_PRT */
 274
 275 #ifdef CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT
 276 secure_config->ecoOutPort = CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT;
 277 #endif /* CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT */
 278
 279 #ifdef CY_CFG_SYSCLK_ECO_GPIO_IN_PIN
 280 secure_config->ecoInPinNum = CY_CFG_SYSCLK_ECO_GPIO_IN_PIN;
 281 #endif /* CY_CFG_SYSCLK_ECO_GPIO_IN_PIN */
 282
 283 #ifdef CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN
 284 secure_config->ecoOutPinNum = CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN;
 285 #endif /* CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN */
 286
 287 #ifdef CY_CFG_SYSCLK_EXTCLK_FREQ
 288 secure_config->extClkFreqHz = CY_CFG_SYSCLK_EXTCLK_FREQ;
 289 #endif /* CY_CFG_SYSCLK_EXTCLK_FREQ */
 290
 291 #ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_PRT
 292 secure_config->extClkPort = CY_CFG_SYSCLK_EXTCLK_GPIO_PRT;
 293 #endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_PRT */
 294
 295 #ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_PIN
 296 secure_config->extClkPinNum = CY_CFG_SYSCLK_EXTCLK_GPIO_PIN;
 297 #endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_PIN */
 298
 299 #ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM
 300 secure_config->extClkHsiom = CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM;
 301 #endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM */
 302
 303 #ifdef CY_CFG_SYSCLK_ILO_HIBERNATE
 304 secure_config->iloHibernateON = CY_CFG_SYSCLK_ILO_HIBERNATE;
 305 #endif /* CY_CFG_SYSCLK_ILO_HIBERNATE */
 306
 307 #ifdef CY_CFG_SYSCLK_WCO_BYPASS
 308 secure_config->bypassEnable = CY_CFG_SYSCLK_WCO_BYPASS;
 309 #endif /* CY_CFG_SYSCLK_WCO_BYPASS */
 310
 311 #ifdef CY_CFG_SYSCLK_WCO_IN_PRT
 312 secure_config->wcoInPort = CY_CFG_SYSCLK_WCO_IN_PRT;
 313 #endif /* CY_CFG_SYSCLK_WCO_IN_PRT */
 314
 315 #ifdef CY_CFG_SYSCLK_WCO_OUT_PRT
 316 secure_config->wcoOutPort = CY_CFG_SYSCLK_WCO_OUT_PRT;
 317 #endif /* CY_CFG_SYSCLK_WCO_OUT_PRT */
 318
 319 #ifdef CY_CFG_SYSCLK_WCO_IN_PIN
 320 secure_config->wcoInPinNum = CY_CFG_SYSCLK_WCO_IN_PIN;
 321 #endif /* CY_CFG_SYSCLK_WCO_IN_PIN */
 322
 323 #ifdef CY_CFG_SYSCLK_WCO_OUT_PIN
 324 secure_config->wcoOutPinNum = CY_CFG_SYSCLK_WCO_OUT_PIN;
 325 #endif /* CY_CFG_SYSCLK_WCO_OUT_PIN */
 326
 327 #ifdef CY_CFG_SYSCLK_FLL_OUT_FREQ
 328 secure_config->fllOutFreqHz = CY_CFG_SYSCLK_FLL_OUT_FREQ;
 329 #endif /* CY_CFG_SYSCLK_FLL_OUT_FREQ */
 330
 331 #ifdef CY_CFG_SYSCLK_FLL_MULT
 332 secure_config->fllMult = CY_CFG_SYSCLK_FLL_MULT;
 333 #endif /* CY_CFG_SYSCLK_FLL_MULT */
 334
 335 #ifdef CY_CFG_SYSCLK_FLL_REFDIV
 336 secure_config->fllRefDiv = CY_CFG_SYSCLK_FLL_REFDIV;
 337 #endif /* CY_CFG_SYSCLK_FLL_REFDIV */
 338
 339 #ifdef CY_CFG_SYSCLK_FLL_CCO_RANGE
 340 secure_config->fllCcoRange = CY_CFG_SYSCLK_FLL_CCO_RANGE;
 341 #endif /* CY_CFG_SYSCLK_FLL_CCO_RANGE */
 342
 343 #ifdef CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV
 344 secure_config->enableOutputDiv = CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV;
 345 #endif /* CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV */
 346
 347 #ifdef CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE
 348 secure_config->lockTolerance = CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE;
 349 #endif /* CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE */
 350
 351 #ifdef CY_CFG_SYSCLK_FLL_IGAIN
 352 secure_config->igain = CY_CFG_SYSCLK_FLL_IGAIN;
 353 #endif /* CY_CFG_SYSCLK_FLL_IGAIN */
 354
 355 #ifdef CY_CFG_SYSCLK_FLL_PGAIN
 356 secure_config->pgain = CY_CFG_SYSCLK_FLL_PGAIN;
 357 #endif /* CY_CFG_SYSCLK_FLL_PGAIN */
 358
 359 #ifdef CY_CFG_SYSCLK_FLL_SETTLING_COUNT
 360 secure_config->settlingCount = CY_CFG_SYSCLK_FLL_SETTLING_COUNT;
 361 #endif /* CY_CFG_SYSCLK_FLL_SETTLING_COUNT */
 362
 363 #ifdef CY_CFG_SYSCLK_FLL_OUTPUT_MODE
 364 secure_config->outputMode = CY_CFG_SYSCLK_FLL_OUTPUT_MODE;
 365 #endif /* CY_CFG_SYSCLK_FLL_OUTPUT_MODE */
 366
 367 #ifdef CY_CFG_SYSCLK_FLL_CCO_FREQ
 368 secure_config->ccoFreq = CY_CFG_SYSCLK_FLL_CCO_FREQ;
 369 #endif /* CY_CFG_SYSCLK_FLL_CCO_FREQ */
 370
 371 #ifdef CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV
 372 secure_config->pll0FeedbackDiv = CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV;
 373 #endif /* CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV */
 374
 375 #ifdef CY_CFG_SYSCLK_PLL0_REFERENCE_DIV
 376 secure_config->pll0ReferenceDiv = CY_CFG_SYSCLK_PLL0_REFERENCE_DIV;
 377 #endif /* CY_CFG_SYSCLK_PLL0_REFERENCE_DIV */
 378
 379 #ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_DIV
 380 secure_config->pll0OutputDiv = CY_CFG_SYSCLK_PLL0_OUTPUT_DIV;
 381 #endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_DIV */
 382
 383 #ifdef CY_CFG_SYSCLK_PLL0_LF_MODE
 384 secure_config->pll0LfMode = CY_CFG_SYSCLK_PLL0_LF_MODE;
 385 #endif /* CY_CFG_SYSCLK_PLL0_LF_MODE */
 386
 387 #ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_MODE
 388 secure_config->pll0OutputMode = CY_CFG_SYSCLK_PLL0_OUTPUT_MODE;
 389 #endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_MODE */
 390
 391 #ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ
 392 secure_config->pll0OutFreqHz = CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ;
 393 #endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ */
 394
 395 #ifdef CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV
 396 secure_config->pll1FeedbackDiv = CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV;
 397 #endif /* CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV */
 398
 399 #ifdef CY_CFG_SYSCLK_PLL1_REFERENCE_DIV
 400 secure_config->pll1ReferenceDiv = CY_CFG_SYSCLK_PLL1_REFERENCE_DIV;
 401 #endif /* CY_CFG_SYSCLK_PLL1_REFERENCE_DIV */
 402
 403 #ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_DIV
 404 secure_config->pll1OutputDiv = CY_CFG_SYSCLK_PLL1_OUTPUT_DIV;
 405 #endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_DIV */
 406
 407 #ifdef CY_CFG_SYSCLK_PLL1_LF_MODE
 408 secure_config->pll1LfMode = CY_CFG_SYSCLK_PLL1_LF_MODE;
 409 #endif /* CY_CFG_SYSCLK_PLL1_LF_MODE */
 410
 411 #ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_MODE
 412 secure_config->pll1OutputMode = CY_CFG_SYSCLK_PLL1_OUTPUT_MODE;
 413 #endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_MODE */
 414
 415 #ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ
 416 secure_config->pll1OutFreqHz = CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ;
 417 #endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ */
 418
 419 #ifdef CY_CFG_SYSCLK_CLKPATH0_SOURCE
 420 secure_config->path0Src = CY_CFG_SYSCLK_CLKPATH0_SOURCE;
 421 #endif /* CY_CFG_SYSCLK_CLKPATH0_SOURCE */
 422
 423 #ifdef CY_CFG_SYSCLK_CLKPATH1_SOURCE
 424 secure_config->path1Src = CY_CFG_SYSCLK_CLKPATH1_SOURCE;
 425 #endif /* CY_CFG_SYSCLK_CLKPATH1_SOURCE */
 426
 427 #ifdef CY_CFG_SYSCLK_CLKPATH2_SOURCE
 428 secure_config->path2Src = CY_CFG_SYSCLK_CLKPATH2_SOURCE;
 429 #endif /* CY_CFG_SYSCLK_CLKPATH2_SOURCE */
 430
 431 #ifdef CY_CFG_SYSCLK_CLKPATH3_SOURCE
 432 secure_config->path3Src = CY_CFG_SYSCLK_CLKPATH3_SOURCE;
 433 #endif /* CY_CFG_SYSCLK_CLKPATH3_SOURCE */
 434
 435 #ifdef CY_CFG_SYSCLK_CLKPATH4_SOURCE
 436 secure_config->path4Src = CY_CFG_SYSCLK_CLKPATH4_SOURCE;
 437 #endif /* CY_CFG_SYSCLK_CLKPATH4_SOURCE */
 438
 439 #ifdef CY_CFG_SYSCLK_CLKPATH5_SOURCE
 440 secure_config->path5Src = CY_CFG_SYSCLK_CLKPATH5_SOURCE;
 441 #endif /* CY_CFG_SYSCLK_CLKPATH5_SOURCE */
 442
 443 #ifdef CY_CFG_SYSCLK_CLKFAST_DIVIDER
 444 secure_config->clkFastDiv = CY_CFG_SYSCLK_CLKFAST_DIVIDER;
 445 #endif /* CY_CFG_SYSCLK_CLKFAST_DIVIDER */
 446
 447 #ifdef CY_CFG_SYSCLK_CLKPERI_DIVIDER
 448 secure_config->clkPeriDiv = CY_CFG_SYSCLK_CLKPERI_DIVIDER;
 449 #endif /* CY_CFG_SYSCLK_CLKPERI_DIVIDER */
 450
 451 #ifdef CY_CFG_SYSCLK_CLKSLOW_DIVIDER
 452 secure_config->clkSlowDiv = CY_CFG_SYSCLK_CLKSLOW_DIVIDER;
 453 #endif /* CY_CFG_SYSCLK_CLKSLOW_DIVIDER */
 454
 455 #ifdef CY_CFG_SYSCLK_CLKHF0_CLKPATH
 456 secure_config->hf0Source = CY_CFG_SYSCLK_CLKHF0_CLKPATH;
 457 #endif /* CY_CFG_SYSCLK_CLKHF0_CLKPATH */
 458
 459 #ifdef CY_CFG_SYSCLK_CLKHF0_DIVIDER
 460 secure_config->hf0Divider = CY_CFG_SYSCLK_CLKHF0_DIVIDER;
 461 #endif /* CY_CFG_SYSCLK_CLKHF0_DIVIDER */
 462
 463 #ifdef CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ
 464 secure_config->hf0OutFreqMHz = CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ;
 465 #endif /* CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ */
 466
 467 #ifdef CY_CFG_SYSCLK_CLKHF1_CLKPATH
 468 secure_config->hf1Source = CY_CFG_SYSCLK_CLKHF1_CLKPATH;
 469 #endif /* CY_CFG_SYSCLK_CLKHF1_CLKPATH */
 470
 471 #ifdef CY_CFG_SYSCLK_CLKHF1_DIVIDER
 472 secure_config->hf1Divider = CY_CFG_SYSCLK_CLKHF1_DIVIDER;
 473 #endif /* CY_CFG_SYSCLK_CLKHF1_DIVIDER */
 474
 475 #ifdef CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ
 476 secure_config->hf1OutFreqMHz = CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ;
 477 #endif /* CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ */
 478
 479 #ifdef CY_CFG_SYSCLK_CLKHF2_CLKPATH
 480 secure_config->hf2Source = CY_CFG_SYSCLK_CLKHF2_CLKPATH;
 481 #endif /* CY_CFG_SYSCLK_CLKHF2_CLKPATH */
 482
 483 #ifdef CY_CFG_SYSCLK_CLKHF2_DIVIDER
 484 secure_config->hf2Divider = CY_CFG_SYSCLK_CLKHF2_DIVIDER;
 485 #endif /* CY_CFG_SYSCLK_CLKHF2_DIVIDER */
 486
 487 #ifdef CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ
 488 secure_config->hf2OutFreqMHz = CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ;
 489 #endif /* CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ */
 490
 491 #ifdef CY_CFG_SYSCLK_CLKHF3_CLKPATH
 492 secure_config->hf3Source = CY_CFG_SYSCLK_CLKHF3_CLKPATH;
 493 #endif /* CY_CFG_SYSCLK_CLKHF3_CLKPATH */
 494
 495 #ifdef CY_CFG_SYSCLK_CLKHF3_DIVIDER
 496 secure_config->hf3Divider = CY_CFG_SYSCLK_CLKHF3_DIVIDER;
 497 #endif /* CY_CFG_SYSCLK_CLKHF3_DIVIDER */
 498
 499 #ifdef CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ
 500 secure_config->hf3OutFreqMHz = CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ;
 501 #endif /* CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ */
 502
 503 #ifdef CY_CFG_SYSCLK_CLKHF4_CLKPATH
 504 secure_config->hf4Source = CY_CFG_SYSCLK_CLKHF4_CLKPATH;
 505 #endif /* CY_CFG_SYSCLK_CLKHF4_CLKPATH */
 506
 507 #ifdef CY_CFG_SYSCLK_CLKHF4_DIVIDER
 508 secure_config->hf4Divider = CY_CFG_SYSCLK_CLKHF4_DIVIDER;
 509 #endif /* CY_CFG_SYSCLK_CLKHF4_DIVIDER */
 510
 511 #ifdef CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ
 512 secure_config->hf4OutFreqMHz = CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ;
 513 #endif /* CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ */
 514
 515 #ifdef CY_CFG_SYSCLK_CLKHF5_CLKPATH
 516 secure_config->hf5Source = CY_CFG_SYSCLK_CLKHF5_CLKPATH;
 517 #endif /* CY_CFG_SYSCLK_CLKHF5_CLKPATH */
 518
 519 #ifdef CY_CFG_SYSCLK_CLKHF5_DIVIDER
 520 secure_config->hf5Divider = CY_CFG_SYSCLK_CLKHF5_DIVIDER;
 521 #endif /* CY_CFG_SYSCLK_CLKHF5_DIVIDER */
 522
 523 #ifdef CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ
 524 secure_config->hf5OutFreqMHz = CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ;
 525 #endif /* CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ */
 526
 527 #ifdef CY_CFG_SYSCLK_CLKPUMP_SOURCE
 528 secure_config->pumpSource = CY_CFG_SYSCLK_CLKPUMP_SOURCE;
 529 #endif /* CY_CFG_SYSCLK_CLKPUMP_SOURCE */
 530
 531 #ifdef CY_CFG_SYSCLK_CLKPUMP_DIVIDER
 532 secure_config->pumpDivider = CY_CFG_SYSCLK_CLKPUMP_DIVIDER;
 533 #endif /* CY_CFG_SYSCLK_CLKPUMP_DIVIDER */
 534
 535 #ifdef CY_CFG_SYSCLK_CLKLF_SOURCE
 536 secure_config->clkLfSource = CY_CFG_SYSCLK_CLKLF_SOURCE;
 537 #endif /* CY_CFG_SYSCLK_CLKLF_SOURCE */
 538
 539 #ifdef CY_CFG_SYSCLK_CLKBAK_SOURCE
 540 secure_config->clkBakSource = CY_CFG_SYSCLK_CLKBAK_SOURCE;
 541 #endif /* CY_CFG_SYSCLK_CLKBAK_SOURCE */
 542
 543 #ifdef CY_CFG_SYSCLK_CLKTIMER_SOURCE
 544 secure_config->clkTimerSource = CY_CFG_SYSCLK_CLKTIMER_SOURCE;
 545 #endif /* CY_CFG_SYSCLK_CLKTIMER_SOURCE */
 546
 547 #ifdef CY_CFG_SYSCLK_CLKTIMER_DIVIDER
 548 secure_config->clkTimerDivider = CY_CFG_SYSCLK_CLKTIMER_DIVIDER;
 549 #endif /* CY_CFG_SYSCLK_CLKTIMER_DIVIDER */
 550
 551 #ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE
 552 secure_config->clkSrcAltSysTick = CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE;
 553 #endif /* CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE */
 554
 555 #ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD
 556 secure_config->altHFcLoad = CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD;
 557 #endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD */
 558
 559 #ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME
 560 secure_config->altHFxtalStartUpTime = CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME;
 561 #endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME */
 562
 563 #ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ
 564 secure_config->altHFclkFreq = CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ;
 565 #endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ */
 566
 567 #ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV
 568 secure_config->altHFsysClkDiv = CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV;
 569 #endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV */
 570
 571 #ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR
 572 secure_config->altHFvoltageReg = CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR;
 573 #endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR */
" 574 public="false" include="`${is40srssAvailable}`" guard="defined (CY_DEVICE_SECURE)"/> 575 576 577 <!-- Configure Secure options --> 578 <ConfigInstruction value="#if defined(CY_DEVICE_SECURE)" include="`${is40srssAvailable}`" /> 579 <ConfigInstruction value=" cy_en_pra_status_t configStatus;" include="`${is40srssAvailable}`" /> 580 <ConfigInstruction value=" init_cycfg_secure_struct(&`${INST_NAME . "_secureConfig"}`);" include="`${is40srssAvailable}`" /> 581 <ConfigInstruction value=" #if (((CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM <= 5UL)) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 0UL))" include="`${is40srssAvailable}`" /> 582 <ConfigInstruction value=" #error Configuration Error : ALTHF, ILO, PILO cannot drive HF0." include="`${is40srssAvailable}`" /> 583 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 584 <ConfigInstruction value=" #if (((CY_CFG_SYSCLK_CLKPATH1_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH1_SOURCE_NUM <= 5UL)) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 1UL))" include="`${is40srssAvailable}`" /> 585 <ConfigInstruction value=" #error Configuration Error : ALTHF, ILO, PILO cannot drive HF0." include="`${is40srssAvailable}`" /> 586 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 587 <ConfigInstruction value=" #if (((CY_CFG_SYSCLK_CLKPATH2_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH2_SOURCE_NUM <= 5UL)) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 2UL))" include="`${is40srssAvailable}`" /> 588 <ConfigInstruction value=" #error Configuration Error : ALTHF, ILO, PILO cannot drive HF0." include="`${is40srssAvailable}`" /> 589 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 590 <ConfigInstruction value=" #if (((CY_CFG_SYSCLK_CLKPATH3_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH3_SOURCE_NUM <= 5UL)) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 3UL))" include="`${is40srssAvailable}`" /> 591 <ConfigInstruction value=" #error Configuration Error : ALTHF, ILO, PILO cannot drive HF0." include="`${is40srssAvailable}`" /> 592 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 593 <ConfigInstruction value=" #if (((CY_CFG_SYSCLK_CLKPATH4_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH4_SOURCE_NUM <= 5UL)) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 4UL))" include="`${is40srssAvailable}`" /> 594 <ConfigInstruction value=" #error Configuration Error : ALTHF, ILO, PILO cannot drive HF0." include="`${is40srssAvailable}`" /> 595 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 596 <ConfigInstruction value=" #if (((CY_CFG_SYSCLK_CLKPATH5_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH5_SOURCE_NUM <= 5UL)) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 5UL))" include="`${is40srssAvailable}`" /> 597 <ConfigInstruction value=" #error Configuration Error : ALTHF, ILO, PILO cannot drive HF0." include="`${is40srssAvailable}`" /> 598 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 599 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 600 <ConfigInstruction value=" configStatus = CY_PRA_FUNCTION_CALL_RETURN_PARAM(CY_PRA_MSG_TYPE_SYS_CFG_FUNC," include="`${is40srssAvailable}`" /> 601 <ConfigInstruction value=" CY_PRA_FUNC_INIT_CYCFG_DEVICE," include="`${is40srssAvailable}`" /> 602 <ConfigInstruction value=" &`${INST_NAME . "_secureConfig"}`);" include="`${is40srssAvailable}`" /> 603 <ConfigInstruction value=" if ( configStatus != CY_PRA_STATUS_SUCCESS )
 {
 cycfg_ClockStartupError(configStatus);
 }
" include="`${is40srssAvailable}`" /> 604 <ConfigInstruction value=" #ifdef CY_CFG_SYSCLK_EXTCLK_FREQ" include="`${is40srssAvailable}`" /> 605 <ConfigInstruction value=" Cy_SysClk_ExtClkSetFrequency(CY_CFG_SYSCLK_EXTCLK_FREQ);" include="`${is40srssAvailable}`" /> 606 <ConfigInstruction value=" #endif /* CY_CFG_SYSCLK_EXTCLK_FREQ */" include="`${is40srssAvailable}`" /> 607 <ConfigInstruction value="#else /* defined(CY_DEVICE_SECURE) */" include="`${is40srssAvailable}`" /> 608 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 609 610 <!-- Configure flash wait states --> 611 <ConfigInstruction value=" /* Set worst case memory wait states (! ultra low power, 150 MHz), will update at the end */" include="`${is40srssAvailable || is40srss_ver2or3Available}`" /> 612 <ConfigInstruction value=" Cy_SysLib_SetWaitStates(false, 150UL);" include="`${is40srssAvailable || is40srss_ver2or3Available}`" /> 613 614 <!-- Configure power options --> 615 <ConfigInstruction value="#ifdef CY_CFG_PWR_ENABLED" include="`${is22srssNotAvailable}`" /> 616 <ConfigInstruction value=" #ifdef CY_CFG_PWR_INIT" include="`${is22srssNotAvailable}`" /> 617 <ConfigInstruction value=" init_cycfg_power();" include="`${is22srssNotAvailable}`" /> 618 <ConfigInstruction value=" #else" include="`${is22srssNotAvailable}`" /> 619 <ConfigInstruction value=" #warning Power system will not be configured. Update power personality to v1.20 or later." include="`${is22srssNotAvailable}`" /> 620 <ConfigInstruction value=" #endif /* CY_CFG_PWR_INIT */" include="`${is22srssNotAvailable}`" /> 621 <ConfigInstruction value="#endif /* CY_CFG_PWR_ENABLED */" include="`${is22srssNotAvailable}`" /> 622 <ConfigInstruction value="" include="`${is22srssNotAvailable}`" /> 623 624 <ConfigInstruction value="#if defined(CORE_NAME_CM33_0)" include="`${is22srssAvailable}`" /> 625 626 <!-- Reset and configure platform clocks --> 627 <ConfigInstruction value="/* Disable FLL */" include="`${is40srss_ver2or3Available || is40srssAvailable || is40ssrssAvailable}`" /> 628 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_FLL_ENABLED" include="`${is40srssAvailable || is40ssrssAvailable}`" /> 629 <ConfigInstruction value=" Cy_SysClk_FllDeInit();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40ssrssAvailable}`" /> 630 <ConfigInstruction value="#endif" include="`${is40srssAvailable || is40ssrssAvailable}`" /> 631 <ConfigInstruction value="" include="`${is40srss_ver2or3Available || is40srssAvailable || is40ssrssAvailable}`" /> 632 633 <ConfigInstruction value=" /* Reset the core clock path to default and disable all the FLLs/PLLs */" include="`${is40srssAvailable}`" /> 634 <ConfigInstruction value=" Cy_SysClk_ClkHfSetDivider(0U, CY_SYSCLK_CLKHF_NO_DIVIDE);" include="`${is40srssAvailable}`" /> 635 <ConfigInstruction value=" Cy_SysClk_ClkFastSetDivider(0U);" include="`${is40srssAvailable||is40srss_ver2or3withCM4}`" /> 636 <ConfigInstruction value=" Cy_SysClk_ClkPeriSetDivider(1U);" include="`${is40srssAvailable}`" /> 637 <ConfigInstruction value=" Cy_SysClk_ClkSlowSetDivider(0U);" include="`${is40srssAvailable}`" /> 638 <ConfigInstruction value=" for (uint32_t pll = CY_SRSS_NUM_PLL; pll > 0UL; --pll) /* PLL 1 is the first PLL. 0 is invalid. */" include="`${is40srssAvailable}`" /> 639 <ConfigInstruction value=" {" include="`${is40srssAvailable}`" /> 640 <ConfigInstruction value=" (void)Cy_SysClk_PllDisable(pll);" include="`${is40srssAvailable}`" /> 641 <ConfigInstruction value=" }" include="`${is40srssAvailable}`" /> 642 <ConfigInstruction value=" Cy_SysClk_ClkPathSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH1, CY_SYSCLK_CLKPATH_IN_IMO);" include="`${is40srssAvailable}`" /> 643 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 644 <ConfigInstruction value=" if ((CY_SYSCLK_CLKHF_IN_CLKPATH0 == Cy_SysClk_ClkHfGetSource(0UL)) &&" include="`${is40srssAvailable}`" /> 645 <ConfigInstruction value=" (CY_SYSCLK_CLKPATH_IN_WCO == Cy_SysClk_ClkPathGetSource(CY_SYSCLK_CLKHF_IN_CLKPATH0)))" include="`${is40srssAvailable}`" /> 646 <ConfigInstruction value=" {" include="`${is40srssAvailable}`" /> 647 <ConfigInstruction value=" Cy_SysClk_ClkHfSetSource(0U, CY_SYSCLK_CLKHF_IN_CLKPATH1);" include="`${is40srssAvailable}`" /> 648 <ConfigInstruction value=" }" include="`${is40srssAvailable}`" /> 649 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 650 <ConfigInstruction value=" Cy_SysClk_ClkPathSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH0, CY_SYSCLK_CLKPATH_IN_IMO);" include="`${is40srssAvailable}`" /> 651 <ConfigInstruction value=" Cy_SysClk_ClkHfSetSource(0UL, CY_SYSCLK_CLKHF_IN_CLKPATH0);" include="`${is40srssAvailable}`" /> 652 <ConfigInstruction value=" #ifdef CY_IP_MXBLESS" include="`${is40srssAvailable}`" /> 653 <ConfigInstruction value=" (void)Cy_BLE_EcoReset();" include="`${is40srssAvailable}`" /> 654 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 655 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 656 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 657 658 659 <!-- Enable all source clocks --> 660 <ConfigInstruction value="/* Enable all source clocks */" include="true" /> 661 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_ILO0_ENABLED" include="`${is40srss_ver2or3Available}`" /> 662 <ConfigInstruction value=" Cy_SysClk_Ilo0Init();" include="`${is40srss_ver2or3Available}`" /> 663 <ConfigInstruction value="#else" include="`${is40srss_ver2or3Available}`" /> 664 <ConfigInstruction value=" Cy_SysClk_Ilo0DeInit();" include="`${is40srss_ver2or3Available}`" /> 665 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available}`" /> 666 <ConfigInstruction value="" include="`${is40srss_ver2or3Available}`" /> 667 668 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_ILO1_ENABLED" include="`${is40srss_ver2or3Available}`" /> 669 <ConfigInstruction value=" Cy_SysClk_Ilo1Init();" include="`${is40srss_ver2or3Available}`" /> 670 <ConfigInstruction value="#else" include="`${is40srss_ver2or3Available}`" /> 671 <ConfigInstruction value=" Cy_SysClk_Ilo1DeInit();" include="`${is40srss_ver2or3Available}`" /> 672 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available}`" /> 673 <ConfigInstruction value="" include="`${is40srss_ver2or3Available}`" /> 674 675 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_IHO_ENABLED" include="`${is22srssAvailable}`" /> 676 <ConfigInstruction value=" Cy_SysClk_IhoInit();" include="`${is22srssAvailable}`" /> 677 <ConfigInstruction value="#endif" include="`${is22srssAvailable}`" /> 678 <ConfigInstruction value="" include="`${is22srssAvailable}`" /> 679 680 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PILO_ENABLED" include="true" /> 681 <ConfigInstruction value=" Cy_SysClk_PiloInit();" include="true" /> 682 <ConfigInstruction value="#endif" include="true" /> 683 <ConfigInstruction value="" include="true" /> 684 685 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_WCO_ENABLED" include="true" /> 686 <ConfigInstruction value=" Cy_SysClk_WcoInit();" include="true" /> 687 <ConfigInstruction value="#endif" include="true" /> 688 <ConfigInstruction value="" include="true" /> 689 690 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_ECO_ENABLED" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 691 <ConfigInstruction value=" Cy_SysClk_EcoInit();" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 692 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 693 <ConfigInstruction value="" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 694 695 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_LPECO_ENABLED" include="`${isLpecoAvailable}`" /> 696 <ConfigInstruction value=" Cy_SysClk_LpecoInit();" include="`${isLpecoAvailable}`" /> 697 <ConfigInstruction value="#endif" include="`${isLpecoAvailable}`" /> 698 <ConfigInstruction value="" include="`${isLpecoAvailable}`" /> 699 700 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKLF_ENABLED" include="true" /> <!--CDT 264793--> 701 <ConfigInstruction value=" Cy_SysClk_ClkLfInit();" include="true" /> 702 <ConfigInstruction value="#endif" include="true" /> 703 <ConfigInstruction value="" include="true" /> 704 705 <ConfigInstruction value=" #if (defined(CY_IP_M4CPUSS) && CY_CFG_SYSCLK_ALTHF_ENABLED)
" include="`${is40srssAvailable}`" /> 706 <ConfigInstruction value=" Cy_SysClk_AltHfInit();" include="`${is40srssAvailable}`" /> 707 <ConfigInstruction value=" #endif /* (defined(CY_IP_M4CPUSS) && CY_CFG_SYSCLK_ALTHF_ENABLED */
" include="`${is40srssAvailable}`" /> 708 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 709 710 <ConfigInstruction value=" #ifdef CY_CFG_SYSCLK_ECO_ENABLED" include="`${is40srssAvailable}`" /> 711 <ConfigInstruction value=" Cy_SysClk_EcoInit();" include="`${is40srssAvailable}`" /> 712 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 713 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 714 715 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED" include="`${is22srssNotAvailable}`" /> 716 <ConfigInstruction value=" Cy_SysClk_ExtClkInit();" include="`${is22srssNotAvailable}`" /> 717 <ConfigInstruction value="#endif" include="`${is22srssNotAvailable}`" /> 718 <ConfigInstruction value="" include="`${is22srssNotAvailable}`" /> 719 720 <ConfigInstruction value="#ifdef CY_PDL_TZ_ENABLED" include="`${is22srssAvailable}`" /> 721 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED" include="`${is22srssAvailable}`" /> 722 <ConfigInstruction value=" Cy_SysClk_ExtClkInit();" include="`${is22srssAvailable}`" /> 723 <ConfigInstruction value="#endif" include="`${is22srssAvailable}`" /> 724 <ConfigInstruction value="#endif" include="`${is22srssAvailable}`" /> 725 <ConfigInstruction value="" include="`${is22srssAvailable}`" /> 726 727 <!-- Configure CPU clock dividers --> 728 <ConfigInstruction value=" /* Configure CPU clock dividers */" include="`${is40srssAvailable||is40srss_ver2or3withCM4}`" /> 729 <ConfigInstruction value=" #ifdef CY_CFG_SYSCLK_CLKFAST_ENABLED" include="`${is40srssAvailable||is40srss_ver2or3withCM4}`" /> 730 <ConfigInstruction value=" Cy_SysClk_ClkFastInit();" include="`${is40srssAvailable||is40srss_ver2or3withCM4}`" /> 731 <ConfigInstruction value=" #endif" include="`${is40srssAvailable||is40srss_ver2or3withCM4}`" /> 732 <ConfigInstruction value="" include="`${is40srssAvailable||is40srss_ver2or3withCM4}`" /> 733 734 <ConfigInstruction value=" #ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED" include="`${is40srssAvailable}`" /> 735 <ConfigInstruction value=" Cy_SysClk_ClkPeriInit();" include="`${is40srssAvailable}`" /> 736 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 737 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 738 739 <ConfigInstruction value=" #ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED" include="`${is40srssAvailable}`" /> 740 <ConfigInstruction value=" Cy_SysClk_ClkSlowInit();" include="`${is40srssAvailable}`" /> 741 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 742 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 743 744 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_IHO_ENABLED" include="`${is40ssrssAvailable}`" /> 745 <ConfigInstruction value=" Cy_SysClk_IhoInit();" include="`${is40ssrssAvailable}`" /> 746 <ConfigInstruction value="#endif" include="`${is40ssrssAvailable}`" /> 747 <ConfigInstruction value="" include="`${is40ssrssAvailable}`" /> 748 749 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_ALTHF_ENABLED" include="`${is40ssrssAvailable || is22srssAvailable}`" /> 750 <ConfigInstruction value=" Cy_SysClk_AltHfInit();" include="`${is40ssrssAvailable || is22srssAvailable}`" /> 751 <ConfigInstruction value="#endif" include="`${is40ssrssAvailable}`" /> 752 <ConfigInstruction value="" include="`${is40ssrssAvailable}`" /> 753 754 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_ALTHF_ENABLED" include="`${is40srss_ver2or3Available}`" /> 755 <ConfigInstruction value=" Cy_SysClk_AltHfInit();" include="`${is40srss_ver2or3Available}`" /> 756 <ConfigInstruction value="#endif" include="`${is22srssAvailable || is40srss_ver2or3Available}`" /> 757 <ConfigInstruction value="" include="`${is22srssAvailable || is40srss_ver2or3Available}`" /> 758 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 759 <ConfigInstruction value=" Cy_SysClk_ClkPeriInit();" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 760 <ConfigInstruction value="#endif" include="`${is22srssAvailable || is40srss_ver2or3Available}`" /> 761 <ConfigInstruction value="" include="`${is22srssAvailable || is40srss_ver2or3Available}`" /> 762 763 <!-- Disable All PLL's --> 764 <ConfigInstruction value="#ifdef CY_PDL_TZ_ENABLED" include="`${is22srssAvailable}`" /> 765 <ConfigInstruction value=" Cy_SysClk_PllDisable(SRSS_DPLL_HP_0_PATH_NUM);" include="`${is22srssAvailable}`" /> 766 <ConfigInstruction value=" Cy_SysClk_PllDisable(SRSS_DPLL_LP_0_PATH_NUM);" include="`${is22srssAvailable}`" /> 767 <ConfigInstruction value=" Cy_SysClk_PllDisable(SRSS_DPLL_LP_1_PATH_NUM);" include="`${is22srssAvailable}`" /> 768 <ConfigInstruction value="#endif" include="`${is22srssAvailable}`" /> 769 770 <!-- If CLKHF0 clocked from WCO --> 771 <ConfigInstruction value=" #if ((CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM == 0x6UL) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 0U))" include="`${is40srssAvailable}`" /> 772 <ConfigInstruction value=" /* Configure HFCLK0 to temporarily run from IMO to initialize other clocks */" include="`${is40srssAvailable}`" /> 773 <ConfigInstruction value=" Cy_SysClk_ClkPathSetSource(1UL, CY_SYSCLK_CLKPATH_IN_IMO);" include="`${is40srssAvailable}`" /> 774 <ConfigInstruction value=" Cy_SysClk_ClkHfSetSource(0UL, CY_SYSCLK_CLKHF_IN_CLKPATH1);" include="`${is40srssAvailable}`" /> 775 <ConfigInstruction value=" #else" include="`${is40srssAvailable}`" /> 776 <ConfigInstruction value="/* Configure Path Clocks */" include="`${is40srss_ver2or3Available || is40ssrssAvailable || is22srssAvailable}`" /> 777 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED" include="true" /> 778 <ConfigInstruction value=" Cy_SysClk_ClkPath1Init();" include="true" /> 779 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 780 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 781 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 782 783 <!-- Configure Path Clocks --> 784 <ConfigInstruction value=" /* Configure Path Clocks */" include="`${is40srssAvailable}`" /> 785 <ConfigInstruction value=" #ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED" include="`${is40srssAvailable}`" /> 786 <ConfigInstruction value=" Cy_SysClk_ClkPath0Init();" include="`${is40srssAvailable}`" /> 787 <ConfigInstruction value="#endif" include="true" /> 788 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH2_ENABLED" include="true" /> 789 <ConfigInstruction value=" Cy_SysClk_ClkPath2Init();" include="true" /> 790 <ConfigInstruction value="#endif" include="true" /> 791 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH3_ENABLED" include="true" /> 792 <ConfigInstruction value=" Cy_SysClk_ClkPath3Init();" include="true" /> 793 <ConfigInstruction value="#endif" include="true" /> 794 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH4_ENABLED" include="true" /> 795 <ConfigInstruction value=" Cy_SysClk_ClkPath4Init();" include="true" /> 796 <ConfigInstruction value="#endif" include="true" /> 797 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH5_ENABLED" include="true" /> 798 <ConfigInstruction value=" Cy_SysClk_ClkPath5Init();" include="true" /> 799 <ConfigInstruction value="#endif" include="true" /> 800 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH6_ENABLED" include="true" /> 801 <ConfigInstruction value=" Cy_SysClk_ClkPath6Init();" include="true" /> 802 <ConfigInstruction value="#endif" include="true" /> 803 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH7_ENABLED" include="true" /> 804 <ConfigInstruction value=" Cy_SysClk_ClkPath7Init();" include="true" /> 805 <ConfigInstruction value="#endif" include="true" /> 806 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH8_ENABLED" include="true" /> 807 <ConfigInstruction value=" Cy_SysClk_ClkPath8Init();" include="true" /> 808 <ConfigInstruction value="#endif" include="true" /> 809 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH9_ENABLED" include="true" /> 810 <ConfigInstruction value=" Cy_SysClk_ClkPath9Init();" include="true" /> 811 <ConfigInstruction value="#endif" include="true" /> 812 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH10_ENABLED" include="true" /> 813 <ConfigInstruction value=" Cy_SysClk_ClkPath10Init();" include="true" /> 814 <ConfigInstruction value="#endif" include="true" /> 815 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH11_ENABLED" include="true" /> 816 <ConfigInstruction value=" Cy_SysClk_ClkPath11Init();" include="true" /> 817 <ConfigInstruction value="#endif" include="true" /> 818 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH12_ENABLED" include="true" /> 819 <ConfigInstruction value=" Cy_SysClk_ClkPath12Init();" include="true" /> 820 <ConfigInstruction value="#endif" include="true" /> 821 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH13_ENABLED" include="true" /> 822 <ConfigInstruction value=" Cy_SysClk_ClkPath13Init();" include="true" /> 823 <ConfigInstruction value="#endif" include="true" /> 824 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH14_ENABLED" include="true" /> 825 <ConfigInstruction value=" Cy_SysClk_ClkPath14Init();" include="true" /> 826 <ConfigInstruction value="#endif" include="true" /> 827 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH15_ENABLED" include="true" /> 828 <ConfigInstruction value=" Cy_SysClk_ClkPath15Init();" include="true" /> 829 <ConfigInstruction value="#endif" include="true" /> 830 <ConfigInstruction value="" include="true" /> 831 832 <ConfigInstruction value="/* Configure and enable FLL */" include="`${is40srssAvailable}`" /> 833 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_FLL_ENABLED" include="`${is40srssAvailable}`" /> 834 <ConfigInstruction value=" Cy_SysClk_FllInit();" include="`${is40srssAvailable}`" /> 835 <ConfigInstruction value="#endif" include="`${is40srssAvailable}`" /> 836 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 837 838 <ConfigInstruction value="Cy_SysClk_ClkHf0Init();" include="`${is40srssAvailable}`" /> 839 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 840 841 <!-- If CLKHF0 clocked from WCO --> 842 <ConfigInstruction value="#if ((CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM == 0x6UL) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 0U))" include="`${is40srssAvailable}`" /> 843 <ConfigInstruction value=" #ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED" include="`${is40srssAvailable}`" /> 844 <ConfigInstruction value=" /* Apply the ClkPath1 user setting */" include="`${is40srssAvailable}`" /> 845 <ConfigInstruction value=" Cy_SysClk_ClkPath1Init();" include="`${is40srssAvailable}`" /> 846 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 847 <ConfigInstruction value="#endif" include="`${is40srssAvailable}`" /> 848 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 849 850 <ConfigInstruction value="/* Configure and enable PLLs */" include="`${is40srssAvailable}`" /> 851 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL0_ENABLED" include="`${is40srssAvailable}`" /> 852 <ConfigInstruction value=" Cy_SysClk_Pll0Init();" include="`${is40srssAvailable}`" /> 853 <ConfigInstruction value="#endif" include="`${is40srssAvailable}`" /> 854 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL1_ENABLED" include="`${is40srssAvailable}`" /> 855 <ConfigInstruction value=" Cy_SysClk_Pll1Init();" include="`${is40srssAvailable}`" /> 856 <ConfigInstruction value="#endif" include="`${is40srssAvailable}`" /> 857 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL2_ENABLED" include="`${is40srssAvailable}`" /> 858 <ConfigInstruction value=" Cy_SysClk_Pll2Init();" include="`${is40srssAvailable}`" /> 859 <ConfigInstruction value="#endif" include="`${is40srssAvailable}`" /> 860 861 <ConfigInstruction value="/* Configure and enable PLLs */" include="`${is22srssAvailable}`" /> 862 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_DPLL_HP0_ENABLED" include="`${is22srssAvailable}`" /> 863 <ConfigInstruction value=" Cy_SysClk_Dpll_Hp0_Init();" include="`${is22srssAvailable}`" /> 864 <ConfigInstruction value="#endif" include="`${is22srssAvailable}`" /> 865 866 <ConfigInstruction value="/* Configure and enable PLLs */" include="`${is40srss_ver2or3Available || is40ssrssPllAvailable}`" /> 867 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL0_ENABLED" include="`${is40srss_ver2or3Available || is40ssrssPllAvailable}`" /> 868 <ConfigInstruction value=" Cy_SysClk_Pll0Init();" include="`${is40srss_ver2or3Available || is40ssrssPllAvailable}`" /> 869 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40ssrssPllAvailable}`" /> 870 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL1_ENABLED" include="`${is40srss_ver2or3Available || is40ssrssPllAvailable}`" /> 871 <ConfigInstruction value=" Cy_SysClk_Pll1Init();" include="`${is40srss_ver2or3Available || is40ssrssPllAvailable}`" /> 872 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40ssrssPllAvailable}`" /> 873 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL2_ENABLED" include="`${is40srss_ver2or3Available}`" /> 874 <ConfigInstruction value=" Cy_SysClk_Pll2Init();" include="`${is40srss_ver2or3Available}`" /> 875 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available}`" /> 876 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL3_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable}`" /> 877 <ConfigInstruction value=" Cy_SysClk_Pll3Init();" include="`${is40srss_ver2or3Available || is40srssAvailable}`" /> 878 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable}`" /> 879 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL4_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable}`" /> 880 <ConfigInstruction value=" Cy_SysClk_Pll4Init();" include="`${is40srss_ver2or3Available || is40srssAvailable}`" /> 881 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable}`" /> 882 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL5_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 883 <ConfigInstruction value=" Cy_SysClk_Pll5Init();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 884 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 885 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL6_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 886 <ConfigInstruction value=" Cy_SysClk_Pll6Init();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 887 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 888 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL7_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 889 <ConfigInstruction value=" Cy_SysClk_Pll7Init();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 890 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 891 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL8_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 892 <ConfigInstruction value=" Cy_SysClk_Pll8Init();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 893 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 894 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL9_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 895 <ConfigInstruction value=" Cy_SysClk_Pll9Init();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 896 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 897 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL10_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 898 <ConfigInstruction value=" Cy_SysClk_Pll10Init();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 899 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 900 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL11_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 901 <ConfigInstruction value=" Cy_SysClk_Pll11Init();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 902 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 903 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL12_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 904 <ConfigInstruction value=" Cy_SysClk_Pll12Init();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 905 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 906 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL13_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 907 <ConfigInstruction value=" Cy_SysClk_Pll13Init();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 908 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 909 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_PLL14_ENABLED" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 910 <ConfigInstruction value=" Cy_SysClk_Pll14Init();" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 911 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 912 <ConfigInstruction value="" include="`${is40srss_ver2or3Available || is40srssAvailable || is40srssAvailable}`" /> 913 914 <!-- Configure HF clocks --> 915 <ConfigInstruction value="/* Configure HF clocks */" include="true" /> 916 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF1_ENABLED" include="true" /> 917 <ConfigInstruction value=" Cy_SysClk_ClkHf1Init();" include="true" /> 918 <ConfigInstruction value="#endif" include="true" /> 919 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF2_ENABLED" include="true" /> 920 <ConfigInstruction value=" Cy_SysClk_ClkHf2Init();" include="true" /> 921 <ConfigInstruction value="#endif" include="true" /> 922 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF3_ENABLED" include="true" /> 923 <ConfigInstruction value=" Cy_SysClk_ClkHf3Init();" include="true" /> 924 <ConfigInstruction value="#endif" include="true" /> 925 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF4_ENABLED" include="true" /> 926 <ConfigInstruction value=" Cy_SysClk_ClkHf4Init();" include="true" /> 927 <ConfigInstruction value="#endif" include="true" /> 928 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF5_ENABLED" include="true" /> 929 <ConfigInstruction value=" Cy_SysClk_ClkHf5Init();" include="true" /> 930 <ConfigInstruction value="#endif" include="true" /> 931 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF6_ENABLED" include="true" /> 932 <ConfigInstruction value=" Cy_SysClk_ClkHf6Init();" include="true" /> 933 <ConfigInstruction value="#endif" include="true" /> 934 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF7_ENABLED" include="true" /> 935 <ConfigInstruction value=" Cy_SysClk_ClkHf7Init();" include="true" /> 936 <ConfigInstruction value="#endif" include="true" /> 937 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF8_ENABLED" include="true" /> 938 <ConfigInstruction value=" Cy_SysClk_ClkHf8Init();" include="true" /> 939 <ConfigInstruction value="#endif" include="true" /> 940 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF9_ENABLED" include="true" /> 941 <ConfigInstruction value=" Cy_SysClk_ClkHf9Init();" include="true" /> 942 <ConfigInstruction value="#endif" include="true" /> 943 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF10_ENABLED" include="true" /> 944 <ConfigInstruction value=" Cy_SysClk_ClkHf10Init();" include="true" /> 945 <ConfigInstruction value="#endif" include="true" /> 946 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF11_ENABLED" include="true" /> 947 <ConfigInstruction value=" Cy_SysClk_ClkHf11Init();" include="true" /> 948 <ConfigInstruction value="#endif" include="true" /> 949 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF12_ENABLED" include="true" /> 950 <ConfigInstruction value=" Cy_SysClk_ClkHf12Init();" include="true" /> 951 <ConfigInstruction value="#endif" include="true" /> 952 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF13_ENABLED" include="true" /> 953 <ConfigInstruction value=" Cy_SysClk_ClkHf13Init();" include="true" /> 954 <ConfigInstruction value="#endif" include="true" /> 955 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF14_ENABLED" include="true" /> 956 <ConfigInstruction value=" Cy_SysClk_ClkHf14Init();" include="true" /> 957 <ConfigInstruction value="#endif" include="true" /> 958 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKHF15_ENABLED" include="true" /> 959 <ConfigInstruction value=" Cy_SysClk_ClkHf15Init();" include="true" /> 960 <ConfigInstruction value="#endif" include="true" /> 961 <ConfigInstruction value="" include="true" /> 962 963 <!-- Configure miscellaneous clocks --> 964 <ConfigInstruction value="/* Configure miscellaneous clocks */" include="`${is40ssrssAvailable || is40srssAvailable}`" /> 965 <ConfigInstruction value=" #ifdef CY_CFG_SYSCLK_CLKTIMER_ENABLED" include="`${is40srssAvailable}`" /> 966 <ConfigInstruction value=" Cy_SysClk_ClkTimerInit();" include="`${is40srssAvailable}`" /> 967 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 968 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 969 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED" include="true" /> 970 <ConfigInstruction value=" Cy_SysClk_ClkAltSysTickInit();" include="true" /> 971 <ConfigInstruction value="#endif" include="true" /> 972 <ConfigInstruction value="" include="true" /> 973 974 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPUMP_ENABLED" include="true" /> 975 <ConfigInstruction value=" Cy_SysClk_ClkPumpInit();" include="true" /> 976 <ConfigInstruction value="#endif" include="true" /> 977 <ConfigInstruction value="" include="true" /> 978 979 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKBAK_ENABLED" include="true" /> 980 <ConfigInstruction value=" Cy_SysClk_ClkBakInit();" include="true" /> 981 <ConfigInstruction value="#endif" include="true" /> 982 <ConfigInstruction value="" include="true" /> 983 984 <!-- Configure default enabled clocks --> 985 <ConfigInstruction value="/* Configure default enabled clocks */" include="`${is40ssrssAvailable || is40srss_ver2or3Available || is40srssAvailable}`" /> 986 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_ILO_ENABLED" include="`${is40ssrssAvailable || is40srss_ver2or3Available || is40srssAvailable}`" /> 987 <ConfigInstruction value=" Cy_SysClk_IloInit();" include="`${is40ssrssAvailable || is40srss_ver2or3Available || is40srssAvailable}`" /> 988 <ConfigInstruction value="#endif" include="`${is40ssrssAvailable || is40srss_ver2or3Available || is40srssAvailable}`" /> 989 <ConfigInstruction value="" include="`${is40ssrssAvailable || is40srss_ver2or3Available || is40srssAvailable}`" /> 990 991 <ConfigInstruction value="#ifndef CY_CFG_SYSCLK_IMO_ENABLED" include="`${is40ssrssAvailable || is40srss_ver2or3Available || is40srssAvailable}`" /> 992 <ConfigInstruction value=" #error the IMO must be enabled for proper chip operation" include="`${is40ssrssAvailable || is40srss_ver2or3Available || is40srssAvailable}`" /> 993 <ConfigInstruction value="#endif" include="`${is40ssrssAvailable || is40srss_ver2or3Available}`" /> 994 <ConfigInstruction value="" include="`${is40ssrssAvailable || is40srss_ver2or3Available}`" /> 995 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 996 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 997 998 <ConfigInstruction value=" #ifndef CY_CFG_SYSCLK_CLKHF0_ENABLED" include="`${is40srssAvailable}`" /> 999 <ConfigInstruction value=" #error the CLKHF0 must be enabled for proper chip operation" include="`${is40srssAvailable}`" /> 1000 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 1001 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 1002 1003 <ConfigInstruction value="#endif /* defined(CY_DEVICE_SECURE) */" include="`${is40srssAvailable}`" /> 1004 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 1005 1006 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_MFO_ENABLED" include="true" /> 1007 <ConfigInstruction value=" Cy_SysClk_MfoInit();" include="true" /> 1008 <ConfigInstruction value="#endif" include="true" /> 1009 <ConfigInstruction value="" include="true" /> 1010 1011 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKMF_ENABLED" include="true" /> 1012 <ConfigInstruction value=" Cy_SysClk_ClkMfInit();" include="true" /> 1013 <ConfigInstruction value="#endif" include="true" /> 1014 <ConfigInstruction value="" include="true" /> 1015 1016 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPWR_ENABLED" include="true" /> 1017 <ConfigInstruction value=" Cy_SysClk_ClkPwrInit();" include="true" /> 1018 <ConfigInstruction value="#endif" include="true" /> 1019 <ConfigInstruction value="" include="true" /> 1020 1021 <ConfigInstruction value="#if (!defined(CY_DEVICE_SECURE))" include="`${is40srssAvailable}`" /> 1022 <!-- Configure final flash wait states --> 1023 <ConfigInstruction value=" /* Set accurate flash wait states */" include="`${is40srssAvailable}`" /> 1024 <ConfigInstruction value=" #if (defined (CY_CFG_PWR_ENABLED) && defined (CY_CFG_SYSCLK_CLKHF0_ENABLED))" include="`${is40srssAvailable}`" /> 1025 <ConfigInstruction value=" Cy_SysLib_SetWaitStates(CY_CFG_PWR_USING_ULP != 0, CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ);" include="`${is40srssAvailable}`" /> 1026 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 1027 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 1028 1029 <ConfigInstruction value=" /* Set accurate flash wait states */" include="`${is40srss_ver2or3Available}`" /> 1030 <ConfigInstruction value=" #if (defined (CY_CFG_PWR_ENABLED) && defined (CY_CFG_SYSCLK_CLKHF1_ENABLED))" include="`${is40srss_ver2or3Available}`" /> 1031 <ConfigInstruction value=" Cy_SysLib_SetWaitStates(false, CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ);" include="`${is40srss_ver2or3Available}`" /> 1032 <ConfigInstruction value=" #endif" include="`${is40srss_ver2or3Available}`" /> 1033 <ConfigInstruction value="" include="`${is40srss_ver2or3Available}`" /> 1034 1035 <!-- Update System Core Clock values --> 1036 <ConfigInstruction value=" /* Update System Core Clock values for correct Cy_SysLib_Delay functioning */" include="`${is40srssAvailable}`" /> 1037 <ConfigInstruction value=" SystemCoreClockUpdate();" include="`${is40srssAvailable}`" /> 1038 1039 <!-- Finish to configure the ILO --> 1040 <ConfigInstruction value=" #ifndef CY_CFG_SYSCLK_ILO_ENABLED" include="`${is40srssAvailable}`" /> 1041 <ConfigInstruction value=" #ifdef CY_CFG_SYSCLK_CLKLF_ENABLED" include="`${is40srssAvailable}`" /> 1042 <ConfigInstruction value=" /* Wait 4 ILO cycles in case of unfinished CLKLF clock source transition */" include="`${is40srssAvailable}`" /> 1043 <ConfigInstruction value=" Cy_SysLib_DelayUs(200U);" include="`${is40srssAvailable}`" /> <!--DRIVERS 3401--> 1044 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 1045 <ConfigInstruction value=" Cy_SysClk_IloDisable();" include="`${is40srssAvailable}`" /> 1046 <ConfigInstruction value=" Cy_SysClk_IloHibernateOn(false);" include="`${is40srssAvailable}`" /> 1047 <ConfigInstruction value=" #endif" include="`${is40srssAvailable}`" /> 1048 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 1049 1050 <ConfigInstruction value="#endif /* (!defined(CY_DEVICE_SECURE)) */" include="`${is40srssAvailable}`" /> 1051 <ConfigInstruction value="" include="`${is40srssAvailable}`" /> 1052 1053 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED" include="`${is40srss_ver2or3Available || is40ssrssAvailable || is22srssAvailable}`" /> 1054 <ConfigInstruction value=" Cy_SysClk_ClkPath0Init();" include="`${is40srss_ver2or3Available || is40ssrssAvailable || is22srssAvailable}`" /> 1055 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40ssrssAvailable || is22srssAvailable}`" /> 1056 1057 <ConfigInstruction value="/* Configure and enable DPLLs */" include="`${is22srssAvailable}`" /> 1058 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_DPLL_LP0_ENABLED" include="`${is22srssAvailable}`" /> 1059 <ConfigInstruction value=" Cy_SysClk_Dpll_Lp0_Init();" include="`${is22srssAvailable}`" /> 1060 <ConfigInstruction value="#endif" include="`${is22srssAvailable}`" /> 1061 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_DPLL_LP1_ENABLED" include="`${is22srssAvailable}`" /> 1062 <ConfigInstruction value=" Cy_SysClk_Dpll_Lp1_Init();" include="`${is22srssAvailable}`" /> 1063 <ConfigInstruction value="#endif" include="`${is22srssAvailable}`" /> 1064 <ConfigInstruction value="" include="`${is22srssAvailable}`" /> 1065 1066 <!-- Reset and configure platform clocks --> 1067 <ConfigInstruction value="/* Configure and enable FLL */" include="`${is40srss_ver2or3Available || is40ssrssAvailable}`" /> 1068 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_FLL_ENABLED" include="`${is40srss_ver2or3Available || is40ssrssAvailable}`" /> 1069 <ConfigInstruction value=" Cy_SysClk_FllInit();" include="`${is40srss_ver2or3Available || is40ssrssAvailable}`" /> 1070 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is40ssrssAvailable}`" /> 1071 <ConfigInstruction value="" include="`${is40srss_ver2or3Available || is40ssrssAvailable}`" /> 1072 1073 <ConfigInstruction value="Cy_SysClk_ClkHf0Init();" include="`${is40srss_ver2or3Available || is40ssrssAvailable || is22srssAvailable}`" /> 1074 <ConfigInstruction value="" include="`${is40srss_ver2or3Available || is40ssrssAvailable || is22srssAvailable}`" /> 1075 1076 <ConfigInstruction value="/* Disable Unused Clock Sources */" include="`${is40ssrssAvailable}`" /> 1077 <ConfigInstruction value="#ifndef CY_CFG_SYSCLK_IHO_ENABLED" include="`${is40ssrssAvailable}`" /> 1078 <ConfigInstruction value=" Cy_SysClk_IhoDisable();" include="`${is40ssrssAvailable}`" /> 1079 <ConfigInstruction value="#endif" include="`${is40ssrssAvailable}`" /> 1080 1081 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKFAST_0_ENABLED" include="`${(is40srss_ver2or3Available || is22srssAvailable) && !is40srss_ver2or3withCM4}`" /> 1082 <ConfigInstruction value=" Cy_SysClk_ClkFast_0_Init();" include="`${(is40srss_ver2or3Available || is22srssAvailable) && !is40srss_ver2or3withCM4}`" /> 1083 <ConfigInstruction value="#endif" include="`${(is40srss_ver2or3Available || is22srssAvailable) && !is40srss_ver2or3withCM4}`" /> 1084 <ConfigInstruction value="" include="`${(is40srss_ver2or3Available || is22srssAvailable) && !is40srss_ver2or3withCM4}`" /> 1085 1086 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKFAST_1_ENABLED" include="`${(is40srss_ver2or3Available || is22srssAvailable) && !is40srss_ver2or3withCM4}`" /> 1087 <ConfigInstruction value=" Cy_SysClk_ClkFast_1_Init();" include="`${(is40srss_ver2or3Available || is22srssAvailable) && !is40srss_ver2or3withCM4}`" /> 1088 <ConfigInstruction value="#endif" include="`${(is40srss_ver2or3Available || is22srssAvailable) && !is40srss_ver2or3withCM4}`" /> 1089 <ConfigInstruction value="" include="`${(is40srss_ver2or3Available || is22srssAvailable) && !is40srss_ver2or3withCM4}`" /> 1090 1091 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 1092 <ConfigInstruction value=" Cy_SysClk_ClkSlowInit();" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 1093 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 1094 <ConfigInstruction value="" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 1095 1096 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKMEM_ENABLED" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 1097 <ConfigInstruction value=" Cy_SysClk_ClkMemInit();" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 1098 <ConfigInstruction value="#endif" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 1099 <ConfigInstruction value="" include="`${is40srss_ver2or3Available || is22srssAvailable}`" /> 1100 1101 <ConfigInstruction value=" Cy_SysClk_EcoPrescalerInit();" include="true" guard="defined(CY_CFG_SYSCLK_ECO_PRESCALER_ENABLED)" /> 1102 <ConfigInstruction value=" Cy_SysClk_LpecoPrescalerInit();" include="`${isLpecoAvailable}`" guard="defined(CY_CFG_SYSCLK_LPECO_PRESCALER_ENABLED)" /> 1103 <ConfigInstruction value="#endif /* defined(CORE_NAME_CM33_0) */" include="`${is22srssAvailable}`" /> 1104 1105 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED" include="true" /> 1106 <ConfigInstruction value=" Cy_SysClk_ClkAltSysTickInit();" include="true" /> 1107 <ConfigInstruction value="#endif" include="true" /> 1108 <ConfigInstruction value="" include="true" /> 1109 1110 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_ECO_ENABLED" include="`${is22srssAvailable}`" /> 1111 <ConfigInstruction value=" Cy_SysClk_EcoSetFrequency(CY_CFG_SYSCLK_ECO_FREQ);" include="`${is22srssAvailable}`" /> 1112 <ConfigInstruction value="#endif" include="`${is22srssAvailable}`" /> 1113 <ConfigInstruction value="" include="`${is22srssAvailable}`" /> 1114 1115 <ConfigInstruction value="#ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED" include="`${is22srssAvailable}`" /> 1116 <ConfigInstruction value=" Cy_SysClk_ExtClkSetFrequency(CY_CFG_SYSCLK_EXTCLK_FREQ);" include="`${is22srssAvailable}`" /> 1117 <ConfigInstruction value="#endif" include="`${is22srssAvailable}`" /> 1118 <ConfigInstruction value="" include="`${is22srssAvailable}`" /> 1119 1120 <!-- Update System Core Clock values --> 1121 <ConfigInstruction value="/* Update System Core Clock values for correct Cy_SysLib_Delay functioning */" include="`${is40srss_ver2or3Available || is40ssrssAvailable || is22srssAvailable}`" /> 1122 <ConfigInstruction value="SystemCoreClockUpdate();" include="`${is40srss_ver2or3Available || is40ssrssAvailable || is22srssAvailable}`" /> 1123 1124 <!-- Configure power options --> 1125 <ConfigInstruction value="#ifdef CY_CFG_PWR_ENABLED" include="`${is22srssAvailable}`" /> 1126 <ConfigInstruction value=" #ifdef CY_CFG_PWR_INIT" include="`${is22srssAvailable}`" /> 1127 <ConfigInstruction value=" init_cycfg_power();" include="`${is22srssAvailable}`" /> 1128 <ConfigInstruction value=" #else" include="`${is22srssAvailable}`" /> 1129 <ConfigInstruction value=" #warning Power system will not be configured. Update power personality to v1.20 or later." include="`${is22srssAvailable}`" /> 1130 <ConfigInstruction value=" #endif /* CY_CFG_PWR_INIT */" include="`${is22srssAvailable}`" /> 1131 <ConfigInstruction value="#endif /* CY_CFG_PWR_ENABLED */" include="`${is22srssAvailable}`" /> 1132 <ConfigInstruction value="" include="`${is22srssAvailable}`" /> 1133 </ConfigFirmware> 1134</Personality> 1135