1<?xml version="1.0" encoding="utf-8"?> 2 3 4<!--**************************************************************************** 5* \file lfclk.cypersonality 6* \version 3.0 7* 8* \brief 9* CLK_LF personality description file. It supports CAT1A, CAT1B and 10* CAT1D devices. 11* 12******************************************************************************** 13* \copyright 14* Copyright (c) 2022, Cypress Semiconductor Corporation (an Infineon company) or 15* an affiliate of Cypress Semiconductor Corporation. 16* SPDX-License-Identifier: Apache-2.0 17* 18* Licensed under the Apache License, Version 2.0 (the "License"); 19* you may not use this file except in compliance with the License. 20* You may obtain a copy of the License at 21* 22* http://www.apache.org/licenses/LICENSE-2.0 23* 24* Unless required by applicable law or agreed to in writing, software 25* distributed under the License is distributed on an "AS IS" BASIS, 26* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 27* See the License for the specific language governing permissions and 28* limitations under the License. 29*****************************************************************************--> 30 31<Personality id="lfclk" name="CLK_LF" version="3.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v7"> 32 <Dependencies> 33 <IpBlock name="mxs40srss,mxs40ssrss,mxs40srss_ver3,mxs22srss,mxs40srss_ver2" /> 34 <Resource name="srss\.clock\.lfclk" /> 35 </Dependencies> 36 <ExposedMembers> 37 <ExposedMember key="frequency" paramId="frequency" /> 38 <ExposedMember key="accuracy" paramId="accuracy" /> 39 <ExposedMember key="error" paramId="error" /> 40 </ExposedMembers> 41 <Parameters> 42 <!-- PDL documentation --> 43 <ParamDoc id="pdlDoc" name="Configuration Help" group="Overview" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__sysclk__clk__lf.html" linkText="Open Low-Frequency Clock Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" /> 44 45 <ParamBool id="isS40sPiloPresent" name="S40S_PILO Present" group="Internal" default="`${lookupExpression("S40S_PILO_PRESENT", 0)}`" visible="false" editable="false" desc="S40S_PILO Present" /> 46 <ParamBool id="isPiloPresent" name="Pilo Present" group="Internal" default="`${lookupExpression("PILO_PRESENT", 0)}`" visible="false" editable="false" desc="PILO Present" /> 47 <ParamBool id="isS40sWcoPresent" name="S40S_Wco Present" group="Internal" default="`${lookupExpression("BACKUP_PRESENT", 0)}`" visible="false" editable="false" desc="PILO Present" /> 48 <ParamBool id="isWcoPresent" name="S40S_Wco Present" group="Internal" default="`${lookupExpression("WCO_PRESENT", 0)}`" visible="false" editable="false" desc="PILO Present" /> 49 <ParamBool id="is40ssrssAvailable" name="is40ssrssAvailable" group="" default="`${("mxs40ssrss" eq getIpBlockName())}`" visible="false" editable="false" desc="" /> 50 <ParamBool id="is40srss_ver2or3Available" name="is40srss_ver2or3Available" group="" default="`${("mxs40srss_ver2" eq getIpBlockName()) || ("mxs40srss_ver3" eq getIpBlockName())}`" visible="false" editable="false" desc="" /> 51 <ParamBool id="is22srssAvailable" name="is22srssAvailable" group="" default="`${("mxs22srss" eq getIpBlockName())}`" visible="false" editable="false" desc="" /> 52 <ParamBool id="is40srssAvailable" name="is40srssAvailable" group="" default="`${("mxs40srss" eq getIpBlockName())}`" visible="false" editable="false" desc="" /> 53 54 55 <ParamChoice id="sourceClock" name="Source Clock" group="General" default="`${(is40srss_ver2or3Available) ? ilo0 : ("mxs22srss" eq getIpBlockName()) ? pilo : ilo}`" visible="true" editable="true" desc="The clock source for CLK_LF"> 56 <Entry name="ALTLF" value="altlf" visible="`${ALTLF_PRESENT}`"/> 57 <Entry name="ILO" value="ilo" visible="`${("mxs40srss" eq getIpBlockName()) || ("mxs40ssrss" eq getIpBlockName())}`"/> 58 <Entry name="ILO0" value="ilo0" visible="`${(is40srss_ver2or3Available)}`"/> 59 <Entry name="ILO1" value="ilo1" visible="`${(is40srss_ver2or3Available)}`"/> 60 <Entry name="PILO" value="pilo" visible="`${(isS40sPiloPresent) || (isPiloPresent)}`"/> 61 <Entry name="WCO" value="wco" visible="`${((isS40sWcoPresent) || (isWcoPresent)) && hasBlock("srss[0].clock[0].wco[0]")}`"/> 62 <Entry name="ECO_PRESCALER" value="ecoprescaler" visible="`${hasBlock("srss[0].clock[0].eco[0]")}`"/> 63 <Entry name="LPECO_PRESCALER" value="lpecoprescaler" visible="`${("mxs40srss_ver3" eq getIpBlockName()) && lookupExpression("S40E_LPECO_PRESENT", 0)}`"/> 64 </ParamChoice> 65 <ParamString id="sourceClockRsc" name="Source Clock" group="Internal" default="`${sourceClock eq ilo1 ? "srss[0].clock[0]." . ilo . "[1]" : ( sourceClock eq ilo0 ? "srss[0].clock[0]." . ilo . "[0]" : "srss[0].clock[0]." . sourceClock . "[0]")}`" visible="false" editable="false" desc="" /> 66 <ParamString id="sourceClockApiName" name="Source Clock API Name" group="Internal" default="`${sourceClock eq ilo ? "ILO" : 67 sourceClock eq wco ? "WCO" : 68 sourceClock eq ilo0 ? "ILO" : 69 sourceClock eq ilo1 ? "ILO1" : 70 sourceClock eq ecoprescaler ? "ECO_PRESCALER" : 71 sourceClock eq altlf ? "ALTLF" : "PILO"}`" visible="false" editable="false" desc="" /> 72 <!-- Set an error if the source clock is not enabled --> 73 <ParamBool id="error" name="Clock Error" group="Internal" default="`${!isBlockUsed(sourceClockRsc)}`" visible="false" editable="false" desc="" /> 74 <ParamRange id="frequency" name="Frequency" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, "frequency") : 0}`" min="0" max="100000" resolution="1" visible="false" editable="false" desc="" /> 75 <ParamString id="accuracy" name="accuracy" group="General" default="`${!error ? getExposedMember(sourceClockRsc, "accuracy") : 0}`" visible="false" editable="false" desc="" /> 76 <ParamString id="frequencyInfo" name="Frequency" group="General" default="`${formatFrequency(frequency,accuracy)}`" visible="true" editable="false" desc="The CLK_LF frequency provided by the chosen clock source" /> 77 </Parameters> 78 <DRCs> 79 <DRC type="ERROR" text="Source clock for CLK_LF is not enabled" condition="`${error}`" > 80 <FixIt action="ENABLE_BLOCK" target="`${sourceClockRsc}`" value="" valid="true" /> 81 </DRC> 82 </DRCs> 83 <ConfigFirmware> 84 <ConfigInclude value="cy_sysclk.h" include="true" /> 85 <ConfigDefine name="CY_CFG_SYSCLK_CLKLF_ENABLED" value="1" public="false" include="true" /> 86 <ConfigDefine name="CY_CFG_SYSCLK_CLKLF_FREQ_HZ" value="`${frequency}`" public="true" include="true" /> 87 <ConfigDefine name="CY_CFG_SYSCLK_CLKLF_SOURCE" value="CY_SYSCLK_CLKLF_IN_`${sourceClockApiName}`" public="true" include="true" /> 88 <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_ClkLfInit()" body=" /* The WDT is unlocked in the default startup code */
 Cy_SysClk_ClkLfSetSource(CY_SYSCLK_CLKLF_IN_`${sourceClockApiName}`);" public="false" include="`${is40srssAvailable || is40ssrssAvailable}`" guard="(!defined(CY_DEVICE_SECURE))" /> 89 <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_ClkLfInit()" body=" /* The WDT is unlocked in the default startup code */
 Cy_SysClk_ClkLfSetSource(CY_CFG_SYSCLK_CLKLF_SOURCE);" public="false" include="`${(is40srss_ver2or3Available)}`" /> 90 <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_ClkLfInit()" body=" /* The WDT is unlocked in the default startup code */
 Cy_SysClk_ClkLfSetSource(CY_CFG_SYSCLK_CLKLF_SOURCE);" public="false" include="`${(is22srssAvailable)}`" guard="defined(CORE_NAME_CM33_0)" /> 91 </ConfigFirmware> 92</Personality> 93
