1<?xml version="1.0" encoding="utf-8"?> 2 3 4<!--**************************************************************************** 5* \file pumpclk.cypersonality 6* \version 3.0 7* 8* \brief 9* CLK_PUMP personality description file. 10* This supports CAT1A, CAT1B and CAT1D devices. 11* 12******************************************************************************** 13* \copyright 14* Copyright (c) (2020-2022), Cypress Semiconductor Corporation (an Infineon company) or 15* an affiliate of Cypress Semiconductor Corporation. 16* SPDX-License-Identifier: Apache-2.0 17* 18* Licensed under the Apache License, Version 2.0 (the "License"); 19* you may not use this file except in compliance with the License. 20* You may obtain a copy of the License at 21* 22* http://www.apache.org/licenses/LICENSE-2.0 23* 24* Unless required by applicable law or agreed to in writing, software 25* distributed under the License is distributed on an "AS IS" BASIS, 26* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 27* See the License for the specific language governing permissions and 28* limitations under the License. 29*****************************************************************************--> 30 31<Personality id="pumpclk" name="CLK_PUMP" version="3.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v7"> 32 <Dependencies> 33 <IpBlock name="mxs40srss,mxs40ssrss,mxs22srss" /> 34 <Resource name="srss\.clock\.pumpclk" /> 35 </Dependencies> 36 <ExposedMembers> 37 <ExposedMember key="frequency" paramId="frequency" /> 38 <ExposedMember key="accuracy" paramId="accuracy" /> 39 </ExposedMembers> 40 <Parameters> 41 <!-- PDL documentation --> 42 <ParamDoc id="pdlDoc" name="Configuration Help" group="Overview" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__sysclk__clk__pump.html" linkText="Open Pump Clock Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" /> 43 44 <ParamChoice id="sourceClockNumber" name="Source Clock" group="General" default="0" visible="true" editable="true" desc="The clock source selection"> 45 <Entry name="CLK_PATH0" value="0" visible="`${NUM_CLKPATH >= 1}`"/> 46 <Entry name="CLK_PATH1" value="1" visible="`${NUM_CLKPATH >= 2}`"/> 47 <Entry name="CLK_PATH2" value="2" visible="`${NUM_CLKPATH >= 3}`"/> 48 <Entry name="CLK_PATH3" value="3" visible="`${NUM_CLKPATH >= 4}`"/> 49 <Entry name="CLK_PATH4" value="4" visible="`${NUM_CLKPATH >= 5}`"/> 50 <Entry name="CLK_PATH5" value="5" visible="`${NUM_CLKPATH >= 6}`"/> 51 <Entry name="CLK_PATH6" value="6" visible="`${NUM_CLKPATH >= 7}`"/> 52 <Entry name="CLK_PATH7" value="7" visible="`${NUM_CLKPATH >= 8}`"/> 53 <Entry name="CLK_PATH8" value="8" visible="`${NUM_CLKPATH >= 9}`"/> 54 <Entry name="CLK_PATH9" value="9" visible="`${NUM_CLKPATH >= 10}`"/> 55 <Entry name="CLK_PATH10" value="10" visible="`${NUM_CLKPATH >= 11}`"/> 56 <Entry name="CLK_PATH11" value="11" visible="`${NUM_CLKPATH >= 12}`"/> 57 <Entry name="CLK_PATH12" value="12" visible="`${NUM_CLKPATH >= 13}`"/> 58 <Entry name="CLK_PATH13" value="13" visible="`${NUM_CLKPATH >= 14}`"/> 59 <Entry name="CLK_PATH14" value="14" visible="`${NUM_CLKPATH >= 15}`"/> 60 <Entry name="CLK_PATH15" value="15" visible="`${NUM_CLKPATH >= 16}`"/> 61 </ParamChoice> 62 63 <!-- If the FLL/PLL are enabled, their output drive the corresponding clock path --> 64 <ParamBool id="isFllUsed" name="Is FLL Used" group="Internal" default="`${(sourceClockNumber eq 0) && isBlockUsed("srss[0].clock[0].fll[0]")}`" visible="false" editable="false" desc="" /> 65 66 <ParamBool id="isPllUsed" name="Is PLL Used" group="Internal" default="`${(sourceClockNumber > 0) && (sourceClockNumber <= NUM_PLL) && isBlockUsed("srss[0].clock[0].pll[" . (sourceClockNumber-1) . "]")}`" visible="false" editable="false" desc="" /> 67 68 <ParamString id="sourceClock" name="Source clock resource" group="Internal" default="`${isFllUsed ? "fll[0]" : 69 isPllUsed ? "pll[" . (sourceClockNumber-1) . "]" : 70 "pathmux[" . sourceClockNumber . "]"}`" visible="false" editable="false" desc="" /> 71 72 <ParamString id="sourceClockRsc" name="Source Clock" group="Internal" default="srss[0].clock[0].`${sourceClock}`" visible="false" editable="false" desc="" /> 73 <!-- Set an error if the source clock is not enabled or contains an error --> 74 <ParamBool id="srcNotUsed" name="Clock Source Enabled" group="Internal" default="`${!isBlockUsed(sourceClockRsc)}`" visible="false" editable="false" desc="" /> 75 <ParamBool id="error" name="Clock Error" group="Internal" default="`${srcNotUsed || getExposedMember(sourceClockRsc, "error")}`" visible="false" editable="false" desc="" /> 76 <!-- Use default values in case of error --> 77 <ParamRange id="sourceFreq" name="sourceFreq" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, "frequency") : 0}`" min="0" max="400000000" resolution="1" visible="false" editable="false" desc="" /> 78 <ParamString id="accuracy" name="accuracy" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, "accuracy") : 0}`" visible="false" editable="false" desc="" /> 79 <ParamString id="sourceFrequencyInfo" name="Source Frequency" group="General" default="`${formatFrequency(sourceFreq,accuracy)}`" visible="true" editable="false" desc="Source clock frequency" /> 80 <ParamChoice id="divider" name="Divider" group="General" default="1" visible="true" editable="true" desc="The source clock frequency divider"> 81 <Entry name="1" value="1" visible="true"/> 82 <Entry name="2" value="2" visible="true"/> 83 <Entry name="4" value="4" visible="true"/> 84 <Entry name="8" value="8" visible="true"/> 85 <Entry name="16" value="16" visible="true"/> 86 </ParamChoice> 87 <ParamRange id="frequency" name="Frequency" group="Internal" default="`${sourceFreq / divider}`" min="0" max="400000000" resolution="1" visible="false" editable="false" desc="" /> 88 <!-- If the frequency is less than one MHz, display its value in kHz --> 89 <ParamString id="frequencyInfo" name="Frequency" group="General" default="`${formatFrequency(frequency,accuracy)}`" visible="true" editable="false" desc="The actual frequency" /> 90 </Parameters> 91 <DRCs> 92 <DRC type="ERROR" text="Source clock for CLK_PUMP is not enabled " condition="`${srcNotUsed}`" > 93 <FixIt action="ENABLE_BLOCK" target="`${sourceClockRsc}`" value="" valid="true" /> 94 </DRC> 95 </DRCs> 96 <ConfigFirmware> 97 <ConfigInclude value="cy_sysclk.h" include="true" /> 98 <ConfigDefine name="CY_CFG_SYSCLK_CLKPUMP_ENABLED" value="1" public="false" include="true" /> 99 <ConfigDefine name="CY_CFG_SYSCLK_CLKPUMP_SOURCE" value="CY_SYSCLK_PUMP_IN_CLKPATH`${sourceClockNumber}`" public="false" include="true" /> 100 <ConfigDefine name="CY_CFG_SYSCLK_CLKPUMP_DIVIDER" value="CY_SYSCLK_PUMP_`${(divider == 1 ? "NO_DIV" : ("DIV_" . divider))}`" public="false" include="true" /> 101 <ConfigFunction signature="__STATIC_INLINE void Cy_SysClk_ClkPumpInit()" body=" Cy_SysClk_ClkPumpDisable();
 Cy_SysClk_ClkPumpSetSource(CY_SYSCLK_PUMP_IN_CLKPATH`${sourceClockNumber}`);
 Cy_SysClk_ClkPumpSetDivider(CY_SYSCLK_PUMP_`${(divider == 1 ? "NO_DIV" : ("DIV_" . divider))}`);
 Cy_SysClk_ClkPumpEnable();" public="false" include="true" guard="(!defined(CY_DEVICE_SECURE))" /> 102 </ConfigFirmware> 103</Personality> 104
