1 /***************************************************************************//**
2 * \file cyhal_pwm_impl.h
3 *
4 * Description:
5 * Provides a high level interface for interacting with the Infineon PWM.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright 2019-2021 Cypress Semiconductor Corporation (an Infineon company) or
10 * an affiliate of Cypress Semiconductor Corporation
11 *
12 * SPDX-License-Identifier: Apache-2.0
13 *
14 * Licensed under the Apache License, Version 2.0 (the "License");
15 * you may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at
17 *
18 *     http://www.apache.org/licenses/LICENSE-2.0
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *******************************************************************************/
26 
27 #pragma once
28 
29 #include "cyhal_tcpwm_common.h"
30 
31 #if defined(CY_IP_MXTCPWM_INSTANCES) || defined(CY_IP_M0S8TCPWM_INSTANCES)
32 
33 #if defined(__cplusplus)
34 extern "C" {
35 #endif /* __cplusplus */
36 
37 /** \addtogroup group_hal_impl_pwm PWM
38  * \ingroup group_hal_impl
39  * \{
40  * \section group_hal_impl_pwm_interconnect Interconnect
41  * In PSoC™ PWM channels can configure multiple input and output triggers
42  * simultaneously. 1 or more input triggers can be configured to initiate
43  * different PWM actions (e.g start, stop, reload, etc) with configurable edge
44  * detection on that incoming signal. Output triggers are based on certain
45  * events (e.g overflow, cc_match, etc).
46  * Note: The line_out output trigger is only available for TCPWMv2.
47  * \} group_hal_impl_pwm */
48 
_cyhal_pwm_convert_event(cyhal_pwm_event_t event)49 __STATIC_INLINE uint32_t _cyhal_pwm_convert_event(cyhal_pwm_event_t event)
50 {
51     uint32_t pdl_event = 0U;
52     if (event & CYHAL_PWM_IRQ_TERMINAL_COUNT)
53     {
54         pdl_event |= CY_TCPWM_INT_ON_TC;
55     }
56     if (event & CYHAL_PWM_IRQ_COMPARE)
57     {
58         pdl_event |= CY_TCPWM_INT_ON_CC;
59     }
60     return pdl_event;
61 }
62 
_cyhal_pwm_register_callback(cyhal_pwm_t * obj,cyhal_pwm_event_callback_t callback,void * callback_arg)63 __STATIC_INLINE void _cyhal_pwm_register_callback(cyhal_pwm_t *obj, cyhal_pwm_event_callback_t callback, void *callback_arg)
64 {
65     _cyhal_tcpwm_register_callback(&obj->tcpwm.resource, (cy_israddress) callback, callback_arg);
66 }
67 
68 #define cyhal_pwm_register_callback(obj, callback, callback_arg) \
69         _cyhal_pwm_register_callback(obj, callback, callback_arg)
70 
_cyhal_pwm_enable_event(cyhal_pwm_t * obj,cyhal_pwm_event_t event,uint8_t intr_priority,bool enable)71 __STATIC_INLINE void _cyhal_pwm_enable_event(cyhal_pwm_t *obj, cyhal_pwm_event_t event, uint8_t intr_priority, bool enable)
72 {
73     uint32_t converted = _cyhal_pwm_convert_event(event);
74     _cyhal_tcpwm_enable_event(&obj->tcpwm, &obj->tcpwm.resource, converted, intr_priority, enable);
75 }
76 
77 #define cyhal_pwm_enable_event(obj, event, intr_priority, enable) \
78         _cyhal_pwm_enable_event(obj, event, intr_priority, enable)
79 
80 #if defined(__cplusplus)
81 }
82 #endif /* __cplusplus */
83 
84 #endif /* defined(CY_IP_MXTCPWM_INSTANCES) */
85