1 /***************************************************************************//**
2 * \file cyhal_tdm.h
3 *
4 * \brief
5 * Provides a high level interface for interacting with the Infineon TDM.
6 * This interface abstracts out the chip specific details. If any chip specific
7 * functionality is necessary, or performance is critical the low level functions
8 * can be used directly.
9 *
10 ********************************************************************************
11 * \copyright
12 * Copyright 2018-2022 Cypress Semiconductor Corporation (an Infineon company) or
13 * an affiliate of Cypress Semiconductor Corporation
14 *
15 * SPDX-License-Identifier: Apache-2.0
16 *
17 * Licensed under the Apache License, Version 2.0 (the "License");
18 * you may not use this file except in compliance with the License.
19 * You may obtain a copy of the License at
20 *
21 *     http://www.apache.org/licenses/LICENSE-2.0
22 *
23 * Unless required by applicable law or agreed to in writing, software
24 * distributed under the License is distributed on an "AS IS" BASIS,
25 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
26 * See the License for the specific language governing permissions and
27 * limitations under the License.
28 *******************************************************************************/
29 
30 /**
31 * \addtogroup group_hal_tdm TDM (Time Division Multiplexed)
32 * \ingroup group_hal
33 * \{
34 * High level interface for interacting with the Time Division Multiplexed controller (TDM).
35 *
36 * The TDM protocol is a asynchronous serial interface protocol. This driver supports
37 * both transmit and receive modes of operation. The communication frequency, sample rate,
38 * word size, and number of channels can all be configured.
39 *
40 * \note Certain platforms may not support all of the functionality and configuration options
41 * provided by this driver. Please refer to implementation specific documentation for details
42 * on available options.
43 *
44 * \section section_tdm_features Features
45 *
46 * * Transmit and receive functionality
47 * * Configurable data rates
48 * * Configurable channel count and word size
49 * * Configurable interrupt and callback assignment from TDM events - \ref cyhal_tdm_event_t
50 *
51 * \section section_tdm_quickstart Quick Start
52 * Initialize an TDM instance using the \ref cyhal_tdm_init and provide the transmit (tx) and/or receive (rx) pins. Call
53 * \ref cyhal_tdm_start_tx and/or \ref cyhal_tdm_start_rx to enable transmit and/or receive functionality as desired.<br>
54 * See \ref subsection_tdm_snippet_1 for example initialization as transmit or receive.
55 * \note The clock parameter (const \ref cyhal_clock_t *clk) is optional and can be set
56 * to NULL to generate and use an available clock resource with a default frequency.
57 *
58 * The sclk frequency is determined as `sclk = sample_rate_hz * channel_length * num_channels`.
59 * The input clock must be a multiple of this sclk frequency; see the implementation specific
60 * documentation for the supported multipliers.
61 *
62 * It is possible to use either only TX functionality, only RX functionality, or both RX and TX functionality at the same time.
63 * If RX and TX are both in use, the same sample rate, channel length, channel count, channel mask, word length, and sclk
64 * frequency will be used for both.
65 *
66 * \section section_tdm_snippets Code Snippets
67 * \note Error checking is omitted for clarity
68 *
69 * \subsection subsection_tdm_snippet_1 Snippet 1: TDM Initialization and Configuration
70 * This snippet initializes an TDM resource for transmit or receive and assigns the pins.
71 *
72 * Initializing as TDM transmitter
73 * \snippet hal_tdm.c snippet_cyhal_tdm_transmit_init
74 *
75 * Initializing as TDM receiver
76 * \snippet hal_tdm.c snippet_cyhal_tdm_receive_init
77 *
78 * \subsection subsection_tdm_snippet_2 Snippet 2: TDM Transmit One-shot
79 * This snippet shows how to transmit data using \ref cyhal_tdm_write_async when the entire sample
80 * is available at once. <br>
81 *
82 * \snippet hal_tdm.c snippet_cyhal_tdm_async_transmit_one_shot
83 
84 * \subsection subsection_tdm_snippet_3 Snippet 3: TDM Transmit Streaming
85 * This snippet shows how to transmit data using \ref cyhal_tdm_write_async when sample data is
86 * being continuously loaded and transmitted (e.g. streaming over the network). <br>
87 *
88 * \snippet hal_tdm.c snippet_cyhal_tdm_async_transmit_streaming
89 
90 * \subsection subsection_tdm_snippet_4 Snippet 4: TDM Receive
91 * This snippet shows how to receive data using \ref cyhal_tdm_read_async. <br>
92 *
93 * \snippet hal_tdm.c snippet_cyhal_tdm_async_receive
94 *
95 * \section subsection_tdm_moreinformation More Information
96 *
97 * <b>Code examples (Github)</b>
98 * * <a href="https://github.com/infineon/mtb-example-psoc6-tdm" ><b>
99 PSoC™ 6 MCU: Time Division Multiplexing (TDM)</b></a>
100 */
101 
102 #pragma once
103 
104 #include <stdint.h>
105 #include <stdbool.h>
106 #include "cy_result.h"
107 #include "cyhal_clock.h"
108 #include "cyhal_dma.h"
109 #include "cyhal_general_types.h"
110 #include "cyhal_hw_types.h"
111 #include "cyhal_gpio.h"
112 
113 #if defined(__cplusplus)
114 extern "C" {
115 #endif
116 
117 /** \addtogroup group_hal_results_tdm TDM HAL Results
118  *  TDM specific return codes
119  *  \ingroup group_hal_results
120  *  \{ *//**
121  */
122 
123 /** An invalid pin location was specified */
124 #define CYHAL_TDM_RSLT_ERR_INVALID_PIN        \
125   (CY_RSLT_CREATE_EX(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_HAL, CYHAL_RSLT_MODULE_TDM, 0))
126 
127 /** An argument was provided */
128 #define CYHAL_TDM_RSLT_ERR_INVALID_ARG        \
129   (CY_RSLT_CREATE_EX(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_HAL, CYHAL_RSLT_MODULE_TDM, 1))
130 
131 /** Initialization of the TDM hardware failed*/
132 #define CYHAL_TDM_RSLT_ERR_INIT_FAILED        \
133   (CY_RSLT_CREATE_EX(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_HAL, CYHAL_RSLT_MODULE_TDM, 2))
134 
135 /** The requested clock frequency could not be achieved */
136 #define CYHAL_TDM_RSLT_ERR_CLOCK \
137     (CY_RSLT_CREATE_EX(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_HAL, CYHAL_RSLT_MODULE_TDM, 3))
138 
139 /** The requested configuration is not supported. */
140 #define CYHAL_TDM_RSLT_NOT_SUPPORTED \
141     (CY_RSLT_CREATE_EX(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_HAL, CYHAL_RSLT_MODULE_TDM, 4))
142 
143 /** * \} */
144 
145 /** TDM events */
146 typedef enum {
147     /** TX HW Buffer is not full */
148     CYHAL_TDM_TX_NOT_FULL         = 1 << 0,
149     /** TX HW Buffer is half empty */
150     CYHAL_TDM_TX_HALF_EMPTY       = 1 << 1,
151     /** TX HW Buffer is empty */
152     CYHAL_TDM_TX_EMPTY            = 1 << 2,
153     /** Attempt to write when TX HW Buffer is full */
154     CYHAL_TDM_TX_OVERFLOW         = 1 << 3,
155     /** Interface ready to transfer data but HW TX buffer is empty */
156     CYHAL_TDM_TX_UNDERFLOW        = 1 << 4,
157     /** Pending async transmit is complete (but the HW buffer may still contain unsent data) */
158     CYHAL_TDM_ASYNC_TX_COMPLETE   = 1 << 5,
159     /** RX HW Buffer is not Empty */
160     CYHAL_TDM_RX_NOT_EMPTY        = 1 << 6,
161     /** RX HW Buffer is half full */
162     CYHAL_TDM_RX_HALF_FULL        = 1 << 7,
163     /** RX HW Buffer is FULL */
164     CYHAL_TDM_RX_FULL             = 1 << 8,
165     /** Attempt to write when RX HW Buffer is full */
166     CYHAL_TDM_RX_OVERFLOW         = 1 << 9,
167     /** Attempt to read when HW RX buffer is empty */
168     CYHAL_TDM_RX_UNDERFLOW        = 1 << 10,
169     /** Pending async receive is complete */
170     CYHAL_TDM_ASYNC_RX_COMPLETE   = 1 << 11,
171 } cyhal_tdm_event_t;
172 
173 /** Selections for TDM output signals  */
174 typedef enum
175 {
176     /** An output signal should be triggered when the receive buffer is half full */
177     CYHAL_TDM_TRIGGER_RX_HALF_FULL,
178     /** An output signal should be triggered when the transmit buffer is half empty */
179     CYHAL_TDM_TRIGGER_TX_HALF_EMPTY,
180 }
181 cyhal_tdm_output_t;
182 
183 /** Pins to use for one TDM direction */
184 typedef struct {
185     cyhal_gpio_t sck;   //!< Clock pin
186     cyhal_gpio_t ws;    //!< Word select
187     cyhal_gpio_t data;  //!< Data pin (sdo or sdi)
188     cyhal_gpio_t mclk;  //!< Mclk input pin. Set to NC if an internal clock source should be used
189 } cyhal_tdm_pins_t;
190 
191 /** Word select pulse width */
192 typedef enum
193 {
194     CYHAL_TDM_WS_SINGLE, //!< Single SCK cycle
195     CYHAL_TDM_WS_FULL,   //!< Full channel length
196 } cyhal_tdm_word_select_width_t;
197 
198 /** TDM Configuration */
199 typedef struct {
200     /** Configure TX to operate as slave (true) or master (false) */
201     bool is_tx_slave;
202     /** Word select pulse width for TX direction */
203     cyhal_tdm_word_select_width_t tx_ws_width;
204     /** Configure RX to operate as slave (true) or master (false) */
205     bool is_rx_slave;
206     /** Word select pulse width for RX direction */
207     cyhal_tdm_word_select_width_t rx_ws_width;
208     /** Frequency, in hertz, of the master clock if it is provided by an external pin.
209      * If at least one mclk pin is not NC, this must be nonzero.
210      * If both mclk pins are NC, this must be zero.
211      */
212     uint32_t mclk_hz;
213     /** Number of bits in each channel. See the implementation specific documentation for supported values. */
214     uint8_t channel_length;
215     /**
216       * Number of channels. Must be a value between 1 and 32. Not all implementations support
217       * all channel counts; see the implementation specific documentation for details.
218       */
219     uint8_t num_channels;
220     /**
221       * Determines which channels are enabled. Disabled channels still participate in the time
222       * slicing, but the contents of a disabled channel are silently discarded (for Rx) or
223       * sent as all 0's (for Tx).
224       * This is a mask, with each bit corresponding to the enabled state of one channel.
225       * Not all implementations permit masking of arbitrary channel combinations. See the
226       * implementation specific documentation for details.
227       */
228     uint32_t channel_mask;
229     /** Number of bits in each word. Must be less than or equal to channel_length.
230      * If word_length < 32, the excess bits will be padded with 0's.
231      */
232     uint8_t word_length;
233     /** Sample rate in Hz */
234     uint32_t sample_rate_hz;
235 } cyhal_tdm_config_t;
236 
237 /** Handler for TDM event callbacks */
238 typedef void (*cyhal_tdm_event_callback_t)(void *callback_arg, cyhal_tdm_event_t event);
239 
240 /** Initialize the TDM peripheral. It sets the default parameters for TDM
241  *  peripheral, and configures its specifieds pins.
242  *  If only one direction is to be used, then the pins for the other direction need not be specified (i.e. they may be set to NC).
243  *  For example, if only RX is needed, tx_sck, tx_ws, and tx_sdo may all be set to NC.
244  *  If one pin is specified for a direction, all pins for that direction must be specified.
245  *
246  * @param[out] obj          Pointer to a TDM object. The caller must allocate the memory
247  *                            for this object but the init function will initialize its contents.
248  * @param[in]  tx_pins      Pins for TDM transmit. If NULL, transmit functionality will be disabled.
249  * @param[in]  rx_pins      Pins for TDM receive. If NULL, receive functionality will be disabled.
250  * @param[in]  config       Initial block configuration
251  * @param[in]  clk          Clock source to use for this instance. If NULL, a dedicated clock divider will be allocated for this instance.
252  * @return The status of the init request
253  */
254 cy_rslt_t cyhal_tdm_init(cyhal_tdm_t *obj, const cyhal_tdm_pins_t* tx_pins, const cyhal_tdm_pins_t* rx_pins,
255                          const cyhal_tdm_config_t* config, cyhal_clock_t* clk);
256 
257 /** Initialize the TDM peripheral using a configurator generated configuration struct
258   *
259  * @param[out] obj              Pointer to a TDM object. The caller must allocate the memory
260  *                              for this object but the init function will initialize its contents.
261  * @param[in] cfg               Configuration structure generated by a configurator.
262  * @return The status of the init request
263  */
264  cy_rslt_t cyhal_tdm_init_cfg(cyhal_tdm_t *obj, const cyhal_tdm_configurator_t *cfg);
265 
266 /** Deinitialize the tdm object
267  *
268  * @param[in,out] obj The tdm object
269  */
270 void cyhal_tdm_free(cyhal_tdm_t *obj);
271 
272 /** Set the TDM sample rate
273  *
274  * @param[in] obj           The TDM object
275  * @param[in] sample_rate_hz Sample rate in Hz
276  * @return The status of the set sample rate request
277  */
278 cy_rslt_t cyhal_tdm_set_sample_rate(cyhal_tdm_t *obj, uint32_t sample_rate_hz);
279 
280 /** Starts transmitting data. Transmission will continue until it is stopped by
281   * calling @ref cyhal_tdm_stop_tx.
282   *
283   * @param[in] obj The TDM object
284   * @return The status of the start request.
285   */
286 cy_rslt_t cyhal_tdm_start_tx(cyhal_tdm_t *obj);
287 
288 /** Stops transmitting data. This immediately terminates data transmission.
289   *
290   * @param[in] obj The TDM object
291   * @return The status of the stop request.
292   */
293 cy_rslt_t cyhal_tdm_stop_tx(cyhal_tdm_t *obj);
294 
295 /** Clears the tx hardware buffer
296  *
297  * @param[in] obj The tdm peripheral
298  * @return The status of the clear request
299  */
300 cy_rslt_t cyhal_tdm_clear_tx(cyhal_tdm_t *obj);
301 
302 /** Starts receiving data. Data will continue to be received until it is
303   * stopped by calling @ref cyhal_tdm_stop_rx.
304   *
305   * @param[in] obj The TDM object
306   * @return The status of the start request.
307   */
308 cy_rslt_t cyhal_tdm_start_rx(cyhal_tdm_t *obj);
309 
310 /** Stops receiving data. This immediately terminates data receipt.
311   *
312   * @param[in] obj The TDM object
313   * @return The status of the stop request.
314   */
315 cy_rslt_t cyhal_tdm_stop_rx(cyhal_tdm_t *obj);
316 
317 /** Clears the rx hardware buffer
318  *
319  * @param[in] obj The tdm peripheral
320  * @return The status of the clear request
321  */
322 cy_rslt_t cyhal_tdm_clear_rx(cyhal_tdm_t *obj);
323 
324 /** Read data synchronously
325  *
326  * This will read the number of words specified by the `length` parameter, or the number of words that
327  * are currently available in the receive buffer, whichever is less, then return. The value pointed to
328  * by `length` will be updated to reflect the number of words that were actually read.
329  *
330  * @param[in]  obj    The TDM object
331  * @param[out] data   The buffer for receiving
332  * @param[in,out] length Number of words to (as configured in cyhal_tdm_config_t.word_length) read, updated with the number actually read
333  * @return The status of the read request
334  *
335  * @note Each word will be aligned to the next largest power of 2. For example, if the word length is 16 bits,
336  * each word will consume two bytes. But if the word length is 20, each word will consume 32 bytes.
337  * @return The status of the write request
338  */
339 cy_rslt_t cyhal_tdm_read(cyhal_tdm_t *obj, void *data, size_t* length);
340 
341 /** Send data synchronously
342  *
343  * This will write either `length` words or until the write buffer is full, whichever is less,
344  * then return. The value pointed to by `length` will be updated to reflect the number of words
345  * that were actually written.
346  * @note This function only queues data into the write buffer; it does not block until the
347  *  data has all been sent out over the wire.
348  *
349  * @param[in] obj     The TDM object
350  * @param[in] data    The buffer for sending
351  * @param[in,out] length Number of words to write (as configured in cyhal_tdm_config_t.word_length, updated with the number actually written
352  * @return The status of the write request
353  *
354  * @note Each word will be aligned to the next largest power of 2. For example, if the word length is 16 bits,
355  * each word will consume two bytes. But if the word length is 20, each word will consume 32 bytes.
356  */
357 cy_rslt_t cyhal_tdm_write(cyhal_tdm_t *obj, const void *data, size_t *length);
358 
359 /** Checks if the transmit functionality is enabled for the specified TDM peripheral (regardless of whether data
360   * is currently queued for transmission).
361   *
362   * The transmit functionality can be enabled by calling @ref cyhal_tdm_start_tx and disabled by calling
363   * @ref cyhal_tdm_stop_tx
364   *
365   * @param[in] obj  The TDM peripheral to check
366   * @return Whether the TDM transmit function is enabled.
367   */
368 bool cyhal_tdm_is_tx_enabled(cyhal_tdm_t *obj);
369 
370 /** Checks if the receive functionality is enabled for the specified TDM peripheral (regardless of whether any
371   * unread data has been received).
372   *
373   * The receive functionality can be enabled by calling @ref cyhal_tdm_start_rx and disabled by calling
374   * @ref cyhal_tdm_stop_rx
375   *
376   * @param[in] obj  The TDM peripheral to check
377   * @return Whether the TDM receive function is enabled.
378   */
379 bool cyhal_tdm_is_rx_enabled(cyhal_tdm_t *obj);
380 
381 /** Checks if the specified TDM peripheral is transmitting data, including if a pending async transfer is waiting
382   * to write more data to the transmit buffer.
383   *
384   * @param[in] obj  The TDM peripheral to check
385   * @return Whether the TDM is still transmitting
386   */
387 bool cyhal_tdm_is_tx_busy(cyhal_tdm_t *obj);
388 
389 /** Checks if the specified TDM peripheral has received data that has not yet been read out of the hardware buffer.
390   * This includes if an async read transfer is pending.
391   *
392   * @param[in] obj  The TDM peripheral to check
393   * @return Whether the TDM is still transmitting
394   */
395 bool cyhal_tdm_is_rx_busy(cyhal_tdm_t *obj);
396 
397 /** Start TDM asynchronous read.
398  *
399  * This will transfer `rx_length` words into the buffer pointed to by `rx` in the background. When the
400  * requested quantity of data has been read, the @ref CYHAL_TDM_ASYNC_RX_COMPLETE event will be raised.
401  * See @ref cyhal_tdm_register_callback and @ref cyhal_tdm_enable_event.
402  *
403  * @ref cyhal_tdm_set_async_mode can be used to control whether this uses DMA or a SW (CPU-driven) transfer.
404  *
405  * @note If D-cache is enabled, cyhal_tdm_set_async_mode is DMA and data Cache line is 32 bytes,
406  * the user needs to make sure that the rx pointer passed to the cyhal_tdm_read_async
407  * function points to a 32 byte aligned array of words that contains the buffer data.
408  * The size of buffer data must be a multiple of 32 bytes to ensure cache coherency.
409  * CY_ALIGN(__SCB_DCACHE_LINE_SIZE) macro can be used for 32 byte alignment.
410  *
411  * Refer to \ref DCACHE_Management for more information.
412  *
413  * @note Each word will be aligned to the next largest power of 2. For example, if the word length is 16 bits,
414  * each word will consume two bytes. But if the word length is 20, each word will consume 32 bytes.
415  *
416  * @param[in]     obj       The TDM object
417  * @param[out]    rx        The receive buffer.
418  * @param[in]     rx_length Number of words (as configured in cyhal_tdm_config_t.word_length) to read.
419  * @return The status of the read_async request
420  */
421 cy_rslt_t cyhal_tdm_read_async(cyhal_tdm_t *obj, void *rx, size_t rx_length);
422 
423 /** Start TDM asynchronous write.
424  *
425  * This will transfer `tx_length` words into the tx buffer in the background. When the requested
426  * quantity of data has been queued in the transmit buffer, the @ref CYHAL_TDM_ASYNC_TX_COMPLETE
427  * event will be raised. See @ref cyhal_tdm_register_callback and @ref cyhal_tdm_enable_event.
428  *
429  * @ref cyhal_tdm_set_async_mode can be used to control whether this uses DMA or a SW (CPU-driven) transfer.
430  *
431  * @note If D-cache is enabled, cyhal_tdm_set_async_mode is DMA and data Cache line is 32 bytes,
432  * the user needs to make sure that the tx pointer passed to the cyhal_tdm_write_async
433  * function points to a 32 byte aligned array of words that contains the buffer data.
434  * The size of buffer data must be a multiple of 32 bytes to ensure cache coherency.
435  * CY_ALIGN(__SCB_DCACHE_LINE_SIZE) macro can be used for 32 byte alignment.
436  *
437  * Refer to \ref DCACHE_Management for more information.
438  *
439  * @note Each word will be aligned to the next largest power of 2. For example, if the word length is 16 bits,
440  * each word will consume two bytes. But if the word length is 20, each word will consume 32 bytes.
441  *
442  * @param[in]     obj       The TDM object
443  * @param[in]     tx        The transmit buffer.
444  * @param[in]     tx_length The number of words to transmit.
445  * @return The status of the transfer_async request
446  */
447 cy_rslt_t cyhal_tdm_write_async(cyhal_tdm_t *obj, const void *tx, size_t tx_length);
448 
449 /** Set the mechanism that is used to perform TDM asynchronous transfers. The default is SW.
450  *  @warning The effect of calling this function while an async transfer is pending is undefined.
451  *
452  * @param[in]     obj          The TDM object
453  * @param[in]     mode         The transfer mode
454  * @param[in]     dma_priority The priority, if DMA is used. Valid values are the same as for @ref cyhal_dma_init.
455  *                             If DMA is not selected, the only valid value is CYHAL_DMA_PRIORITY_DEFAULT, and no
456                                guarantees are made about prioritization.
457  * @return The status of the set mode request
458  */
459 cy_rslt_t cyhal_tdm_set_async_mode(cyhal_tdm_t *obj, cyhal_async_mode_t mode, uint8_t dma_priority);
460 
461 /** Checks if the specified TDM peripheral is in the process of reading data from the hardware buffer into RAM.
462  *
463  * @note: This only checks whether there is an ongoing transfer (e.g. via cyhal_tdm_read_async) into RAM from the
464  *  TDM peripheral's hardware buffer. It does not check whether unread data exists in the hardware buffer.
465  *
466  * @param[in] obj  The TDM peripheral to check
467  * @return Whether an asynchronous read operation is still in progress
468  */
469 bool cyhal_tdm_is_read_pending(cyhal_tdm_t *obj);
470 
471 /** Checks if the specified TDM peripheral is in the process of writing data into the hardware buffer.
472  *
473  * @note: This only checks whether there is an ongoing transfer (e.g. via cyhal_tdm_transfer_async) from RAM into the
474  *  TDM peripheral's hardware buffer. It does not check whether unwritten data exists in the hardware buffer.
475  *
476  * @param[in] obj  The TDM peripheral to check
477  * @return Whether an asynchronous write operation is still in progress
478  */
479 bool cyhal_tdm_is_write_pending(cyhal_tdm_t *obj);
480 
481 /** Abort TDM asynchronous read
482  *
483  * This function does not perform any validation before aborting the transfer.
484  * Any validation which is required is the responsibility of the application.
485  *
486  * @param[in] obj The TDM object
487  * @return The status of the abort_async_read request
488  */
489 cy_rslt_t cyhal_tdm_abort_read_async(cyhal_tdm_t *obj);
490 
491 /** Abort TDM asynchronous write
492  *
493  * This function does not perform any validation before aborting the transfer.
494  * Any validation which is required is the responsibility of the application.
495  *
496  * @param[in] obj The TDM object
497  * @return The status of the abort_async_write request
498  */
499 cy_rslt_t cyhal_tdm_abort_write_async(cyhal_tdm_t *obj);
500 
501 /** Register a TDM callback handler
502  *
503  * This function will be called when one of the events enabled by \ref cyhal_tdm_enable_event occurs.
504  *
505  * @param[in] obj          The TDM object
506  * @param[in] callback     The callback handler which will be invoked when the interrupt fires
507  * @param[in] callback_arg Generic argument that will be provided to the callback when called
508  */
509 void cyhal_tdm_register_callback(cyhal_tdm_t *obj, cyhal_tdm_event_callback_t callback, void *callback_arg);
510 
511 /** Configure TDM events.
512  *
513  * When an enabled event occurs, the function specified by \ref cyhal_tdm_register_callback will be called.
514  *
515  * @param[in] obj            The TDM object
516  * @param[in] event          The TDM event type
517  * @param[in] intr_priority  The priority for NVIC interrupt events
518  * @param[in] enable         True to turn on specified events, False to turn off
519  */
520 void cyhal_tdm_enable_event(cyhal_tdm_t *obj, cyhal_tdm_event_t event, uint8_t intr_priority, bool enable);
521 
522 /** Enables the specified output signal
523  *
524  * @param[in]  obj          The TDM object
525  * @param[in]  output       Which output signal to enable
526  * @param[out] source       Pointer to user-allocated source signal object
527  * which will be initialized by enable_output. \p source should be passed to
528  * (dis)connect_digital functions to (dis)connect the associated endpoints.
529   * @return The status of the output enable
530  */
531 cy_rslt_t cyhal_tdm_enable_output(cyhal_tdm_t *obj, cyhal_tdm_output_t output, cyhal_source_t *source);
532 
533 /** Disables the specified output signal
534  *
535  * @param[in]  obj          The TDM object
536  * @param[in]  output       Which output signal to disable
537  *
538  * @return The status of the disablement
539  */
540 cy_rslt_t cyhal_tdm_disable_output(cyhal_tdm_t *obj, cyhal_tdm_output_t output);
541 
542 #if defined(__cplusplus)
543 }
544 #endif
545 
546 #ifdef CYHAL_TDM_IMPL_HEADER
547 #include CYHAL_TDM_IMPL_HEADER
548 #endif /* CYHAL_TDM_IMPL_HEADER */
549 
550 /** \} group_hal_tdm */
551