1 /***************************************************************************//** 2 * \file cyhal_triggers_tviibe2m.c 3 * 4 * \brief 5 * TVIIBE2M family HAL triggers header 6 * 7 ******************************************************************************** 8 * \copyright 9 * (c) (2016-2024), Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation. 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 #include "cy_device_headers.h" 28 #include "cyhal_hw_types.h" 29 30 #ifdef CY_DEVICE_TVIIBE2M 31 #include "triggers/cyhal_triggers_tviibe2m.h" 32 33 const uint16_t cyhal_sources_per_mux[22] = 34 { 35 55, 61, 5, 92, 100, 137, 84, 9, 11, 238, 189, 12, 64, 64, 64, 12, 12, 4, 4, 16, 4, 8, 36 }; 37 38 const bool cyhal_is_mux_1to1[22] = 39 { 40 false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, 41 }; 42 43 const _cyhal_trigger_source_tviibe2m_t cyhal_mux0_sources[55] = 44 { 45 _CYHAL_TRIGGER_CPUSS_ZERO, 46 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 47 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 48 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 49 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 50 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 51 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 52 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 53 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 54 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 55 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 56 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 57 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 58 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 59 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 60 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 61 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 62 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 63 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 64 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 65 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 66 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 67 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 68 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 69 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 70 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 71 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 72 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 73 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 74 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 75 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 76 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 77 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 78 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 79 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 80 _CYHAL_TRIGGER_EVTGEN0_TR_OUT3, 81 _CYHAL_TRIGGER_EVTGEN0_TR_OUT4, 82 _CYHAL_TRIGGER_EVTGEN0_TR_OUT5, 83 _CYHAL_TRIGGER_EVTGEN0_TR_OUT6, 84 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 85 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 86 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 87 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 88 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 89 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 90 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 91 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 92 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 93 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 94 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 95 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 96 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 97 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 98 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 99 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 100 }; 101 102 const _cyhal_trigger_source_tviibe2m_t cyhal_mux1_sources[61] = 103 { 104 _CYHAL_TRIGGER_CPUSS_ZERO, 105 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 106 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 107 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 108 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 109 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 110 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 111 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 112 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 113 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 114 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 115 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 116 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 117 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 118 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 119 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 120 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 121 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 122 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 123 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 124 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 125 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 126 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 127 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 128 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 129 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 130 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 131 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 132 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 133 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 134 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 135 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 136 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 137 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 138 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 139 _CYHAL_TRIGGER_EVTGEN0_TR_OUT7, 140 _CYHAL_TRIGGER_EVTGEN0_TR_OUT8, 141 _CYHAL_TRIGGER_EVTGEN0_TR_OUT9, 142 _CYHAL_TRIGGER_EVTGEN0_TR_OUT10, 143 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 144 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 145 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 146 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 147 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 148 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 149 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 150 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 151 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 152 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 153 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 154 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 155 _CYHAL_TRIGGER_PERI_TR_IO_INPUT28, 156 _CYHAL_TRIGGER_PERI_TR_IO_INPUT29, 157 _CYHAL_TRIGGER_PERI_TR_IO_INPUT30, 158 _CYHAL_TRIGGER_PERI_TR_IO_INPUT31, 159 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 160 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 161 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 162 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 163 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 164 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 165 }; 166 167 const _cyhal_trigger_source_tviibe2m_t cyhal_mux2_sources[5] = 168 { 169 _CYHAL_TRIGGER_CPUSS_ZERO, 170 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 171 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 172 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 173 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 174 }; 175 176 const _cyhal_trigger_source_tviibe2m_t cyhal_mux3_sources[92] = 177 { 178 _CYHAL_TRIGGER_CPUSS_ZERO, 179 _CYHAL_TRIGGER_TCPWM0_TR_OUT0512, 180 _CYHAL_TRIGGER_TCPWM0_TR_OUT0513, 181 _CYHAL_TRIGGER_TCPWM0_TR_OUT0514, 182 _CYHAL_TRIGGER_TCPWM0_TR_OUT0515, 183 _CYHAL_TRIGGER_TCPWM0_TR_OUT0516, 184 _CYHAL_TRIGGER_TCPWM0_TR_OUT0517, 185 _CYHAL_TRIGGER_TCPWM0_TR_OUT0518, 186 _CYHAL_TRIGGER_TCPWM0_TR_OUT0519, 187 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 188 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 189 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 190 _CYHAL_TRIGGER_TCPWM0_TR_OUT0259, 191 _CYHAL_TRIGGER_TCPWM0_TR_OUT0260, 192 _CYHAL_TRIGGER_TCPWM0_TR_OUT0261, 193 _CYHAL_TRIGGER_TCPWM0_TR_OUT0262, 194 _CYHAL_TRIGGER_TCPWM0_TR_OUT0263, 195 _CYHAL_TRIGGER_TCPWM0_TR_OUT0264, 196 _CYHAL_TRIGGER_TCPWM0_TR_OUT0265, 197 _CYHAL_TRIGGER_TCPWM0_TR_OUT0266, 198 _CYHAL_TRIGGER_TCPWM0_TR_OUT0267, 199 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 200 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 201 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 202 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 203 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 204 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 205 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 206 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 207 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 208 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 209 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 210 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 211 _CYHAL_TRIGGER_TCPWM0_TR_OUT012, 212 _CYHAL_TRIGGER_TCPWM0_TR_OUT013, 213 _CYHAL_TRIGGER_TCPWM0_TR_OUT014, 214 _CYHAL_TRIGGER_TCPWM0_TR_OUT015, 215 _CYHAL_TRIGGER_TCPWM0_TR_OUT016, 216 _CYHAL_TRIGGER_TCPWM0_TR_OUT017, 217 _CYHAL_TRIGGER_TCPWM0_TR_OUT018, 218 _CYHAL_TRIGGER_TCPWM0_TR_OUT019, 219 _CYHAL_TRIGGER_TCPWM0_TR_OUT020, 220 _CYHAL_TRIGGER_TCPWM0_TR_OUT021, 221 _CYHAL_TRIGGER_TCPWM0_TR_OUT022, 222 _CYHAL_TRIGGER_TCPWM0_TR_OUT023, 223 _CYHAL_TRIGGER_TCPWM0_TR_OUT024, 224 _CYHAL_TRIGGER_TCPWM0_TR_OUT025, 225 _CYHAL_TRIGGER_TCPWM0_TR_OUT026, 226 _CYHAL_TRIGGER_TCPWM0_TR_OUT027, 227 _CYHAL_TRIGGER_TCPWM0_TR_OUT028, 228 _CYHAL_TRIGGER_TCPWM0_TR_OUT029, 229 _CYHAL_TRIGGER_TCPWM0_TR_OUT030, 230 _CYHAL_TRIGGER_TCPWM0_TR_OUT031, 231 _CYHAL_TRIGGER_TCPWM0_TR_OUT032, 232 _CYHAL_TRIGGER_TCPWM0_TR_OUT033, 233 _CYHAL_TRIGGER_TCPWM0_TR_OUT034, 234 _CYHAL_TRIGGER_TCPWM0_TR_OUT035, 235 _CYHAL_TRIGGER_TCPWM0_TR_OUT036, 236 _CYHAL_TRIGGER_TCPWM0_TR_OUT037, 237 _CYHAL_TRIGGER_TCPWM0_TR_OUT038, 238 _CYHAL_TRIGGER_TCPWM0_TR_OUT039, 239 _CYHAL_TRIGGER_TCPWM0_TR_OUT040, 240 _CYHAL_TRIGGER_TCPWM0_TR_OUT041, 241 _CYHAL_TRIGGER_TCPWM0_TR_OUT042, 242 _CYHAL_TRIGGER_TCPWM0_TR_OUT043, 243 _CYHAL_TRIGGER_TCPWM0_TR_OUT044, 244 _CYHAL_TRIGGER_TCPWM0_TR_OUT045, 245 _CYHAL_TRIGGER_TCPWM0_TR_OUT046, 246 _CYHAL_TRIGGER_TCPWM0_TR_OUT047, 247 _CYHAL_TRIGGER_TCPWM0_TR_OUT048, 248 _CYHAL_TRIGGER_TCPWM0_TR_OUT049, 249 _CYHAL_TRIGGER_TCPWM0_TR_OUT050, 250 _CYHAL_TRIGGER_TCPWM0_TR_OUT051, 251 _CYHAL_TRIGGER_TCPWM0_TR_OUT052, 252 _CYHAL_TRIGGER_TCPWM0_TR_OUT053, 253 _CYHAL_TRIGGER_TCPWM0_TR_OUT054, 254 _CYHAL_TRIGGER_TCPWM0_TR_OUT055, 255 _CYHAL_TRIGGER_TCPWM0_TR_OUT056, 256 _CYHAL_TRIGGER_TCPWM0_TR_OUT057, 257 _CYHAL_TRIGGER_TCPWM0_TR_OUT058, 258 _CYHAL_TRIGGER_TCPWM0_TR_OUT059, 259 _CYHAL_TRIGGER_TCPWM0_TR_OUT060, 260 _CYHAL_TRIGGER_TCPWM0_TR_OUT061, 261 _CYHAL_TRIGGER_TCPWM0_TR_OUT062, 262 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 263 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 264 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 265 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT3, 266 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 267 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 268 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 269 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT3, 270 }; 271 272 const _cyhal_trigger_source_tviibe2m_t cyhal_mux4_sources[100] = 273 { 274 _CYHAL_TRIGGER_CPUSS_ZERO, 275 _CYHAL_TRIGGER_TCPWM0_TR_OUT0512, 276 _CYHAL_TRIGGER_TCPWM0_TR_OUT0513, 277 _CYHAL_TRIGGER_TCPWM0_TR_OUT0514, 278 _CYHAL_TRIGGER_TCPWM0_TR_OUT0515, 279 _CYHAL_TRIGGER_TCPWM0_TR_OUT0516, 280 _CYHAL_TRIGGER_TCPWM0_TR_OUT0517, 281 _CYHAL_TRIGGER_TCPWM0_TR_OUT0518, 282 _CYHAL_TRIGGER_TCPWM0_TR_OUT0519, 283 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 284 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 285 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 286 _CYHAL_TRIGGER_TCPWM0_TR_OUT0259, 287 _CYHAL_TRIGGER_TCPWM0_TR_OUT0260, 288 _CYHAL_TRIGGER_TCPWM0_TR_OUT0261, 289 _CYHAL_TRIGGER_TCPWM0_TR_OUT0262, 290 _CYHAL_TRIGGER_TCPWM0_TR_OUT0263, 291 _CYHAL_TRIGGER_TCPWM0_TR_OUT0264, 292 _CYHAL_TRIGGER_TCPWM0_TR_OUT0265, 293 _CYHAL_TRIGGER_TCPWM0_TR_OUT0266, 294 _CYHAL_TRIGGER_TCPWM0_TR_OUT0267, 295 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 296 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 297 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 298 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 299 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 300 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 301 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 302 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 303 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 304 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 305 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 306 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 307 _CYHAL_TRIGGER_TCPWM0_TR_OUT012, 308 _CYHAL_TRIGGER_TCPWM0_TR_OUT013, 309 _CYHAL_TRIGGER_TCPWM0_TR_OUT014, 310 _CYHAL_TRIGGER_TCPWM0_TR_OUT015, 311 _CYHAL_TRIGGER_TCPWM0_TR_OUT016, 312 _CYHAL_TRIGGER_TCPWM0_TR_OUT017, 313 _CYHAL_TRIGGER_TCPWM0_TR_OUT018, 314 _CYHAL_TRIGGER_TCPWM0_TR_OUT019, 315 _CYHAL_TRIGGER_TCPWM0_TR_OUT020, 316 _CYHAL_TRIGGER_TCPWM0_TR_OUT021, 317 _CYHAL_TRIGGER_TCPWM0_TR_OUT022, 318 _CYHAL_TRIGGER_TCPWM0_TR_OUT023, 319 _CYHAL_TRIGGER_TCPWM0_TR_OUT024, 320 _CYHAL_TRIGGER_TCPWM0_TR_OUT025, 321 _CYHAL_TRIGGER_TCPWM0_TR_OUT026, 322 _CYHAL_TRIGGER_TCPWM0_TR_OUT027, 323 _CYHAL_TRIGGER_TCPWM0_TR_OUT028, 324 _CYHAL_TRIGGER_TCPWM0_TR_OUT029, 325 _CYHAL_TRIGGER_TCPWM0_TR_OUT030, 326 _CYHAL_TRIGGER_TCPWM0_TR_OUT031, 327 _CYHAL_TRIGGER_TCPWM0_TR_OUT032, 328 _CYHAL_TRIGGER_TCPWM0_TR_OUT033, 329 _CYHAL_TRIGGER_TCPWM0_TR_OUT034, 330 _CYHAL_TRIGGER_TCPWM0_TR_OUT035, 331 _CYHAL_TRIGGER_TCPWM0_TR_OUT036, 332 _CYHAL_TRIGGER_TCPWM0_TR_OUT037, 333 _CYHAL_TRIGGER_TCPWM0_TR_OUT038, 334 _CYHAL_TRIGGER_TCPWM0_TR_OUT039, 335 _CYHAL_TRIGGER_TCPWM0_TR_OUT040, 336 _CYHAL_TRIGGER_TCPWM0_TR_OUT041, 337 _CYHAL_TRIGGER_TCPWM0_TR_OUT042, 338 _CYHAL_TRIGGER_TCPWM0_TR_OUT043, 339 _CYHAL_TRIGGER_TCPWM0_TR_OUT044, 340 _CYHAL_TRIGGER_TCPWM0_TR_OUT045, 341 _CYHAL_TRIGGER_TCPWM0_TR_OUT046, 342 _CYHAL_TRIGGER_TCPWM0_TR_OUT047, 343 _CYHAL_TRIGGER_TCPWM0_TR_OUT048, 344 _CYHAL_TRIGGER_TCPWM0_TR_OUT049, 345 _CYHAL_TRIGGER_TCPWM0_TR_OUT050, 346 _CYHAL_TRIGGER_TCPWM0_TR_OUT051, 347 _CYHAL_TRIGGER_TCPWM0_TR_OUT052, 348 _CYHAL_TRIGGER_TCPWM0_TR_OUT053, 349 _CYHAL_TRIGGER_TCPWM0_TR_OUT054, 350 _CYHAL_TRIGGER_TCPWM0_TR_OUT055, 351 _CYHAL_TRIGGER_TCPWM0_TR_OUT056, 352 _CYHAL_TRIGGER_TCPWM0_TR_OUT057, 353 _CYHAL_TRIGGER_TCPWM0_TR_OUT058, 354 _CYHAL_TRIGGER_TCPWM0_TR_OUT059, 355 _CYHAL_TRIGGER_TCPWM0_TR_OUT060, 356 _CYHAL_TRIGGER_TCPWM0_TR_OUT061, 357 _CYHAL_TRIGGER_TCPWM0_TR_OUT062, 358 _CYHAL_TRIGGER_TCPWM0_TR_OUT10, 359 _CYHAL_TRIGGER_TCPWM0_TR_OUT11, 360 _CYHAL_TRIGGER_TCPWM0_TR_OUT12, 361 _CYHAL_TRIGGER_TCPWM0_TR_OUT13, 362 _CYHAL_TRIGGER_TCPWM0_TR_OUT14, 363 _CYHAL_TRIGGER_TCPWM0_TR_OUT15, 364 _CYHAL_TRIGGER_TCPWM0_TR_OUT16, 365 _CYHAL_TRIGGER_TCPWM0_TR_OUT17, 366 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 367 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 368 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 369 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT3, 370 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 371 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 372 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 373 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT3, 374 }; 375 376 const _cyhal_trigger_source_tviibe2m_t cyhal_mux5_sources[137] = 377 { 378 _CYHAL_TRIGGER_CPUSS_ZERO, 379 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 380 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 381 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 382 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 383 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 384 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 385 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 386 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 387 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 388 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 389 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 390 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 391 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 392 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 393 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 394 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 395 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 396 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 397 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 398 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 399 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 400 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 401 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 402 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 403 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 404 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 405 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 406 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 407 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 408 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 409 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 410 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 411 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 412 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 413 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 414 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 415 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 416 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 417 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 418 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 419 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 420 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 421 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 422 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 423 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 424 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 425 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 426 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 427 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 428 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 429 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 430 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 431 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 432 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 433 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 434 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 435 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 436 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 437 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 438 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 439 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 440 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 441 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 442 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 443 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 444 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 445 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 446 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 447 _CYHAL_TRIGGER_PERI_TR_IO_INPUT28, 448 _CYHAL_TRIGGER_PERI_TR_IO_INPUT29, 449 _CYHAL_TRIGGER_PERI_TR_IO_INPUT30, 450 _CYHAL_TRIGGER_PERI_TR_IO_INPUT31, 451 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 452 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 453 _CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, 454 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 455 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 456 _CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, 457 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 458 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 459 _CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, 460 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 461 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 462 _CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, 463 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 464 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 465 _CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, 466 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 467 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 468 _CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, 469 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 470 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 471 _CYHAL_TRIGGER_SCB6_TR_I2C_SCL_FILTERED, 472 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 473 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 474 _CYHAL_TRIGGER_SCB7_TR_I2C_SCL_FILTERED, 475 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0, 476 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1, 477 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ2, 478 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ3, 479 _CYHAL_TRIGGER_CANFD0_TR_FIFO00, 480 _CYHAL_TRIGGER_CANFD0_TR_FIFO01, 481 _CYHAL_TRIGGER_CANFD0_TR_FIFO02, 482 _CYHAL_TRIGGER_CANFD0_TR_FIFO03, 483 _CYHAL_TRIGGER_CANFD0_TR_FIFO10, 484 _CYHAL_TRIGGER_CANFD0_TR_FIFO11, 485 _CYHAL_TRIGGER_CANFD0_TR_FIFO12, 486 _CYHAL_TRIGGER_CANFD0_TR_FIFO13, 487 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ0, 488 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ1, 489 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ2, 490 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ3, 491 _CYHAL_TRIGGER_CANFD1_TR_FIFO00, 492 _CYHAL_TRIGGER_CANFD1_TR_FIFO01, 493 _CYHAL_TRIGGER_CANFD1_TR_FIFO02, 494 _CYHAL_TRIGGER_CANFD1_TR_FIFO03, 495 _CYHAL_TRIGGER_CANFD1_TR_FIFO10, 496 _CYHAL_TRIGGER_CANFD1_TR_FIFO11, 497 _CYHAL_TRIGGER_CANFD1_TR_FIFO12, 498 _CYHAL_TRIGGER_CANFD1_TR_FIFO13, 499 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ0, 500 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ1, 501 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ2, 502 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ3, 503 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ0, 504 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ1, 505 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ2, 506 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ3, 507 _CYHAL_TRIGGER_EVTGEN0_TR_OUT3, 508 _CYHAL_TRIGGER_EVTGEN0_TR_OUT4, 509 _CYHAL_TRIGGER_EVTGEN0_TR_OUT5, 510 _CYHAL_TRIGGER_EVTGEN0_TR_OUT6, 511 _CYHAL_TRIGGER_EVTGEN0_TR_OUT7, 512 _CYHAL_TRIGGER_EVTGEN0_TR_OUT8, 513 _CYHAL_TRIGGER_EVTGEN0_TR_OUT9, 514 _CYHAL_TRIGGER_EVTGEN0_TR_OUT10, 515 }; 516 517 const _cyhal_trigger_source_tviibe2m_t cyhal_mux6_sources[84] = 518 { 519 _CYHAL_TRIGGER_CPUSS_ZERO, 520 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 521 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 522 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 523 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 524 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 525 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 526 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 527 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 528 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 529 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 530 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 531 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 532 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 533 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 534 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 535 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 536 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 537 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 538 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 539 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 540 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 541 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 542 _CYHAL_TRIGGER_EVTGEN0_TR_OUT0, 543 _CYHAL_TRIGGER_EVTGEN0_TR_OUT1, 544 _CYHAL_TRIGGER_EVTGEN0_TR_OUT2, 545 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 546 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 547 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 548 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 549 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 550 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 551 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 552 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 553 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 554 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 555 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 556 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 557 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 558 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 559 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 560 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 561 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 562 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 563 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 564 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 565 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 566 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 567 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 568 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 569 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 570 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 571 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 572 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 573 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 574 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 575 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 576 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 577 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 578 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 579 _CYHAL_TRIGGER_PERI_TR_IO_INPUT28, 580 _CYHAL_TRIGGER_PERI_TR_IO_INPUT29, 581 _CYHAL_TRIGGER_PERI_TR_IO_INPUT30, 582 _CYHAL_TRIGGER_PERI_TR_IO_INPUT31, 583 _CYHAL_TRIGGER_TCPWM0_TR_OUT1512, 584 _CYHAL_TRIGGER_TCPWM0_TR_OUT1513, 585 _CYHAL_TRIGGER_TCPWM0_TR_OUT1514, 586 _CYHAL_TRIGGER_TCPWM0_TR_OUT1515, 587 _CYHAL_TRIGGER_TCPWM0_TR_OUT1516, 588 _CYHAL_TRIGGER_TCPWM0_TR_OUT1517, 589 _CYHAL_TRIGGER_TCPWM0_TR_OUT1518, 590 _CYHAL_TRIGGER_TCPWM0_TR_OUT1519, 591 _CYHAL_TRIGGER_TCPWM0_TR_OUT1256, 592 _CYHAL_TRIGGER_TCPWM0_TR_OUT1257, 593 _CYHAL_TRIGGER_TCPWM0_TR_OUT1258, 594 _CYHAL_TRIGGER_TCPWM0_TR_OUT1259, 595 _CYHAL_TRIGGER_TCPWM0_TR_OUT1260, 596 _CYHAL_TRIGGER_TCPWM0_TR_OUT1261, 597 _CYHAL_TRIGGER_TCPWM0_TR_OUT1262, 598 _CYHAL_TRIGGER_TCPWM0_TR_OUT1263, 599 _CYHAL_TRIGGER_TCPWM0_TR_OUT1264, 600 _CYHAL_TRIGGER_TCPWM0_TR_OUT1265, 601 _CYHAL_TRIGGER_TCPWM0_TR_OUT1266, 602 _CYHAL_TRIGGER_TCPWM0_TR_OUT1267, 603 }; 604 605 const _cyhal_trigger_source_tviibe2m_t cyhal_mux7_sources[9] = 606 { 607 _CYHAL_TRIGGER_CPUSS_ZERO, 608 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 609 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 610 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 611 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT3, 612 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 613 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 614 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 615 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT3, 616 }; 617 618 const _cyhal_trigger_source_tviibe2m_t cyhal_mux8_sources[11] = 619 { 620 _CYHAL_TRIGGER_CPUSS_ZERO, 621 _CYHAL_TRIGGER_TR_GROUP9_OUTPUT0, 622 _CYHAL_TRIGGER_TR_GROUP9_OUTPUT1, 623 _CYHAL_TRIGGER_TR_GROUP9_OUTPUT2, 624 _CYHAL_TRIGGER_TR_GROUP9_OUTPUT3, 625 _CYHAL_TRIGGER_TR_GROUP9_OUTPUT4, 626 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT0, 627 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT1, 628 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT2, 629 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT3, 630 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT4, 631 }; 632 633 const _cyhal_trigger_source_tviibe2m_t cyhal_mux9_sources[238] = 634 { 635 _CYHAL_TRIGGER_CPUSS_ZERO, 636 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 637 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 638 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 639 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 640 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 641 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 642 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 643 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 644 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 645 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 646 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 647 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 648 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 649 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 650 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 651 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 652 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT16, 653 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT17, 654 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT18, 655 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT19, 656 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT20, 657 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT21, 658 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT22, 659 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT23, 660 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT24, 661 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT25, 662 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT26, 663 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT27, 664 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT28, 665 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT29, 666 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT30, 667 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT31, 668 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT32, 669 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT33, 670 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT34, 671 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT35, 672 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT36, 673 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT37, 674 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT38, 675 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT39, 676 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT40, 677 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT41, 678 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT42, 679 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT43, 680 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT44, 681 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT45, 682 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT46, 683 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT47, 684 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT48, 685 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT49, 686 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT50, 687 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT51, 688 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT52, 689 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT53, 690 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT54, 691 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT55, 692 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT56, 693 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT57, 694 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT58, 695 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT59, 696 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT60, 697 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT61, 698 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT62, 699 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT63, 700 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT64, 701 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT65, 702 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT66, 703 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT67, 704 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT68, 705 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT69, 706 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT70, 707 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT71, 708 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT72, 709 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT73, 710 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT74, 711 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT75, 712 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT76, 713 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT77, 714 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT78, 715 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT79, 716 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT80, 717 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT81, 718 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT82, 719 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT83, 720 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT84, 721 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT85, 722 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT86, 723 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT87, 724 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT88, 725 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT89, 726 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT90, 727 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT91, 728 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 729 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 730 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 731 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 732 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 733 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 734 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 735 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 736 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 737 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 738 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 739 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 740 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 741 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 742 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 743 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 744 _CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, 745 _CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, 746 _CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, 747 _CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, 748 _CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, 749 _CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, 750 _CYHAL_TRIGGER_SCB6_TR_I2C_SCL_FILTERED, 751 _CYHAL_TRIGGER_SCB7_TR_I2C_SCL_FILTERED, 752 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0, 753 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1, 754 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ2, 755 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ3, 756 _CYHAL_TRIGGER_CANFD0_TR_FIFO00, 757 _CYHAL_TRIGGER_CANFD0_TR_FIFO01, 758 _CYHAL_TRIGGER_CANFD0_TR_FIFO02, 759 _CYHAL_TRIGGER_CANFD0_TR_FIFO03, 760 _CYHAL_TRIGGER_CANFD0_TR_FIFO10, 761 _CYHAL_TRIGGER_CANFD0_TR_FIFO11, 762 _CYHAL_TRIGGER_CANFD0_TR_FIFO12, 763 _CYHAL_TRIGGER_CANFD0_TR_FIFO13, 764 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 765 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 766 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 767 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT3, 768 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ0, 769 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ1, 770 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ2, 771 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ3, 772 _CYHAL_TRIGGER_CANFD1_TR_FIFO00, 773 _CYHAL_TRIGGER_CANFD1_TR_FIFO01, 774 _CYHAL_TRIGGER_CANFD1_TR_FIFO02, 775 _CYHAL_TRIGGER_CANFD1_TR_FIFO03, 776 _CYHAL_TRIGGER_CANFD1_TR_FIFO10, 777 _CYHAL_TRIGGER_CANFD1_TR_FIFO11, 778 _CYHAL_TRIGGER_CANFD1_TR_FIFO12, 779 _CYHAL_TRIGGER_CANFD1_TR_FIFO13, 780 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 781 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 782 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 783 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT3, 784 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 785 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 786 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 787 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 788 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 789 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 790 _CYHAL_TRIGGER_TCPWM0_TR_OUT0512, 791 _CYHAL_TRIGGER_TCPWM0_TR_OUT0513, 792 _CYHAL_TRIGGER_TCPWM0_TR_OUT0514, 793 _CYHAL_TRIGGER_TCPWM0_TR_OUT0515, 794 _CYHAL_TRIGGER_TCPWM0_TR_OUT0516, 795 _CYHAL_TRIGGER_TCPWM0_TR_OUT0517, 796 _CYHAL_TRIGGER_TCPWM0_TR_OUT0518, 797 _CYHAL_TRIGGER_TCPWM0_TR_OUT0519, 798 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 799 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 800 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 801 _CYHAL_TRIGGER_TCPWM0_TR_OUT0259, 802 _CYHAL_TRIGGER_TCPWM0_TR_OUT0260, 803 _CYHAL_TRIGGER_TCPWM0_TR_OUT0261, 804 _CYHAL_TRIGGER_TCPWM0_TR_OUT0262, 805 _CYHAL_TRIGGER_TCPWM0_TR_OUT0263, 806 _CYHAL_TRIGGER_TCPWM0_TR_OUT0264, 807 _CYHAL_TRIGGER_TCPWM0_TR_OUT0265, 808 _CYHAL_TRIGGER_TCPWM0_TR_OUT0266, 809 _CYHAL_TRIGGER_TCPWM0_TR_OUT0267, 810 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 811 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 812 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 813 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 814 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 815 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 816 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 817 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 818 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 819 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 820 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 821 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 822 _CYHAL_TRIGGER_TCPWM0_TR_OUT012, 823 _CYHAL_TRIGGER_TCPWM0_TR_OUT013, 824 _CYHAL_TRIGGER_TCPWM0_TR_OUT014, 825 _CYHAL_TRIGGER_TCPWM0_TR_OUT015, 826 _CYHAL_TRIGGER_TCPWM0_TR_OUT016, 827 _CYHAL_TRIGGER_TCPWM0_TR_OUT017, 828 _CYHAL_TRIGGER_TCPWM0_TR_OUT018, 829 _CYHAL_TRIGGER_TCPWM0_TR_OUT019, 830 _CYHAL_TRIGGER_TCPWM0_TR_OUT020, 831 _CYHAL_TRIGGER_TCPWM0_TR_OUT021, 832 _CYHAL_TRIGGER_TCPWM0_TR_OUT022, 833 _CYHAL_TRIGGER_TCPWM0_TR_OUT023, 834 _CYHAL_TRIGGER_TCPWM0_TR_OUT024, 835 _CYHAL_TRIGGER_TCPWM0_TR_OUT025, 836 _CYHAL_TRIGGER_TCPWM0_TR_OUT026, 837 _CYHAL_TRIGGER_TCPWM0_TR_OUT027, 838 _CYHAL_TRIGGER_TCPWM0_TR_OUT028, 839 _CYHAL_TRIGGER_TCPWM0_TR_OUT029, 840 _CYHAL_TRIGGER_TCPWM0_TR_OUT030, 841 _CYHAL_TRIGGER_TCPWM0_TR_OUT031, 842 _CYHAL_TRIGGER_TCPWM0_TR_OUT032, 843 _CYHAL_TRIGGER_TCPWM0_TR_OUT033, 844 _CYHAL_TRIGGER_TCPWM0_TR_OUT034, 845 _CYHAL_TRIGGER_TCPWM0_TR_OUT035, 846 _CYHAL_TRIGGER_TCPWM0_TR_OUT036, 847 _CYHAL_TRIGGER_TCPWM0_TR_OUT037, 848 _CYHAL_TRIGGER_TCPWM0_TR_OUT038, 849 _CYHAL_TRIGGER_TCPWM0_TR_OUT039, 850 _CYHAL_TRIGGER_TCPWM0_TR_OUT040, 851 _CYHAL_TRIGGER_TCPWM0_TR_OUT041, 852 _CYHAL_TRIGGER_TCPWM0_TR_OUT042, 853 _CYHAL_TRIGGER_TCPWM0_TR_OUT043, 854 _CYHAL_TRIGGER_TCPWM0_TR_OUT044, 855 _CYHAL_TRIGGER_TCPWM0_TR_OUT045, 856 _CYHAL_TRIGGER_TCPWM0_TR_OUT046, 857 _CYHAL_TRIGGER_TCPWM0_TR_OUT047, 858 _CYHAL_TRIGGER_TCPWM0_TR_OUT048, 859 _CYHAL_TRIGGER_TCPWM0_TR_OUT049, 860 _CYHAL_TRIGGER_TCPWM0_TR_OUT050, 861 _CYHAL_TRIGGER_TCPWM0_TR_OUT051, 862 _CYHAL_TRIGGER_TCPWM0_TR_OUT052, 863 _CYHAL_TRIGGER_TCPWM0_TR_OUT053, 864 _CYHAL_TRIGGER_TCPWM0_TR_OUT054, 865 _CYHAL_TRIGGER_TCPWM0_TR_OUT055, 866 _CYHAL_TRIGGER_TCPWM0_TR_OUT056, 867 _CYHAL_TRIGGER_TCPWM0_TR_OUT057, 868 _CYHAL_TRIGGER_TCPWM0_TR_OUT058, 869 _CYHAL_TRIGGER_TCPWM0_TR_OUT059, 870 _CYHAL_TRIGGER_TCPWM0_TR_OUT060, 871 _CYHAL_TRIGGER_TCPWM0_TR_OUT061, 872 _CYHAL_TRIGGER_TCPWM0_TR_OUT062, 873 }; 874 875 const _cyhal_trigger_source_tviibe2m_t cyhal_mux10_sources[189] = 876 { 877 _CYHAL_TRIGGER_CPUSS_ZERO, 878 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 879 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 880 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 881 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 882 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 883 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 884 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 885 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 886 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8, 887 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9, 888 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10, 889 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11, 890 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12, 891 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13, 892 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14, 893 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15, 894 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT16, 895 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT17, 896 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT18, 897 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT19, 898 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT20, 899 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT21, 900 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT22, 901 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT23, 902 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT24, 903 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT25, 904 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT26, 905 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT27, 906 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT28, 907 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT29, 908 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT30, 909 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT31, 910 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT32, 911 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT33, 912 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT34, 913 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT35, 914 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT36, 915 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT37, 916 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT38, 917 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT39, 918 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT40, 919 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT41, 920 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT42, 921 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT43, 922 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 923 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 924 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 925 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 926 _CYHAL_TRIGGER_TCPWM0_TR_OUT1512, 927 _CYHAL_TRIGGER_TCPWM0_TR_OUT1513, 928 _CYHAL_TRIGGER_TCPWM0_TR_OUT1514, 929 _CYHAL_TRIGGER_TCPWM0_TR_OUT1515, 930 _CYHAL_TRIGGER_TCPWM0_TR_OUT1516, 931 _CYHAL_TRIGGER_TCPWM0_TR_OUT1517, 932 _CYHAL_TRIGGER_TCPWM0_TR_OUT1518, 933 _CYHAL_TRIGGER_TCPWM0_TR_OUT1519, 934 _CYHAL_TRIGGER_TCPWM0_TR_OUT1256, 935 _CYHAL_TRIGGER_TCPWM0_TR_OUT1257, 936 _CYHAL_TRIGGER_TCPWM0_TR_OUT1258, 937 _CYHAL_TRIGGER_TCPWM0_TR_OUT1259, 938 _CYHAL_TRIGGER_TCPWM0_TR_OUT1260, 939 _CYHAL_TRIGGER_TCPWM0_TR_OUT1261, 940 _CYHAL_TRIGGER_TCPWM0_TR_OUT1262, 941 _CYHAL_TRIGGER_TCPWM0_TR_OUT1263, 942 _CYHAL_TRIGGER_TCPWM0_TR_OUT1264, 943 _CYHAL_TRIGGER_TCPWM0_TR_OUT1265, 944 _CYHAL_TRIGGER_TCPWM0_TR_OUT1266, 945 _CYHAL_TRIGGER_TCPWM0_TR_OUT1267, 946 _CYHAL_TRIGGER_TCPWM0_TR_OUT10, 947 _CYHAL_TRIGGER_TCPWM0_TR_OUT11, 948 _CYHAL_TRIGGER_TCPWM0_TR_OUT12, 949 _CYHAL_TRIGGER_TCPWM0_TR_OUT13, 950 _CYHAL_TRIGGER_TCPWM0_TR_OUT14, 951 _CYHAL_TRIGGER_TCPWM0_TR_OUT15, 952 _CYHAL_TRIGGER_TCPWM0_TR_OUT16, 953 _CYHAL_TRIGGER_TCPWM0_TR_OUT17, 954 _CYHAL_TRIGGER_TCPWM0_TR_OUT18, 955 _CYHAL_TRIGGER_TCPWM0_TR_OUT19, 956 _CYHAL_TRIGGER_TCPWM0_TR_OUT110, 957 _CYHAL_TRIGGER_TCPWM0_TR_OUT111, 958 _CYHAL_TRIGGER_TCPWM0_TR_OUT112, 959 _CYHAL_TRIGGER_TCPWM0_TR_OUT113, 960 _CYHAL_TRIGGER_TCPWM0_TR_OUT114, 961 _CYHAL_TRIGGER_TCPWM0_TR_OUT115, 962 _CYHAL_TRIGGER_TCPWM0_TR_OUT116, 963 _CYHAL_TRIGGER_TCPWM0_TR_OUT117, 964 _CYHAL_TRIGGER_TCPWM0_TR_OUT118, 965 _CYHAL_TRIGGER_TCPWM0_TR_OUT119, 966 _CYHAL_TRIGGER_TCPWM0_TR_OUT120, 967 _CYHAL_TRIGGER_TCPWM0_TR_OUT121, 968 _CYHAL_TRIGGER_TCPWM0_TR_OUT122, 969 _CYHAL_TRIGGER_TCPWM0_TR_OUT123, 970 _CYHAL_TRIGGER_TCPWM0_TR_OUT124, 971 _CYHAL_TRIGGER_TCPWM0_TR_OUT125, 972 _CYHAL_TRIGGER_TCPWM0_TR_OUT126, 973 _CYHAL_TRIGGER_TCPWM0_TR_OUT127, 974 _CYHAL_TRIGGER_TCPWM0_TR_OUT128, 975 _CYHAL_TRIGGER_TCPWM0_TR_OUT129, 976 _CYHAL_TRIGGER_TCPWM0_TR_OUT130, 977 _CYHAL_TRIGGER_TCPWM0_TR_OUT131, 978 _CYHAL_TRIGGER_TCPWM0_TR_OUT132, 979 _CYHAL_TRIGGER_TCPWM0_TR_OUT133, 980 _CYHAL_TRIGGER_TCPWM0_TR_OUT134, 981 _CYHAL_TRIGGER_TCPWM0_TR_OUT135, 982 _CYHAL_TRIGGER_TCPWM0_TR_OUT136, 983 _CYHAL_TRIGGER_TCPWM0_TR_OUT137, 984 _CYHAL_TRIGGER_TCPWM0_TR_OUT138, 985 _CYHAL_TRIGGER_TCPWM0_TR_OUT139, 986 _CYHAL_TRIGGER_TCPWM0_TR_OUT140, 987 _CYHAL_TRIGGER_TCPWM0_TR_OUT141, 988 _CYHAL_TRIGGER_TCPWM0_TR_OUT142, 989 _CYHAL_TRIGGER_TCPWM0_TR_OUT143, 990 _CYHAL_TRIGGER_TCPWM0_TR_OUT144, 991 _CYHAL_TRIGGER_TCPWM0_TR_OUT145, 992 _CYHAL_TRIGGER_TCPWM0_TR_OUT146, 993 _CYHAL_TRIGGER_TCPWM0_TR_OUT147, 994 _CYHAL_TRIGGER_TCPWM0_TR_OUT148, 995 _CYHAL_TRIGGER_TCPWM0_TR_OUT149, 996 _CYHAL_TRIGGER_TCPWM0_TR_OUT150, 997 _CYHAL_TRIGGER_TCPWM0_TR_OUT151, 998 _CYHAL_TRIGGER_TCPWM0_TR_OUT152, 999 _CYHAL_TRIGGER_TCPWM0_TR_OUT153, 1000 _CYHAL_TRIGGER_TCPWM0_TR_OUT154, 1001 _CYHAL_TRIGGER_TCPWM0_TR_OUT155, 1002 _CYHAL_TRIGGER_TCPWM0_TR_OUT156, 1003 _CYHAL_TRIGGER_TCPWM0_TR_OUT157, 1004 _CYHAL_TRIGGER_TCPWM0_TR_OUT158, 1005 _CYHAL_TRIGGER_TCPWM0_TR_OUT159, 1006 _CYHAL_TRIGGER_TCPWM0_TR_OUT160, 1007 _CYHAL_TRIGGER_TCPWM0_TR_OUT161, 1008 _CYHAL_TRIGGER_TCPWM0_TR_OUT162, 1009 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 1010 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 1011 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 1012 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 1013 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 1014 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 1015 _CYHAL_TRIGGER_EVTGEN0_TR_OUT0, 1016 _CYHAL_TRIGGER_EVTGEN0_TR_OUT1, 1017 _CYHAL_TRIGGER_EVTGEN0_TR_OUT2, 1018 _CYHAL_TRIGGER_EVTGEN0_TR_OUT3, 1019 _CYHAL_TRIGGER_EVTGEN0_TR_OUT4, 1020 _CYHAL_TRIGGER_EVTGEN0_TR_OUT5, 1021 _CYHAL_TRIGGER_EVTGEN0_TR_OUT6, 1022 _CYHAL_TRIGGER_EVTGEN0_TR_OUT7, 1023 _CYHAL_TRIGGER_EVTGEN0_TR_OUT8, 1024 _CYHAL_TRIGGER_EVTGEN0_TR_OUT9, 1025 _CYHAL_TRIGGER_EVTGEN0_TR_OUT10, 1026 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ0, 1027 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ1, 1028 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ2, 1029 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ3, 1030 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ0, 1031 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ1, 1032 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ2, 1033 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ3, 1034 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 1035 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 1036 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 1037 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 1038 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 1039 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 1040 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 1041 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 1042 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 1043 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 1044 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 1045 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 1046 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 1047 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 1048 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 1049 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 1050 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 1051 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 1052 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 1053 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 1054 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 1055 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 1056 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 1057 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 1058 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 1059 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 1060 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 1061 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 1062 _CYHAL_TRIGGER_PERI_TR_IO_INPUT28, 1063 _CYHAL_TRIGGER_PERI_TR_IO_INPUT29, 1064 _CYHAL_TRIGGER_PERI_TR_IO_INPUT30, 1065 _CYHAL_TRIGGER_PERI_TR_IO_INPUT31, 1066 }; 1067 1068 const _cyhal_trigger_source_tviibe2m_t cyhal_mux11_sources[12] = 1069 { 1070 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 1071 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 1072 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 1073 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 1074 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 1075 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 1076 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 1077 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 1078 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 1079 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 1080 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 1081 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 1082 }; 1083 1084 const _cyhal_trigger_source_tviibe2m_t cyhal_mux12_sources[64] = 1085 { 1086 _CYHAL_TRIGGER_TCPWM0_TR_OUT1256, 1087 _CYHAL_TRIGGER_TCPWM0_TR_OUT1259, 1088 _CYHAL_TRIGGER_TCPWM0_TR_OUT1262, 1089 _CYHAL_TRIGGER_TCPWM0_TR_OUT1265, 1090 _CYHAL_TRIGGER_TCPWM0_TR_OUT10, 1091 _CYHAL_TRIGGER_TCPWM0_TR_OUT11, 1092 _CYHAL_TRIGGER_TCPWM0_TR_OUT12, 1093 _CYHAL_TRIGGER_TCPWM0_TR_OUT13, 1094 _CYHAL_TRIGGER_TCPWM0_TR_OUT14, 1095 _CYHAL_TRIGGER_TCPWM0_TR_OUT15, 1096 _CYHAL_TRIGGER_TCPWM0_TR_OUT16, 1097 _CYHAL_TRIGGER_TCPWM0_TR_OUT17, 1098 _CYHAL_TRIGGER_TCPWM0_TR_OUT18, 1099 _CYHAL_TRIGGER_TCPWM0_TR_OUT19, 1100 _CYHAL_TRIGGER_TCPWM0_TR_OUT110, 1101 _CYHAL_TRIGGER_TCPWM0_TR_OUT111, 1102 _CYHAL_TRIGGER_TCPWM0_TR_OUT112, 1103 _CYHAL_TRIGGER_TCPWM0_TR_OUT113, 1104 _CYHAL_TRIGGER_TCPWM0_TR_OUT114, 1105 _CYHAL_TRIGGER_TCPWM0_TR_OUT115, 1106 _CYHAL_TRIGGER_TCPWM0_TR_OUT116, 1107 _CYHAL_TRIGGER_TCPWM0_TR_OUT117, 1108 _CYHAL_TRIGGER_TCPWM0_TR_OUT118, 1109 _CYHAL_TRIGGER_TCPWM0_TR_OUT119, 1110 _CYHAL_TRIGGER_TCPWM0_TR_OUT1257, 1111 _CYHAL_TRIGGER_TCPWM0_TR_OUT1260, 1112 _CYHAL_TRIGGER_TCPWM0_TR_OUT1263, 1113 _CYHAL_TRIGGER_TCPWM0_TR_OUT1266, 1114 _CYHAL_TRIGGER_TCPWM0_TR_OUT120, 1115 _CYHAL_TRIGGER_TCPWM0_TR_OUT121, 1116 _CYHAL_TRIGGER_TCPWM0_TR_OUT122, 1117 _CYHAL_TRIGGER_TCPWM0_TR_OUT123, 1118 _CYHAL_TRIGGER_TCPWM0_TR_OUT124, 1119 _CYHAL_TRIGGER_TCPWM0_TR_OUT125, 1120 _CYHAL_TRIGGER_TCPWM0_TR_OUT126, 1121 _CYHAL_TRIGGER_TCPWM0_TR_OUT127, 1122 _CYHAL_TRIGGER_TCPWM0_TR_OUT128, 1123 _CYHAL_TRIGGER_TCPWM0_TR_OUT129, 1124 _CYHAL_TRIGGER_TCPWM0_TR_OUT130, 1125 _CYHAL_TRIGGER_TCPWM0_TR_OUT131, 1126 _CYHAL_TRIGGER_TCPWM0_TR_OUT132, 1127 _CYHAL_TRIGGER_TCPWM0_TR_OUT133, 1128 _CYHAL_TRIGGER_TCPWM0_TR_OUT134, 1129 _CYHAL_TRIGGER_TCPWM0_TR_OUT135, 1130 _CYHAL_TRIGGER_TCPWM0_TR_OUT136, 1131 _CYHAL_TRIGGER_TCPWM0_TR_OUT137, 1132 _CYHAL_TRIGGER_TCPWM0_TR_OUT138, 1133 _CYHAL_TRIGGER_TCPWM0_TR_OUT139, 1134 _CYHAL_TRIGGER_TCPWM0_TR_OUT140, 1135 _CYHAL_TRIGGER_TCPWM0_TR_OUT141, 1136 _CYHAL_TRIGGER_TCPWM0_TR_OUT142, 1137 _CYHAL_TRIGGER_TCPWM0_TR_OUT143, 1138 _CYHAL_TRIGGER_TCPWM0_TR_OUT144, 1139 _CYHAL_TRIGGER_TCPWM0_TR_OUT145, 1140 _CYHAL_TRIGGER_TCPWM0_TR_OUT146, 1141 _CYHAL_TRIGGER_TCPWM0_TR_OUT147, 1142 _CYHAL_TRIGGER_TCPWM0_TR_OUT1258, 1143 _CYHAL_TRIGGER_TCPWM0_TR_OUT1261, 1144 _CYHAL_TRIGGER_TCPWM0_TR_OUT1264, 1145 _CYHAL_TRIGGER_TCPWM0_TR_OUT1267, 1146 _CYHAL_TRIGGER_TCPWM0_TR_OUT148, 1147 _CYHAL_TRIGGER_TCPWM0_TR_OUT149, 1148 _CYHAL_TRIGGER_TCPWM0_TR_OUT150, 1149 _CYHAL_TRIGGER_TCPWM0_TR_OUT151, 1150 }; 1151 1152 const _cyhal_trigger_source_tviibe2m_t cyhal_mux13_sources[64] = 1153 { 1154 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE0, 1155 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE1, 1156 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE2, 1157 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE3, 1158 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE4, 1159 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE5, 1160 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE6, 1161 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE7, 1162 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE8, 1163 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE9, 1164 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE10, 1165 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE11, 1166 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE12, 1167 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE13, 1168 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE14, 1169 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE15, 1170 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE16, 1171 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE17, 1172 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE18, 1173 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE19, 1174 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE20, 1175 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE21, 1176 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE22, 1177 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE23, 1178 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE32, 1179 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE33, 1180 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE34, 1181 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE35, 1182 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE36, 1183 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE37, 1184 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE38, 1185 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE39, 1186 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE40, 1187 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE41, 1188 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE42, 1189 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE43, 1190 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE44, 1191 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE45, 1192 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE46, 1193 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE47, 1194 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE48, 1195 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE49, 1196 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE50, 1197 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE51, 1198 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE52, 1199 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE53, 1200 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE54, 1201 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE55, 1202 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE56, 1203 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE57, 1204 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE58, 1205 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE59, 1206 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE60, 1207 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE61, 1208 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE62, 1209 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE63, 1210 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE64, 1211 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE65, 1212 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE66, 1213 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE67, 1214 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE68, 1215 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE69, 1216 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE70, 1217 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE71, 1218 }; 1219 1220 const _cyhal_trigger_source_tviibe2m_t cyhal_mux14_sources[64] = 1221 { 1222 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO0, 1223 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO1, 1224 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO2, 1225 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO3, 1226 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO4, 1227 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO5, 1228 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO6, 1229 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO7, 1230 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO8, 1231 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO9, 1232 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO10, 1233 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO11, 1234 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO12, 1235 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO13, 1236 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO14, 1237 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO15, 1238 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO16, 1239 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO17, 1240 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO18, 1241 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO19, 1242 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO20, 1243 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO21, 1244 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO22, 1245 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO23, 1246 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO32, 1247 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO33, 1248 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO34, 1249 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO35, 1250 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO36, 1251 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO37, 1252 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO38, 1253 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO39, 1254 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO40, 1255 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO41, 1256 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO42, 1257 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO43, 1258 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO44, 1259 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO45, 1260 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO46, 1261 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO47, 1262 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO48, 1263 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO49, 1264 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO50, 1265 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO51, 1266 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO52, 1267 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO53, 1268 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO54, 1269 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO55, 1270 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO56, 1271 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO57, 1272 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO58, 1273 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO59, 1274 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO60, 1275 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO61, 1276 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO62, 1277 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO63, 1278 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO64, 1279 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO65, 1280 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO66, 1281 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO67, 1282 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO68, 1283 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO69, 1284 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO70, 1285 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO71, 1286 }; 1287 1288 const _cyhal_trigger_source_tviibe2m_t cyhal_mux15_sources[12] = 1289 { 1290 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0, 1291 _CYHAL_TRIGGER_CANFD0_TR_FIFO00, 1292 _CYHAL_TRIGGER_CANFD0_TR_FIFO10, 1293 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1, 1294 _CYHAL_TRIGGER_CANFD0_TR_FIFO01, 1295 _CYHAL_TRIGGER_CANFD0_TR_FIFO11, 1296 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ2, 1297 _CYHAL_TRIGGER_CANFD0_TR_FIFO02, 1298 _CYHAL_TRIGGER_CANFD0_TR_FIFO12, 1299 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ3, 1300 _CYHAL_TRIGGER_CANFD0_TR_FIFO03, 1301 _CYHAL_TRIGGER_CANFD0_TR_FIFO13, 1302 }; 1303 1304 const _cyhal_trigger_source_tviibe2m_t cyhal_mux16_sources[12] = 1305 { 1306 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ0, 1307 _CYHAL_TRIGGER_CANFD1_TR_FIFO00, 1308 _CYHAL_TRIGGER_CANFD1_TR_FIFO10, 1309 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ1, 1310 _CYHAL_TRIGGER_CANFD1_TR_FIFO01, 1311 _CYHAL_TRIGGER_CANFD1_TR_FIFO11, 1312 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ2, 1313 _CYHAL_TRIGGER_CANFD1_TR_FIFO02, 1314 _CYHAL_TRIGGER_CANFD1_TR_FIFO12, 1315 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ3, 1316 _CYHAL_TRIGGER_CANFD1_TR_FIFO03, 1317 _CYHAL_TRIGGER_CANFD1_TR_FIFO13, 1318 }; 1319 1320 const _cyhal_trigger_source_tviibe2m_t cyhal_mux17_sources[4] = 1321 { 1322 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT16, 1323 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT19, 1324 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT22, 1325 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT25, 1326 }; 1327 1328 const _cyhal_trigger_source_tviibe2m_t cyhal_mux18_sources[4] = 1329 { 1330 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT24, 1331 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT27, 1332 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT30, 1333 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT33, 1334 }; 1335 1336 const _cyhal_trigger_source_tviibe2m_t cyhal_mux19_sources[16] = 1337 { 1338 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 1339 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 1340 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 1341 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 1342 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 1343 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 1344 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 1345 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 1346 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 1347 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 1348 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 1349 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 1350 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 1351 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 1352 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 1353 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 1354 }; 1355 1356 const _cyhal_trigger_source_tviibe2m_t cyhal_mux20_sources[4] = 1357 { 1358 _CYHAL_TRIGGER_TCPWM0_TR_OUT016, 1359 _CYHAL_TRIGGER_TCPWM0_TR_OUT017, 1360 _CYHAL_TRIGGER_TCPWM0_TR_OUT018, 1361 _CYHAL_TRIGGER_TCPWM0_TR_OUT019, 1362 }; 1363 1364 const _cyhal_trigger_source_tviibe2m_t cyhal_mux21_sources[8] = 1365 { 1366 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ0, 1367 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ1, 1368 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ2, 1369 _CYHAL_TRIGGER_CXPI0_TR_TX_REQ3, 1370 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ0, 1371 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ1, 1372 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ2, 1373 _CYHAL_TRIGGER_CXPI0_TR_RX_REQ3, 1374 }; 1375 1376 const _cyhal_trigger_source_tviibe2m_t* cyhal_mux_to_sources[22] = 1377 { 1378 cyhal_mux0_sources, 1379 cyhal_mux1_sources, 1380 cyhal_mux2_sources, 1381 cyhal_mux3_sources, 1382 cyhal_mux4_sources, 1383 cyhal_mux5_sources, 1384 cyhal_mux6_sources, 1385 cyhal_mux7_sources, 1386 cyhal_mux8_sources, 1387 cyhal_mux9_sources, 1388 cyhal_mux10_sources, 1389 cyhal_mux11_sources, 1390 cyhal_mux12_sources, 1391 cyhal_mux13_sources, 1392 cyhal_mux14_sources, 1393 cyhal_mux15_sources, 1394 cyhal_mux16_sources, 1395 cyhal_mux17_sources, 1396 cyhal_mux18_sources, 1397 cyhal_mux19_sources, 1398 cyhal_mux20_sources, 1399 cyhal_mux21_sources, 1400 }; 1401 1402 const uint8_t cyhal_dest_to_mux[359] = 1403 { 1404 134, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK0 */ 1405 134, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK1 */ 1406 134, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK2 */ 1407 134, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK3 */ 1408 135, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK0 */ 1409 135, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK1 */ 1410 135, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK2 */ 1411 135, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK3 */ 1412 7, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN0 */ 1413 7, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN1 */ 1414 7, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN2 */ 1415 7, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN3 */ 1416 7, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN0 */ 1417 7, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN1 */ 1418 7, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN2 */ 1419 7, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN3 */ 1420 8, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN0 */ 1421 8, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN1 */ 1422 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN0 */ 1423 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN1 */ 1424 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN2 */ 1425 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN3 */ 1426 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 */ 1427 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN1 */ 1428 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN2 */ 1429 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN3 */ 1430 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN4 */ 1431 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN5 */ 1432 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN6 */ 1433 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN7 */ 1434 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN8 */ 1435 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN9 */ 1436 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN10 */ 1437 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN11 */ 1438 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN12 */ 1439 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN13 */ 1440 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN14 */ 1441 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN15 */ 1442 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN16 */ 1443 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN17 */ 1444 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN18 */ 1445 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN19 */ 1446 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN20 */ 1447 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN21 */ 1448 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN22 */ 1449 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN23 */ 1450 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN24 */ 1451 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN25 */ 1452 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN26 */ 1453 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN27 */ 1454 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN28 */ 1455 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN29 */ 1456 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN30 */ 1457 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN31 */ 1458 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN32 */ 1459 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN33 */ 1460 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN34 */ 1461 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN35 */ 1462 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN36 */ 1463 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN37 */ 1464 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN38 */ 1465 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN39 */ 1466 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN40 */ 1467 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN41 */ 1468 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN42 */ 1469 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN43 */ 1470 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN44 */ 1471 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN45 */ 1472 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN46 */ 1473 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN47 */ 1474 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN48 */ 1475 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN49 */ 1476 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN50 */ 1477 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN51 */ 1478 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN52 */ 1479 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN53 */ 1480 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN54 */ 1481 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN55 */ 1482 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN56 */ 1483 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN57 */ 1484 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN58 */ 1485 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN59 */ 1486 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN60 */ 1487 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN61 */ 1488 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN62 */ 1489 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN63 */ 1490 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN64 */ 1491 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN65 */ 1492 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN66 */ 1493 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN67 */ 1494 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN68 */ 1495 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN69 */ 1496 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN70 */ 1497 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN71 */ 1498 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN72 */ 1499 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN73 */ 1500 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN74 */ 1501 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN75 */ 1502 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN76 */ 1503 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN77 */ 1504 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN78 */ 1505 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN79 */ 1506 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN80 */ 1507 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN81 */ 1508 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN82 */ 1509 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN83 */ 1510 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN84 */ 1511 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN85 */ 1512 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN86 */ 1513 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN87 */ 1514 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN88 */ 1515 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN89 */ 1516 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN90 */ 1517 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN91 */ 1518 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN0 */ 1519 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN1 */ 1520 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN2 */ 1521 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN3 */ 1522 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN4 */ 1523 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN5 */ 1524 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN6 */ 1525 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN7 */ 1526 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN8 */ 1527 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN9 */ 1528 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN10 */ 1529 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN11 */ 1530 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN12 */ 1531 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN13 */ 1532 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN14 */ 1533 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN15 */ 1534 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN16 */ 1535 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN17 */ 1536 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN18 */ 1537 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN19 */ 1538 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN20 */ 1539 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN21 */ 1540 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN22 */ 1541 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN23 */ 1542 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN24 */ 1543 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN25 */ 1544 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN26 */ 1545 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN27 */ 1546 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN28 */ 1547 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN29 */ 1548 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN30 */ 1549 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN31 */ 1550 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN32 */ 1551 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN33 */ 1552 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN34 */ 1553 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN35 */ 1554 138, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN36 */ 1555 138, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN37 */ 1556 138, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN38 */ 1557 138, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN39 */ 1558 138, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN40 */ 1559 138, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN41 */ 1560 138, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN42 */ 1561 138, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN43 */ 1562 137, /* CYHAL_TRIGGER_CXPI0_TR_CMD_TX_HEADER0 */ 1563 137, /* CYHAL_TRIGGER_CXPI0_TR_CMD_TX_HEADER1 */ 1564 137, /* CYHAL_TRIGGER_CXPI0_TR_CMD_TX_HEADER2 */ 1565 137, /* CYHAL_TRIGGER_CXPI0_TR_CMD_TX_HEADER3 */ 1566 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER0 */ 1567 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER1 */ 1568 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER2 */ 1569 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER3 */ 1570 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER4 */ 1571 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER5 */ 1572 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER6 */ 1573 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER7 */ 1574 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER8 */ 1575 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER9 */ 1576 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER10 */ 1577 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER11 */ 1578 8, /* CYHAL_TRIGGER_PASS0_TR_DEBUG_FREEZE */ 1579 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN0 */ 1580 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN1 */ 1581 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN2 */ 1582 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN3 */ 1583 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN4 */ 1584 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN5 */ 1585 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN6 */ 1586 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN7 */ 1587 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN8 */ 1588 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN9 */ 1589 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN10 */ 1590 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN11 */ 1591 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN12 */ 1592 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN13 */ 1593 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN14 */ 1594 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN15 */ 1595 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN16 */ 1596 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN17 */ 1597 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN18 */ 1598 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN19 */ 1599 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN20 */ 1600 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN21 */ 1601 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN22 */ 1602 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN23 */ 1603 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN32 */ 1604 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN33 */ 1605 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN34 */ 1606 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN35 */ 1607 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN36 */ 1608 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN37 */ 1609 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN38 */ 1610 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN39 */ 1611 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN40 */ 1612 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN41 */ 1613 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN42 */ 1614 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN43 */ 1615 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN44 */ 1616 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN45 */ 1617 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN46 */ 1618 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN47 */ 1619 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN48 */ 1620 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN49 */ 1621 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN50 */ 1622 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN51 */ 1623 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN52 */ 1624 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN53 */ 1625 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN54 */ 1626 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN55 */ 1627 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN56 */ 1628 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN57 */ 1629 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN58 */ 1630 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN59 */ 1631 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN60 */ 1632 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN61 */ 1633 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN62 */ 1634 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN63 */ 1635 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN64 */ 1636 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN65 */ 1637 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN66 */ 1638 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN67 */ 1639 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN68 */ 1640 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN69 */ 1641 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN70 */ 1642 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN71 */ 1643 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN0 */ 1644 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN1 */ 1645 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN2 */ 1646 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN3 */ 1647 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN4 */ 1648 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN5 */ 1649 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN6 */ 1650 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN7 */ 1651 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN8 */ 1652 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN9 */ 1653 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN10 */ 1654 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN11 */ 1655 8, /* CYHAL_TRIGGER_PERI_TR_DBG_FREEZE */ 1656 8, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT0 */ 1657 8, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT1 */ 1658 8, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT0 */ 1659 8, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT1 */ 1660 8, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_WDT */ 1661 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN0 */ 1662 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN1 */ 1663 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN2 */ 1664 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN3 */ 1665 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN4 */ 1666 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN5 */ 1667 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN6 */ 1668 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN7 */ 1669 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN8 */ 1670 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN9 */ 1671 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN10 */ 1672 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN11 */ 1673 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN12 */ 1674 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN13 */ 1675 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN14 */ 1676 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN15 */ 1677 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN16 */ 1678 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN17 */ 1679 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN18 */ 1680 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN19 */ 1681 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN20 */ 1682 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN21 */ 1683 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN22 */ 1684 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN23 */ 1685 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN24 */ 1686 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN25 */ 1687 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN26 */ 1688 8, /* CYHAL_TRIGGER_TCPWM0_TR_DEBUG_FREEZE */ 1689 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN2 */ 1690 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN5 */ 1691 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN8 */ 1692 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN11 */ 1693 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN14 */ 1694 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN17 */ 1695 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN20 */ 1696 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN23 */ 1697 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN26 */ 1698 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN29 */ 1699 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN32 */ 1700 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN35 */ 1701 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN38 */ 1702 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN41 */ 1703 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN44 */ 1704 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN47 */ 1705 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN50 */ 1706 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN53 */ 1707 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN56 */ 1708 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN59 */ 1709 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN62 */ 1710 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN65 */ 1711 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN68 */ 1712 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN71 */ 1713 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN74 */ 1714 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN77 */ 1715 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN80 */ 1716 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN83 */ 1717 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN86 */ 1718 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN89 */ 1719 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN92 */ 1720 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN95 */ 1721 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN98 */ 1722 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN101 */ 1723 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN104 */ 1724 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN107 */ 1725 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN110 */ 1726 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN113 */ 1727 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN116 */ 1728 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN119 */ 1729 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN122 */ 1730 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN125 */ 1731 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN128 */ 1732 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN131 */ 1733 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN134 */ 1734 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN137 */ 1735 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN140 */ 1736 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN143 */ 1737 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN146 */ 1738 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN149 */ 1739 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN152 */ 1740 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN155 */ 1741 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN770 */ 1742 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN773 */ 1743 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN776 */ 1744 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN779 */ 1745 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN782 */ 1746 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN785 */ 1747 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN788 */ 1748 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN791 */ 1749 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN794 */ 1750 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN797 */ 1751 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN800 */ 1752 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN803 */ 1753 9, /* CYHAL_TRIGGER_TR_GROUP8_INPUT1 */ 1754 9, /* CYHAL_TRIGGER_TR_GROUP8_INPUT2 */ 1755 9, /* CYHAL_TRIGGER_TR_GROUP8_INPUT3 */ 1756 9, /* CYHAL_TRIGGER_TR_GROUP8_INPUT4 */ 1757 9, /* CYHAL_TRIGGER_TR_GROUP8_INPUT5 */ 1758 10, /* CYHAL_TRIGGER_TR_GROUP8_INPUT6 */ 1759 10, /* CYHAL_TRIGGER_TR_GROUP8_INPUT7 */ 1760 10, /* CYHAL_TRIGGER_TR_GROUP8_INPUT8 */ 1761 10, /* CYHAL_TRIGGER_TR_GROUP8_INPUT9 */ 1762 10, /* CYHAL_TRIGGER_TR_GROUP8_INPUT10 */ 1763 }; 1764 1765 const uint8_t cyhal_mux_dest_index[359] = 1766 { 1767 0, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK0 */ 1768 1, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK1 */ 1769 2, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK2 */ 1770 3, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK3 */ 1771 0, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK0 */ 1772 1, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK1 */ 1773 2, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK2 */ 1774 3, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK3 */ 1775 0, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN0 */ 1776 1, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN1 */ 1777 2, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN2 */ 1778 3, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN3 */ 1779 4, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN0 */ 1780 5, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN1 */ 1781 6, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN2 */ 1782 7, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN3 */ 1783 2, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN0 */ 1784 3, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN1 */ 1785 0, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN0 */ 1786 1, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN1 */ 1787 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN2 */ 1788 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN3 */ 1789 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 */ 1790 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN1 */ 1791 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN2 */ 1792 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN3 */ 1793 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN4 */ 1794 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN5 */ 1795 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN6 */ 1796 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN7 */ 1797 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN8 */ 1798 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN9 */ 1799 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN10 */ 1800 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN11 */ 1801 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN12 */ 1802 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN13 */ 1803 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN14 */ 1804 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN15 */ 1805 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN16 */ 1806 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN17 */ 1807 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN18 */ 1808 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN19 */ 1809 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN20 */ 1810 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN21 */ 1811 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN22 */ 1812 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN23 */ 1813 8, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN24 */ 1814 9, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN25 */ 1815 10, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN26 */ 1816 11, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN27 */ 1817 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN28 */ 1818 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN29 */ 1819 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN30 */ 1820 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN31 */ 1821 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN32 */ 1822 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN33 */ 1823 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN34 */ 1824 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN35 */ 1825 8, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN36 */ 1826 9, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN37 */ 1827 10, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN38 */ 1828 11, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN39 */ 1829 12, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN40 */ 1830 13, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN41 */ 1831 14, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN42 */ 1832 15, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN43 */ 1833 16, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN44 */ 1834 17, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN45 */ 1835 18, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN46 */ 1836 19, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN47 */ 1837 20, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN48 */ 1838 21, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN49 */ 1839 22, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN50 */ 1840 23, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN51 */ 1841 24, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN52 */ 1842 25, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN53 */ 1843 26, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN54 */ 1844 27, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN55 */ 1845 28, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN56 */ 1846 29, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN57 */ 1847 30, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN58 */ 1848 31, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN59 */ 1849 32, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN60 */ 1850 33, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN61 */ 1851 34, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN62 */ 1852 35, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN63 */ 1853 36, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN64 */ 1854 37, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN65 */ 1855 38, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN66 */ 1856 39, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN67 */ 1857 40, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN68 */ 1858 41, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN69 */ 1859 42, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN70 */ 1860 43, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN71 */ 1861 44, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN72 */ 1862 45, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN73 */ 1863 46, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN74 */ 1864 47, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN75 */ 1865 48, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN76 */ 1866 49, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN77 */ 1867 50, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN78 */ 1868 51, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN79 */ 1869 52, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN80 */ 1870 53, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN81 */ 1871 54, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN82 */ 1872 55, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN83 */ 1873 56, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN84 */ 1874 57, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN85 */ 1875 58, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN86 */ 1876 59, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN87 */ 1877 60, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN88 */ 1878 61, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN89 */ 1879 62, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN90 */ 1880 63, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN91 */ 1881 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN0 */ 1882 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN1 */ 1883 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN2 */ 1884 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN3 */ 1885 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN4 */ 1886 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN5 */ 1887 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN6 */ 1888 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN7 */ 1889 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN8 */ 1890 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN9 */ 1891 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN10 */ 1892 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN11 */ 1893 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN12 */ 1894 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN13 */ 1895 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN14 */ 1896 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN15 */ 1897 8, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN16 */ 1898 9, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN17 */ 1899 10, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN18 */ 1900 11, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN19 */ 1901 12, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN20 */ 1902 13, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN21 */ 1903 14, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN22 */ 1904 15, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN23 */ 1905 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN24 */ 1906 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN25 */ 1907 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN26 */ 1908 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN27 */ 1909 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN28 */ 1910 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN29 */ 1911 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN30 */ 1912 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN31 */ 1913 8, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN32 */ 1914 9, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN33 */ 1915 10, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN34 */ 1916 11, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN35 */ 1917 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN36 */ 1918 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN37 */ 1919 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN38 */ 1920 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN39 */ 1921 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN40 */ 1922 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN41 */ 1923 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN42 */ 1924 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN43 */ 1925 0, /* CYHAL_TRIGGER_CXPI0_TR_CMD_TX_HEADER0 */ 1926 1, /* CYHAL_TRIGGER_CXPI0_TR_CMD_TX_HEADER1 */ 1927 2, /* CYHAL_TRIGGER_CXPI0_TR_CMD_TX_HEADER2 */ 1928 3, /* CYHAL_TRIGGER_CXPI0_TR_CMD_TX_HEADER3 */ 1929 0, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER0 */ 1930 1, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER1 */ 1931 2, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER2 */ 1932 3, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER3 */ 1933 4, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER4 */ 1934 5, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER5 */ 1935 6, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER6 */ 1936 7, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER7 */ 1937 8, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER8 */ 1938 9, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER9 */ 1939 10, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER10 */ 1940 11, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER11 */ 1941 5, /* CYHAL_TRIGGER_PASS0_TR_DEBUG_FREEZE */ 1942 0, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN0 */ 1943 1, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN1 */ 1944 2, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN2 */ 1945 3, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN3 */ 1946 4, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN4 */ 1947 5, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN5 */ 1948 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN6 */ 1949 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN7 */ 1950 8, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN8 */ 1951 9, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN9 */ 1952 10, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN10 */ 1953 11, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN11 */ 1954 12, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN12 */ 1955 13, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN13 */ 1956 14, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN14 */ 1957 15, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN15 */ 1958 16, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN16 */ 1959 17, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN17 */ 1960 18, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN18 */ 1961 19, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN19 */ 1962 20, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN20 */ 1963 21, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN21 */ 1964 22, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN22 */ 1965 23, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN23 */ 1966 24, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN32 */ 1967 25, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN33 */ 1968 26, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN34 */ 1969 27, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN35 */ 1970 28, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN36 */ 1971 29, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN37 */ 1972 30, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN38 */ 1973 31, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN39 */ 1974 32, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN40 */ 1975 33, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN41 */ 1976 34, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN42 */ 1977 35, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN43 */ 1978 36, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN44 */ 1979 37, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN45 */ 1980 38, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN46 */ 1981 39, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN47 */ 1982 40, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN48 */ 1983 41, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN49 */ 1984 42, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN50 */ 1985 43, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN51 */ 1986 44, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN52 */ 1987 45, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN53 */ 1988 46, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN54 */ 1989 47, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN55 */ 1990 48, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN56 */ 1991 49, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN57 */ 1992 50, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN58 */ 1993 51, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN59 */ 1994 52, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN60 */ 1995 53, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN61 */ 1996 54, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN62 */ 1997 55, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN63 */ 1998 56, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN64 */ 1999 57, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN65 */ 2000 58, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN66 */ 2001 59, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN67 */ 2002 60, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN68 */ 2003 61, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN69 */ 2004 62, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN70 */ 2005 63, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN71 */ 2006 0, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN0 */ 2007 1, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN1 */ 2008 2, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN2 */ 2009 3, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN3 */ 2010 4, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN4 */ 2011 5, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN5 */ 2012 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN6 */ 2013 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN7 */ 2014 8, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN8 */ 2015 9, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN9 */ 2016 10, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN10 */ 2017 11, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN11 */ 2018 4, /* CYHAL_TRIGGER_PERI_TR_DBG_FREEZE */ 2019 0, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT0 */ 2020 1, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT1 */ 2021 7, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT0 */ 2022 8, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT1 */ 2023 6, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_WDT */ 2024 0, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN0 */ 2025 1, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN1 */ 2026 2, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN2 */ 2027 3, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN3 */ 2028 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN4 */ 2029 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN5 */ 2030 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN6 */ 2031 7, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN7 */ 2032 8, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN8 */ 2033 9, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN9 */ 2034 10, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN10 */ 2035 11, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN11 */ 2036 12, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN12 */ 2037 13, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN13 */ 2038 14, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN14 */ 2039 15, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN15 */ 2040 0, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN16 */ 2041 1, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN17 */ 2042 2, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN18 */ 2043 3, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN19 */ 2044 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN20 */ 2045 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN21 */ 2046 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN22 */ 2047 7, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN23 */ 2048 8, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN24 */ 2049 9, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN25 */ 2050 10, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN26 */ 2051 9, /* CYHAL_TRIGGER_TCPWM0_TR_DEBUG_FREEZE */ 2052 4, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN2 */ 2053 5, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN5 */ 2054 6, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN8 */ 2055 7, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN11 */ 2056 8, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN14 */ 2057 9, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN17 */ 2058 10, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN20 */ 2059 11, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN23 */ 2060 12, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN26 */ 2061 13, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN29 */ 2062 14, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN32 */ 2063 15, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN35 */ 2064 16, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN38 */ 2065 17, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN41 */ 2066 18, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN44 */ 2067 19, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN47 */ 2068 20, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN50 */ 2069 21, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN53 */ 2070 22, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN56 */ 2071 23, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN59 */ 2072 28, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN62 */ 2073 29, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN65 */ 2074 30, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN68 */ 2075 31, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN71 */ 2076 32, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN74 */ 2077 33, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN77 */ 2078 34, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN80 */ 2079 35, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN83 */ 2080 36, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN86 */ 2081 37, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN89 */ 2082 38, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN92 */ 2083 39, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN95 */ 2084 40, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN98 */ 2085 41, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN101 */ 2086 42, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN104 */ 2087 43, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN107 */ 2088 44, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN110 */ 2089 45, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN113 */ 2090 46, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN116 */ 2091 47, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN119 */ 2092 48, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN122 */ 2093 49, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN125 */ 2094 50, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN128 */ 2095 51, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN131 */ 2096 52, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN134 */ 2097 53, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN137 */ 2098 54, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN140 */ 2099 55, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN143 */ 2100 60, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN146 */ 2101 61, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN149 */ 2102 62, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN152 */ 2103 63, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN155 */ 2104 0, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN770 */ 2105 24, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN773 */ 2106 56, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN776 */ 2107 1, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN779 */ 2108 25, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN782 */ 2109 57, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN785 */ 2110 2, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN788 */ 2111 26, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN791 */ 2112 58, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN794 */ 2113 3, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN797 */ 2114 27, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN800 */ 2115 59, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN803 */ 2116 0, /* CYHAL_TRIGGER_TR_GROUP8_INPUT1 */ 2117 1, /* CYHAL_TRIGGER_TR_GROUP8_INPUT2 */ 2118 2, /* CYHAL_TRIGGER_TR_GROUP8_INPUT3 */ 2119 3, /* CYHAL_TRIGGER_TR_GROUP8_INPUT4 */ 2120 4, /* CYHAL_TRIGGER_TR_GROUP8_INPUT5 */ 2121 0, /* CYHAL_TRIGGER_TR_GROUP8_INPUT6 */ 2122 1, /* CYHAL_TRIGGER_TR_GROUP8_INPUT7 */ 2123 2, /* CYHAL_TRIGGER_TR_GROUP8_INPUT8 */ 2124 3, /* CYHAL_TRIGGER_TR_GROUP8_INPUT9 */ 2125 4, /* CYHAL_TRIGGER_TR_GROUP8_INPUT10 */ 2126 }; 2127 2128 #endif /* CY_DEVICE_TVIIBE2M */ 2129
