1 /***************************************************************************//** 2 * \file cyip_ipc.h 3 * 4 * \brief 5 * IPC IP definitions 6 * 7 ******************************************************************************** 8 * \copyright 9 * (c) (2016-2023), Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation. 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 #ifndef _CYIP_IPC_H_ 28 #define _CYIP_IPC_H_ 29 30 #include "cyip_headers.h" 31 32 /******************************************************************************* 33 * IPC 34 *******************************************************************************/ 35 36 #define IPC_STRUCT_SECTION_SIZE 0x00000020UL 37 #define IPC_INTR_STRUCT_SECTION_SIZE 0x00000020UL 38 #define IPC_SECTION_SIZE 0x00010000UL 39 40 /** 41 * \brief IPC structure (IPC_STRUCT) 42 */ 43 typedef struct { 44 __IM uint32_t ACQUIRE; /*!< 0x00000000 IPC acquire */ 45 __OM uint32_t RELEASE; /*!< 0x00000004 IPC release */ 46 __OM uint32_t NOTIFY; /*!< 0x00000008 IPC notification */ 47 __IOM uint32_t DATA0; /*!< 0x0000000C IPC data 0 */ 48 __IOM uint32_t DATA1; /*!< 0x00000010 IPC data 1 */ 49 __IM uint32_t RESERVED[2]; 50 __IM uint32_t LOCK_STATUS; /*!< 0x0000001C IPC lock status */ 51 } IPC_STRUCT_Type; /*!< Size = 32 (0x20) */ 52 53 /** 54 * \brief IPC interrupt structure (IPC_INTR_STRUCT) 55 */ 56 typedef struct { 57 __IOM uint32_t INTR; /*!< 0x00000000 Interrupt */ 58 __IOM uint32_t INTR_SET; /*!< 0x00000004 Interrupt set */ 59 __IOM uint32_t INTR_MASK; /*!< 0x00000008 Interrupt mask */ 60 __IM uint32_t INTR_MASKED; /*!< 0x0000000C Interrupt masked */ 61 __IM uint32_t RESERVED[4]; 62 } IPC_INTR_STRUCT_Type; /*!< Size = 32 (0x20) */ 63 64 /** 65 * \brief IPC (IPC) 66 */ 67 typedef struct { 68 IPC_STRUCT_Type STRUCT[16]; /*!< 0x00000000 IPC structure */ 69 __IM uint32_t RESERVED[896]; 70 IPC_INTR_STRUCT_Type INTR_STRUCT[16]; /*!< 0x00001000 IPC interrupt structure */ 71 } IPC_Type; /*!< Size = 4608 (0x1200) */ 72 73 74 /* IPC_STRUCT.ACQUIRE */ 75 #define IPC_STRUCT_ACQUIRE_P_Pos 0UL 76 #define IPC_STRUCT_ACQUIRE_P_Msk 0x1UL 77 #define IPC_STRUCT_ACQUIRE_NS_Pos 1UL 78 #define IPC_STRUCT_ACQUIRE_NS_Msk 0x2UL 79 #define IPC_STRUCT_ACQUIRE_PC_Pos 4UL 80 #define IPC_STRUCT_ACQUIRE_PC_Msk 0xF0UL 81 #define IPC_STRUCT_ACQUIRE_MS_Pos 8UL 82 #define IPC_STRUCT_ACQUIRE_MS_Msk 0xF00UL 83 #define IPC_STRUCT_ACQUIRE_SUCCESS_Pos 31UL 84 #define IPC_STRUCT_ACQUIRE_SUCCESS_Msk 0x80000000UL 85 /* IPC_STRUCT.RELEASE */ 86 #define IPC_STRUCT_RELEASE_INTR_RELEASE_Pos 0UL 87 #define IPC_STRUCT_RELEASE_INTR_RELEASE_Msk 0xFFFFUL 88 /* IPC_STRUCT.NOTIFY */ 89 #define IPC_STRUCT_NOTIFY_INTR_NOTIFY_Pos 0UL 90 #define IPC_STRUCT_NOTIFY_INTR_NOTIFY_Msk 0xFFFFUL 91 /* IPC_STRUCT.DATA0 */ 92 #define IPC_STRUCT_DATA0_DATA_Pos 0UL 93 #define IPC_STRUCT_DATA0_DATA_Msk 0xFFFFFFFFUL 94 /* IPC_STRUCT.DATA1 */ 95 #define IPC_STRUCT_DATA1_DATA_Pos 0UL 96 #define IPC_STRUCT_DATA1_DATA_Msk 0xFFFFFFFFUL 97 /* IPC_STRUCT.LOCK_STATUS */ 98 #define IPC_STRUCT_LOCK_STATUS_P_Pos 0UL 99 #define IPC_STRUCT_LOCK_STATUS_P_Msk 0x1UL 100 #define IPC_STRUCT_LOCK_STATUS_NS_Pos 1UL 101 #define IPC_STRUCT_LOCK_STATUS_NS_Msk 0x2UL 102 #define IPC_STRUCT_LOCK_STATUS_PC_Pos 4UL 103 #define IPC_STRUCT_LOCK_STATUS_PC_Msk 0xF0UL 104 #define IPC_STRUCT_LOCK_STATUS_MS_Pos 8UL 105 #define IPC_STRUCT_LOCK_STATUS_MS_Msk 0xF00UL 106 #define IPC_STRUCT_LOCK_STATUS_ACQUIRED_Pos 31UL 107 #define IPC_STRUCT_LOCK_STATUS_ACQUIRED_Msk 0x80000000UL 108 109 110 /* IPC_INTR_STRUCT.INTR */ 111 #define IPC_INTR_STRUCT_INTR_RELEASE_Pos 0UL 112 #define IPC_INTR_STRUCT_INTR_RELEASE_Msk 0xFFFFUL 113 #define IPC_INTR_STRUCT_INTR_NOTIFY_Pos 16UL 114 #define IPC_INTR_STRUCT_INTR_NOTIFY_Msk 0xFFFF0000UL 115 /* IPC_INTR_STRUCT.INTR_SET */ 116 #define IPC_INTR_STRUCT_INTR_SET_RELEASE_Pos 0UL 117 #define IPC_INTR_STRUCT_INTR_SET_RELEASE_Msk 0xFFFFUL 118 #define IPC_INTR_STRUCT_INTR_SET_NOTIFY_Pos 16UL 119 #define IPC_INTR_STRUCT_INTR_SET_NOTIFY_Msk 0xFFFF0000UL 120 /* IPC_INTR_STRUCT.INTR_MASK */ 121 #define IPC_INTR_STRUCT_INTR_MASK_RELEASE_Pos 0UL 122 #define IPC_INTR_STRUCT_INTR_MASK_RELEASE_Msk 0xFFFFUL 123 #define IPC_INTR_STRUCT_INTR_MASK_NOTIFY_Pos 16UL 124 #define IPC_INTR_STRUCT_INTR_MASK_NOTIFY_Msk 0xFFFF0000UL 125 /* IPC_INTR_STRUCT.INTR_MASKED */ 126 #define IPC_INTR_STRUCT_INTR_MASKED_RELEASE_Pos 0UL 127 #define IPC_INTR_STRUCT_INTR_MASKED_RELEASE_Msk 0xFFFFUL 128 #define IPC_INTR_STRUCT_INTR_MASKED_NOTIFY_Pos 16UL 129 #define IPC_INTR_STRUCT_INTR_MASKED_NOTIFY_Msk 0xFFFF0000UL 130 131 132 #endif /* _CYIP_IPC_H_ */ 133 134 135 /* [] END OF FILE */ 136
