1 /***************************************************************************//**
2 * \file cyhal_timer_impl.h
3 *
4 * Description:
5 * Provides a high level interface for interacting with the Infineon Timer/Counter.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright 2019-2021 Cypress Semiconductor Corporation (an Infineon company) or
10 * an affiliate of Cypress Semiconductor Corporation
11 *
12 * SPDX-License-Identifier: Apache-2.0
13 *
14 * Licensed under the Apache License, Version 2.0 (the "License");
15 * you may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at
17 *
18 * http://www.apache.org/licenses/LICENSE-2.0
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *******************************************************************************/
26
27 #pragma once
28
29 /**
30 * \addtogroup group_hal_impl_timer Timer (Timer/Counter)
31 * \ingroup group_hal_impl
32 * \{
33 * \section group_hal_impl_timer_freq_range Default Frequency Range
34 * If no \ref cyhal_clock_t is passed to \ref cyhal_timer_init, a default clock
35 * will be allocated. This clock will be a Peripheral Clock (default frequency
36 * 100 Mhz) with a 16 bit Peripheral Clock divider. Because of this the frequency
37 * range that is supported by \ref cyhal_timer_set_frequency is: 1526 hz -
38 * 100 Mhz
39 * \section group_hal_impl_timer_interconnect Interconnect
40 * In PSoC™ Timer channels can configure multiple input and output triggers
41 * simultaneously. 1 or more input triggers can be configured to initiate
42 * different Timer actions (e.g start, stop, reload, etc) with configurable
43 * edge detection on that incoming signal. Output triggers are based on certain
44 * events (e.g overflow, cc_match, etc).
45 * Note: The terminal_count output trigger is only available for TCPWMv2.
46 * \} group_hal_impl_timer */
47
48 #include "cyhal_timer.h"
49 #include "cyhal_tcpwm_common.h"
50
51 #if defined(CY_IP_MXTCPWM_INSTANCES) || defined(CY_IP_M0S8TCPWM_INSTANCES)
52
53 #if defined(__cplusplus)
54 extern "C" {
55 #endif /* __cplusplus */
56
_cyhal_timer_convert_event(cyhal_timer_event_t event)57 __STATIC_INLINE uint32_t _cyhal_timer_convert_event(cyhal_timer_event_t event)
58 {
59 uint32_t pdl_event = 0U;
60 if (event & CYHAL_TIMER_IRQ_TERMINAL_COUNT)
61 {
62 pdl_event |= CY_TCPWM_INT_ON_TC;
63 }
64 if (event & CYHAL_TIMER_IRQ_CAPTURE_COMPARE)
65 {
66 pdl_event |= CY_TCPWM_INT_ON_CC;
67 }
68 return pdl_event;
69 }
70
71 #define cyhal_timer_free(__OBJ_PTR__) _cyhal_timer_free(__OBJ_PTR__)
_cyhal_timer_free(cyhal_timer_t * obj)72 __STATIC_INLINE void _cyhal_timer_free(cyhal_timer_t *obj)
73 {
74 _cyhal_tcpwm_free(&obj->tcpwm);
75 }
76
cyhal_timer_register_callback_internal(cyhal_timer_t * obj,cyhal_timer_event_callback_t callback,void * callback_arg)77 __STATIC_INLINE void cyhal_timer_register_callback_internal(cyhal_timer_t *obj, cyhal_timer_event_callback_t callback, void *callback_arg)
78 {
79 _cyhal_tcpwm_register_callback(&obj->tcpwm.resource, (cy_israddress) callback, callback_arg);
80 }
81
82 #define cyhal_timer_register_callback(obj, callback, callback_arg) cyhal_timer_register_callback_internal(obj, callback, callback_arg)
83
cyhal_timer_enable_event_internal(cyhal_timer_t * obj,cyhal_timer_event_t event,uint8_t intr_priority,bool enable)84 __STATIC_INLINE void cyhal_timer_enable_event_internal(cyhal_timer_t *obj, cyhal_timer_event_t event, uint8_t intr_priority, bool enable)
85 {
86 uint32_t converted = _cyhal_timer_convert_event(event);
87 _cyhal_tcpwm_enable_event(&obj->tcpwm, &obj->tcpwm.resource, converted, intr_priority, enable);
88 }
89
90 #define cyhal_timer_enable_event(obj, event, intr_priority, enable) cyhal_timer_enable_event_internal(obj, event, intr_priority, enable)
91
92 #if defined(__cplusplus)
93 }
94 #endif /* __cplusplus */
95
96 #endif /* defined(CY_IP_MXTCPWM_INSTANCES) */
97
