1<?xml version="1.0" encoding="utf-8"?> 2 3 4<!--**************************************************************************** 5* \file shiftreg_v2-1.0.cypersonality 6* \version 1.0 7* 8* \brief 9* Shift Register personality description file. 10* 11******************************************************************************** 12* \copyright 13* Copyright 2020-2022 Cypress Semiconductor Corporation 14* SPDX-License-Identifier: Apache-2.0 15* 16* Licensed under the Apache License, Version 2.0 (the "License"); 17* you may not use this file except in compliance with the License. 18* You may obtain a copy of the License at 19* 20* http://www.apache.org/licenses/LICENSE-2.0 21* 22* Unless required by applicable law or agreed to in writing, software 23* distributed under the License is distributed on an "AS IS" BASIS, 24* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25* See the License for the specific language governing permissions and 26* limitations under the License. 27*****************************************************************************--> 28 29<Personality id="mxs40shiftreg_ver2" name="ShiftReg" version="1.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v7"> 30 <Dependencies> 31 <IpBlock name="mxtcpwm_ver2" /> 32 <Resource name="tcpwm\.group\.cnt" /> 33 </Dependencies> 34 <ExposedMembers /> 35 <Parameters> 36 <!-- PDL documentation --> 37 <ParamDoc id="pdlDoc" name="Configuration Help" group="Overview" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__tcpwm__shiftreg.html" linkText="Open Shift Register (TCPWM) Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" /> 38 39 <!--General--> 40 <ParamRange id="pCntGroup" name="pCntGroup" desc="pCntGroup" group="Internal" default="`${getInstNumber("group")}`" min="0" max="3" resolution="1" visible="false" editable="false" /> 41 <ParamRange id="pMaxGroupCount" name="pMaxGroupCount" desc="pMaxGroupCount" group="Internal" default="4" min="0" max="4" resolution="1" visible="false" editable="false" /> 42 <ParamString id="pCntWidthEx" name="pCntWidthEx" desc="pCntWidthEx" group="Internal" default="GRP_NR[`${pCntGroup}`].CNT.GRP_CNT_WIDTH" visible="false" editable="false" /> 43 <ParamRange id="pCntWidth" name="pCntWidth" desc="pCntWidth" group="Internal" default="`${lookupExpression(pCntWidthEx)}`" min="0" max="32" resolution="1" visible="false" editable="false" /> 44 <ParamRange id="pCntWidthMax" name="pCntWidthMax" desc="pCntWidthMax" group="Internal" default="`${pow(2, pCntWidth)-1}`" min="0" max="4294967296" resolution="1" visible="false" editable="false" /> 45 <ParamRange id="tcpwmInst" name="TCPWM Number" group="Internal" default="`${getInstNumber("tcpwm")}`" min="0" max="3" resolution="1" visible="false" editable="false" desc="" /> 46 <ParamRange id="cntInst" name="CNT Number" group="Internal" default="`${getInstNumber("cnt") + pCntGroup * 256}`" min="0" max="1023" resolution="1" visible="false" editable="false" desc="" /> 47 <ParamString id="pCntCC1Ex" name="pCntCC1Ex" desc="pCntCC1Ex" group="Internal" default="GRP_NR[`${pCntGroup}`].CNT.GRP_CC1_PRESENT" visible="false" editable="false" /> 48 <ParamBool id="pCntCC1" name="pCntCC1" desc="pCntCC1" group="Internal" default="`${lookupExpression(pCntCC1Ex) eq 1}`" visible="false" editable="false" /> 49 <ParamString id="pCntAMCEx" name="pCntAMCEx" desc="pCntAMCEx" group="Internal" default="GRP_NR[`${pCntGroup}`].CNT.GRP_AMC_PRESENT" visible="false" editable="false" /> 50 <ParamBool id="pCntAMC" name="pCntAMC" desc="pCntAMC" group="Internal" default="`${lookupExpression(pCntAMCEx) eq 1}`" visible="false" editable="false" /> 51 52 <ParamString id="TCPWM_version" name="TCPWM Version" group="General" default="TCPWM_ver2" visible="true" editable="false" desc="Version of the TCPWM hardware block"/> 53 54 <ParamChoice id="ClockPrescaler" name="Clock Prescaler" group="General" default="CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_1" visible="true" editable="true" desc="Divides down the input clock." > 55 <Entry name="Divide by 1" value="CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_1" visible="true" /> 56 <Entry name="Divide by 2" value="CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_2" visible="true" /> 57 <Entry name="Divide by 4" value="CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_4" visible="true" /> 58 <Entry name="Divide by 8" value="CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_8" visible="true" /> 59 <Entry name="Divide by 16" value="CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_16" visible="true" /> 60 <Entry name="Divide by 32" value="CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_32" visible="true" /> 61 <Entry name="Divide by 64" value="CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_64" visible="true" /> 62 <Entry name="Divide by 128" value="CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_128" visible="true" /> 63 </ParamChoice> 64 <ParamChoice id="Resolution" name="Shift Register Width" group="General" default="`${(pCntWidth eq 16) ? "CY_TCPWM_SHIFTREG_WIDTH_16_BITS" : "CY_TCPWM_SHIFTREG_WIDTH_32_BITS"}`" visible="true" editable="false" desc="Selects the width of the PWM."> 65 <Entry name="16-bits" value="CY_TCPWM_SHIFTREG_WIDTH_16_BITS" visible="true" /> 66 <Entry name="32-bits" value="CY_TCPWM_SHIFTREG_WIDTH_32_BITS" visible="true" /> 67 </ParamChoice> 68 69 <ParamRange id="TapsEnabled" name="Taps Enabled" group="Taps" default="1" min="0" max="`${pCntWidthMax}`" resolution="1" visible="true" editable="true" desc="Sets enabled taps. Range: 0-65535 (for 16 bit resolution) or 0–4294967295 (for 32 bit resolution)." /> 70 71 <!--Compare--> 72 <ParamBool id="EnableCompare0Swap" name="Enable Compare 0 Swap" group="Compare" default="false" visible="true" editable="true" desc="If checked the compare register will be swapped at the CC0 match event." /> 73 <ParamRange id="Compare0" name="Compare 0" group="Compare" default="16384" min="0" max="`${pCntWidthMax}`" resolution="1" visible="true" editable="true" desc="Sets the compare value. When the count value equals the compare the compare output pulses high. Range: 0-65535 (for 16 bit resolution) or 0–4294967295 (for 32 bit resolution)." /> 74 <ParamRange id="CompareBuf0" name="Compare 0 Buff" group="Compare" default="16384" min="0" max="`${pCntWidthMax}`" resolution="1" visible="`${EnableCompare0Swap}`" editable="true" desc="Sets the buffered compare value. Range: 0-65535 (for 16 bit resolution) or 0–4294967295 (for 32 bit resolution)." /> 75 76 <!--CompareBuf0--> 77 <ParamBool id="EnableCompare1Swap" name="Enable Compare 1 Swap" group="Compare" default="false" visible="`${pCntCC1}`" editable="true" desc="If checked the compare register will be swapped at the CC1 match event." /> 78 <ParamRange id="Compare1" name="Compare 1" group="Compare" default="16384" min="0" max="`${pCntWidthMax}`" resolution="1" visible="`${pCntCC1}`" editable="true" desc="Sets the compare value. When the count value equals the compare the compare output pulses high. Range: 0-65535 (for 16 bit resolution) or 0–4294967295 (for 32 bit resolution)." /> 79 <ParamRange id="CompareBuf1" name="Compare 1 Buff" group="Compare" default="16384" min="0" max="`${pCntWidthMax}`" resolution="1" visible="`${EnableCompare1Swap && pCntCC1}`" editable="true" desc="Sets the buffered compare value. Range: 0-65535 (for 16 bit resolution) or 0–4294967295 (for 32 bit resolution)." /> 80 81 <!--Interrupts--> 82 <ParamBool id="InterruptCC0" name="Compare 0" group="Interrupt Source" default="false" visible="true" editable="true" desc="Generates interrupt when counter value matches with compare 0 value" /> 83 <ParamBool id="InterruptCC1" name="Compare 1" group="Interrupt Source" default="false" visible="`${pCntCC1}`" editable="true" desc="Generates interrupt when counter value matches with compare 1 value" /> 84 <ParamString id="InterruptSource" name="InterruptSource" desc="InterruptSource" group="Interrupt Source" default="(CY_TCPWM_INT_ON_CC0 `${(InterruptCC0)? "" : "& 0U"}`) | (CY_TCPWM_INT_ON_CC1 `${(InterruptCC1)? "" : "& 0U"}`)" visible="false" editable="false" /> 85 86 <!--Inputs--> 87 <ParamSignal port="clock_counter_en[0]" name="Clock Signal" group="Inputs" visible="`${hasVisibleOption("clock_counter_en[0]")}`" desc="The clock input defines the operating frequency." canBeEmpty="`${!hasVisibleOption("clock_counter_en[0]")}`" /> 88 <ParamSignal port="clock[0]" name="Clock Signal" group="Inputs" visible="`${hasVisibleOption("clock[0]")}`" desc="The clock input defines the operating frequency." canBeEmpty="`${!hasVisibleOption("clock[0]")}`"/> 89 90 <ParamChoice id="ShiftInput" name="Shift Input" group="Inputs" default="CY_TCPWM_INPUT_DISABLED" visible="true" editable="true" desc="Determines the shift input event. Signal on this input causes counter to shift in right direction." > 91 <Entry name="Rising Edge" value="CY_TCPWM_INPUT_RISINGEDGE" visible="true" /> 92 <Entry name="Falling Edge" value="CY_TCPWM_INPUT_FALLINGEDGE" visible="true" /> 93 <Entry name="Either Edge" value="CY_TCPWM_INPUT_EITHEREDGE" visible="true" /> 94 <Entry name="Level" value="CY_TCPWM_INPUT_LEVEL" visible="true" /> 95 <Entry name="Disabled" value="CY_TCPWM_INPUT_DISABLED" visible="true" /> 96 </ParamChoice> 97 <ParamSignal port="count[0]" name="Shift Signal" group="Inputs" visible="`${ShiftInput ne CY_TCPWM_INPUT_DISABLED}`" desc="Determines the shift input connection." canBeEmpty="`${ShiftInput eq CY_TCPWM_INPUT_DISABLED}`" > 98 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 99 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 100 <Fixed value="CY_GPIO_DM_HIGHZ" /> 101 </Parameter> 102 </Constraint> 103 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 104 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 105 <Fixed value="CY_GPIO_DM_HIGHZ" /> 106 </Parameter> 107 </Constraint> 108 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 109 </ParamSignal> 110 <ParamChoice id="KillInput" name="Stop Input" group="Inputs" default="CY_TCPWM_INPUT_DISABLED" visible="true" editable="true" desc="Determines the stop input event. Signal on this input stops the Shift Register." > 111 <Entry name="Rising Edge" value="CY_TCPWM_INPUT_RISINGEDGE" visible="true" /> 112 <Entry name="Falling Edge" value="CY_TCPWM_INPUT_FALLINGEDGE" visible="true" /> 113 <Entry name="Either Edge" value="CY_TCPWM_INPUT_EITHEREDGE" visible="true" /> 114 <Entry name="Level" value="CY_TCPWM_INPUT_LEVEL" visible="true" /> 115 <Entry name="Disabled" value="CY_TCPWM_INPUT_DISABLED" visible="true" /> 116 </ParamChoice> 117 <ParamSignal port="stop[0]" name="Stop Signal" group="Inputs" visible="`${KillInput ne CY_TCPWM_INPUT_DISABLED}`" desc="Determines the stop input connection." canBeEmpty="`${KillInput eq CY_TCPWM_INPUT_DISABLED}`" > 118 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 119 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 120 <Fixed value="CY_GPIO_DM_HIGHZ" /> 121 </Parameter> 122 </Constraint> 123 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 124 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 125 <Fixed value="CY_GPIO_DM_HIGHZ" /> 126 </Parameter> 127 </Constraint> 128 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 129 </ParamSignal> 130 <ParamChoice id="ReloadInput" name="Reload Input" group="Inputs" default="CY_TCPWM_INPUT_DISABLED" visible="true" editable="true" desc="Determines the reload input event. Signal on this input sets the counter value to “0” and starts the counter shift operation." > 131 <Entry name="Rising Edge" value="CY_TCPWM_INPUT_RISINGEDGE" visible="true" /> 132 <Entry name="Falling Edge" value="CY_TCPWM_INPUT_FALLINGEDGE" visible="true" /> 133 <Entry name="Either Edge" value="CY_TCPWM_INPUT_EITHEREDGE" visible="true" /> 134 <Entry name="Disabled" value="CY_TCPWM_INPUT_DISABLED" visible="true" /> 135 </ParamChoice> 136 <ParamSignal port="reload[0]" name="Reload Signal" group="Inputs" visible="`${ReloadInput ne CY_TCPWM_INPUT_DISABLED}`" desc="Determines the reload input connection." canBeEmpty="`${ReloadInput eq CY_TCPWM_INPUT_DISABLED}`" > 137 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 138 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 139 <Fixed value="CY_GPIO_DM_HIGHZ" /> 140 </Parameter> 141 </Constraint> 142 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 143 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 144 <Fixed value="CY_GPIO_DM_HIGHZ" /> 145 </Parameter> 146 </Constraint> 147 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 148 </ParamSignal> 149 <ParamChoice id="StartInput" name="Start Input" group="Inputs" default="CY_TCPWM_INPUT_DISABLED" visible="true" editable="true" desc="Determines the start input event. Signal on this input starts the shift operation using current counter value." > 150 <Entry name="Rising Edge" value="CY_TCPWM_INPUT_RISINGEDGE" visible="true" /> 151 <Entry name="Falling Edge" value="CY_TCPWM_INPUT_FALLINGEDGE" visible="true" /> 152 <Entry name="Either Edge" value="CY_TCPWM_INPUT_EITHEREDGE" visible="true" /> 153 <Entry name="Disabled" value="CY_TCPWM_INPUT_DISABLED" visible="true" /> 154 </ParamChoice> 155 <ParamSignal port="start[0]" name="Start Signal" group="Inputs" visible="`${StartInput ne CY_TCPWM_INPUT_DISABLED}`" desc="Determines the start input connection." canBeEmpty="`${StartInput eq CY_TCPWM_INPUT_DISABLED}`" > 156 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 157 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 158 <Fixed value="CY_GPIO_DM_HIGHZ" /> 159 </Parameter> 160 </Constraint> 161 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 162 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 163 <Fixed value="CY_GPIO_DM_HIGHZ" /> 164 </Parameter> 165 </Constraint> 166 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 167 </ParamSignal> 168 <ParamChoice id="SerialInput" name="Serial Input" group="Inputs" default="CY_TCPWM_INPUT_DISABLED" visible="true" editable="true" desc="Determines the serial input event. This input is used as serial input to the MSB of the counter." > 169 <Entry name="Rising Edge" value="CY_TCPWM_INPUT_RISINGEDGE" visible="true" /> 170 <Entry name="Falling Edge" value="CY_TCPWM_INPUT_FALLINGEDGE" visible="true" /> 171 <Entry name="Either Edge" value="CY_TCPWM_INPUT_EITHEREDGE" visible="true" /> 172 <Entry name="Level" value="CY_TCPWM_INPUT_LEVEL" visible="true" /> 173 <Entry name="Disabled" value="CY_TCPWM_INPUT_DISABLED" visible="true" /> 174 </ParamChoice> 175 <ParamSignal port="capture0[0]" name="Serial Signal" group="Inputs" visible="`${SerialInput ne CY_TCPWM_INPUT_DISABLED}`" desc="Determines the serial input connection." canBeEmpty="`${SerialInput eq CY_TCPWM_INPUT_DISABLED}`" > 176 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 177 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 178 <Fixed value="CY_GPIO_DM_HIGHZ" /> 179 </Parameter> 180 </Constraint> 181 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 182 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 183 <Fixed value="CY_GPIO_DM_HIGHZ" /> 184 </Parameter> 185 </Constraint> 186 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 187 </ParamSignal> 188 189 <!--Shift Register Output Polarity--> 190 <ParamBool id="InvertShiftReg" name="Invert line Output" group="Shift Register Output Polarity" default="false" visible="true" editable="true" desc="If checked the line Shift Register output is inverted." /> 191 <ParamBool id="InvertShiftReg_n" name="Invert line_n Output" group="Shift Register Output Polarity" default="false" visible="true" editable="true" desc="If checked the line_n Shift Register output is inverted." /> 192 193 <!--Shift Register output on Disable--> 194 <ParamChoice id="ShiftRegDisabledOutput" name="Shift Register Output On Disable" group="Shift Register Output On Disable" default="CY_TCPWM_SHIFTREG_OUTPUT_HIGHZ" visible="true" editable="true" desc="Specifies the behavior of the Shift Register outputs while Shift Register is disabled." > 195 <Entry name="High Impedance" value="CY_TCPWM_SHIFTREG_OUTPUT_HIGHZ" visible="true" /> 196 <Entry name="Retain" value="CY_TCPWM_SHIFTREG_OUTPUT_RETAIN" visible="true" /> 197 <Entry name="Low" value="CY_TCPWM_SHIFTREG_OUTPUT_LOW" visible="true" /> 198 <Entry name="High" value="CY_TCPWM_SHIFTREG_OUTPUT_HIGH" visible="true" /> 199 </ParamChoice> 200 201 <!--Outputs--> 202 <ParamSignal port="line[0]" name="PWM (line)" group="Outputs" visible="true" desc="Shift Register output" canBeEmpty="true" > 203 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 204 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 205 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 206 </Parameter> 207 </Constraint> 208 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 209 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 210 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 211 </Parameter> 212 </Constraint> 213 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 214 </ParamSignal> 215 <ParamSignal port="line_compl[0]" name="PWM_n (line_compl)" group="Outputs" visible="true" desc="Complimentary Shift Register output." canBeEmpty="true" > 216 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 217 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 218 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 219 </Parameter> 220 </Constraint> 221 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 222 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 223 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 224 </Parameter> 225 </Constraint> 226 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 227 </ParamSignal> 228 229 <!--Trigger Outputs--> 230 <ParamChoice id="trigger0Event" name="Trigger 0 Event" group="Trigger Outputs" default="CY_TCPWM_CNT_TRIGGER_ON_DISABLED" visible="true" editable="true" desc="This output used to connect TCPWM event signals to other peripherals." > 231 <Entry name="Compare 0 Match" value="CY_TCPWM_CNT_TRIGGER_ON_CC0_MATCH" visible="true" /> 232 <Entry name="Compare 1 Match" value="CY_TCPWM_CNT_TRIGGER_ON_CC1_MATCH" visible="`${pCntCC1}`" /> 233 <Entry name="Shift Register Output (line_out)" value="CY_TCPWM_CNT_TRIGGER_ON_LINE_OUT" visible="true" /> 234 <Entry name="Disabled" value="CY_TCPWM_CNT_TRIGGER_ON_DISABLED" visible="true" /> 235 </ParamChoice> 236 <ParamSignal port="tr_out0[0]" name="Trigger 0 Signal" group="Trigger Outputs" visible="`${trigger0Event ne CY_TCPWM_CNT_TRIGGER_ON_DISABLED}`" desc="Signals to connect on Trigger 0 Event" canBeEmpty="`${trigger0Event eq CY_TCPWM_CNT_TRIGGER_ON_DISABLED}`" > 237 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 238 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 239 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 240 </Parameter> 241 </Constraint> 242 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 243 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 244 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 245 </Parameter> 246 </Constraint> 247 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 248 </ParamSignal> 249 <ParamChoice id="trigger1Event" name="Trigger 1 Event" group="Trigger Outputs" default="CY_TCPWM_CNT_TRIGGER_ON_DISABLED" visible="true" editable="true" desc="This output used to connect TCPWM event signals to other peripherals." > 250 <Entry name="Compare 0 Match" value="CY_TCPWM_CNT_TRIGGER_ON_CC0_MATCH" visible="true" /> 251 <Entry name="Compare 1 Match" value="CY_TCPWM_CNT_TRIGGER_ON_CC1_MATCH" visible="`${pCntCC1}`" /> 252 <Entry name="Shift Register Output (line_out)" value="CY_TCPWM_CNT_TRIGGER_ON_LINE_OUT" visible="true" /> 253 <Entry name="Disabled" value="CY_TCPWM_CNT_TRIGGER_ON_DISABLED" visible="true" /> 254 </ParamChoice> 255 <ParamSignal port="tr_out1[0]" name="Trigger 1 Signal" group="Trigger Outputs" visible="`${trigger1Event ne CY_TCPWM_CNT_TRIGGER_ON_DISABLED}`" desc="Signals to connect on Trigger 1 Event" canBeEmpty="`${trigger1Event eq CY_TCPWM_CNT_TRIGGER_ON_DISABLED}`" > 256 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 257 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 258 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 259 </Parameter> 260 </Constraint> 261 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 262 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 263 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 264 </Parameter> 265 </Constraint> 266 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 267 </ParamSignal> 268 269 <!--Config--> 270 <ParamBool id="inFlash" name="Store Config in Flash" group="Advanced" default="true" visible="true" editable="true" desc="Controls whether the configuration structure is stored in flash (const, true) or SRAM (not const, false)." /> 271 272 <!-- Peripheral clock divider connection --> 273 <ParamString id="definePrefix" name="Define prefix" group="Internal" default="`${"TCPWM" . tcpwmInst . "_GRP" . pCntGroup . "_CNT" . getInstNumber("cnt")}`" visible="false" editable="false" desc="" /> 274 <ParamString id="defineInputDisabled" name="Define input disabled" group="Internal" default="`${INST_NAME . "_INPUT_DISABLED & 0x3U"}`" visible="false" editable="false" desc="" /> 275 <ParamString id="pclk" name="PCLK" group="Internal" default="`${hasVisibleOption("clock_counter_en[0]") ? getBlockFromSignal("clock_counter_en[0]"):getBlockFromSignal("clock[0]")}`" visible="false" editable="false" desc="Connected peripheral clock divider (PCLK)" /> 276 <ParamBool id="pclkOk" name="PCLK Valid" group="Internal" default="`${hasVisibleOption("clock_counter_en[0]") ? hasConnection("clock_counter_en", 0) && isBlockUsed(pclk) : hasConnection("clock", 0) && isBlockUsed(pclk)}`" visible="false" editable="false" desc="Checks whether there is a PCLK connected and enabled" /> 277 <ParamString id="pclkDst" name="PCLK Destination" group="Internal" default="`${hasVisibleOption("clock_counter_en[0]") ? "PCLK_TCPWM" . tcpwmInst . "_CLOCK_COUNTER_EN" . cntInst : "PCLK_TCPWM" . tcpwmInst . "_CLOCKS" . cntInst}`" visible="false" editable="false" desc="" /> 278 279 <!-- Clock Frequency --> 280 <ParamString id="sourceClock" name="sourceClock" group="General" default="`${(hasVisibleOption("clock[0]")) ? (getBlockFromSignal("clock[0]")) : (getBlockFromSignal("clock_counter_en[0]"))}`" visible="false" editable="false" desc="Source Clock Resource" /> 281 <ParamRange id="tcpwmClkHz" name="tcpwmClkHz" group="General" default="`${getExposedMember(sourceClock, "frequency")}`" min="0" max="400000000" resolution="1" visible="false" editable="false" desc="TCPWM clock frequency in Hz" /> 282 283 </Parameters> 284 285 <DRCs> 286 <DRC type="ERROR" paramId="clock_en[0]" text="Maximum input clock signal frequency supported is 100 Mhz. Please fix input clock setting." condition="`${(hasVisibleOption("clock[0]")) && (tcpwmClkHz > 100000000)}`" /> 287 <DRC type="ERROR" paramId="clock_counter_en[0]" text="Maximum input clock signal frequency supported is 100 Mhz. Please fix input clock setting." condition="`${(hasVisibleOption("clock_counter_en[0]")) && (tcpwmClkHz > 100000000)}`" /> 288 289 <!--ShiftInput DRCs--> 290 <DRC type="ERROR" text="Shift Input event has to be enabled to use Shift Signal." condition="`${hasConnection("count", 0) && (ShiftInput eq CY_TCPWM_INPUT_DISABLED)}`" paramId="ShiftInput"> 291 <FixIt action="SET_PARAM" target="ShiftInput" value="CY_TCPWM_INPUT_RISINGEDGE" valid="true" /> 292 <FixIt action="SET_PARAM" target="ShiftInput" value="CY_TCPWM_INPUT_FALLINGEDGE" valid="true" /> 293 <FixIt action="SET_PARAM" target="ShiftInput" value="CY_TCPWM_INPUT_EITHEREDGE" valid="true" /> 294 <FixIt action="SET_PARAM" target="ShiftInput" value="CY_TCPWM_INPUT_LEVEL" valid="true" /> 295 </DRC> 296 297 <!--ReloadInput DRCs--> 298 <DRC type="ERROR" text="Reload Event has to be enabled to use Reload Signal." condition="`${hasConnection("reload", 0) && (ReloadInput eq CY_TCPWM_INPUT_DISABLED)}`" paramId="ReloadInput"> 299 <FixIt action="SET_PARAM" target="ReloadInput" value="CY_TCPWM_INPUT_RISINGEDGE" valid="true" /> 300 <FixIt action="SET_PARAM" target="ReloadInput" value="CY_TCPWM_INPUT_FALLINGEDGE" valid="true" /> 301 <FixIt action="SET_PARAM" target="ReloadInput" value="CY_TCPWM_INPUT_EITHEREDGE" valid="true" /> 302 </DRC> 303 304 <!--StartInput DRCs--> 305 <DRC type="ERROR" text="Start Event has to be enabled to use Start Signal." condition="`${hasConnection("start", 0) && (StartInput eq CY_TCPWM_INPUT_DISABLED)}`" paramId="StartInput"> 306 <FixIt action="SET_PARAM" target="StartInput" value="CY_TCPWM_INPUT_RISINGEDGE" valid="true" /> 307 <FixIt action="SET_PARAM" target="StartInput" value="CY_TCPWM_INPUT_FALLINGEDGE" valid="true" /> 308 <FixIt action="SET_PARAM" target="StartInput" value="CY_TCPWM_INPUT_EITHEREDGE" valid="true" /> 309 </DRC> 310 311 <!--SerialInput DRCs--> 312 <DRC type="ERROR" text="Serial Input Event has to be enabled to use Serial Input Signal." condition="`${hasConnection("capture0", 0) && (SerialInput eq CY_TCPWM_INPUT_DISABLED)}`" paramId="SerialInput"> 313 <FixIt action="SET_PARAM" target="SerialInput" value="CY_TCPWM_INPUT_RISINGEDGE" valid="true" /> 314 <FixIt action="SET_PARAM" target="SerialInput" value="CY_TCPWM_INPUT_FALLINGEDGE" valid="true" /> 315 <FixIt action="SET_PARAM" target="SerialInput" value="CY_TCPWM_INPUT_EITHEREDGE" valid="true" /> 316 <FixIt action="SET_PARAM" target="ShiftInput" value="CY_TCPWM_INPUT_LEVEL" valid="true" /> 317 </DRC> 318 319 <!--KillInput DRCs--> 320 <DRC type="ERROR" text="Kill Event has to be enabled to use Kill Signal." condition="`${hasConnection("stop", 0) && (KillInput eq CY_TCPWM_INPUT_DISABLED)}`" paramId="KillInput"> 321 <FixIt action="SET_PARAM" target="KillInput" value="CY_TCPWM_INPUT_RISINGEDGE" valid="true" /> 322 <FixIt action="SET_PARAM" target="KillInput" value="CY_TCPWM_INPUT_FALLINGEDGE" valid="true" /> 323 <FixIt action="SET_PARAM" target="KillInput" value="CY_TCPWM_INPUT_EITHEREDGE" valid="true" /> 324 </DRC> 325 326 <!--Trigger Output DRCs--> 327 <DRC type="ERROR" text="Trigger 0 Event has to be enabled to use Trigger 0 Signal." condition="`${hasConnection("tr_out0", 0) && (trigger0Event eq CY_TCPWM_CNT_TRIGGER_ON_DISABLED)}`" paramId="trigger0Event"> 328 <FixIt action="SET_PARAM" target="trigger0Event" value="CY_TCPWM_CNT_TRIGGER_ON_CC0_MATCH" valid="true" /> 329 <FixIt action="SET_PARAM" target="trigger0Event" value="CY_TCPWM_CNT_TRIGGER_ON_CC1_MATCH" valid="`${pCntCC1}`" /> 330 <FixIt action="SET_PARAM" target="trigger0Event" value="CY_TCPWM_CNT_TRIGGER_ON_LINE_OUT" valid="true" /> 331 </DRC> 332 <DRC type="ERROR" text="Trigger 1 Event has to be enabled to use Trigger 1 Signal." condition="`${hasConnection("tr_out1", 0) && (trigger1Event eq CY_TCPWM_CNT_TRIGGER_ON_DISABLED)}`" paramId="trigger1Event"> 333 <FixIt action="SET_PARAM" target="trigger1Event" value="CY_TCPWM_CNT_TRIGGER_ON_CC0_MATCH" valid="true" /> 334 <FixIt action="SET_PARAM" target="trigger1Event" value="CY_TCPWM_CNT_TRIGGER_ON_CC1_MATCH" valid="`${pCntCC1}`" /> 335 <FixIt action="SET_PARAM" target="trigger1Event" value="CY_TCPWM_CNT_TRIGGER_ON_LINE_OUT" valid="true" /> 336 </DRC> 337 </DRCs> 338 339 340 341 342 <ConfigFirmware> 343 <ConfigInclude value="cy_tcpwm_shiftreg.h" include="true" /> 344 <ConfigInclude value="cy_sysclk.h" include="`${pclkOk}`" /> 345 <ConfigInclude value="cycfg_routing.h" include="true" /> 346 <ConfigInclude value="cyhal_hwmgr.h" include="true" guard="defined (CY_USING_HAL)" /> 347 348 <ConfigDefine name="`${INST_NAME}`_HW" value="TCPWM`${tcpwmInst}`" public="true" include="true" /> 349 <ConfigDefine name="`${INST_NAME}`_NUM" value="`${cntInst}`UL" public="true" include="true" /> 350 <ConfigDefine name="`${INST_NAME}`_IRQ" value="tcpwm_`${tcpwmInst}`_interrupts_`${cntInst}`_IRQn" public="true" include="`${InterruptCC0 || InterruptCC1}`" /> 351 <ConfigDefine name="`${INST_NAME}`_INPUT_DISABLED" value="0x7U" public="false" include="true" /> 352 <ConfigStruct name="`${INST_NAME . "_config"}`" type="cy_stc_tcpwm_shiftreg_config_t" const="`${inFlash}`" public="true" include="true" > 353 <Member name="clockPrescaler" value="`${ClockPrescaler}`" /> 354 <Member name="tapsEnabled" value="`${TapsEnabled}`" /> 355 <Member name="compare0" value="`${Compare0}`" /> 356 <Member name="compareBuf0" value="`${CompareBuf0}`" /> 357 <Member name="enableCompare0Swap" value="`${EnableCompare0Swap}`" /> 358 <Member name="compare1" value="`${pCntCC1 ? Compare1 : "CY_TCPWM_GRP_CNT_CC0_DEFAULT"}`" /> 359 <Member name="compareBuf1" value="`${pCntCC1 ? CompareBuf1 : "CY_TCPWM_GRP_CNT_CC0_BUFF_DEFAULT"}`" /> 360 <Member name="enableCompare1Swap" value="`${EnableCompare1Swap}`" /> 361 <Member name="interruptSources" value="`${InterruptSource}`" /> 362 <Member name="invertShiftRegOut" value="`${InvertShiftReg ? "CY_TCPWM_SHIFTREG_INVERT_ENABLE" : "CY_TCPWM_SHIFTREG_INVERT_DISABLE"}`" /> 363 <Member name="invertShiftRegOutN" value="`${InvertShiftReg_n ? "CY_TCPWM_SHIFTREG_INVERT_ENABLE" : "CY_TCPWM_SHIFTREG_INVERT_DISABLE"}`" /> 364 <Member name="reloadInputMode" value="`${ReloadInput eq CY_TCPWM_INPUT_DISABLED ? defineInputDisabled : ReloadInput}`" /> 365 <Member name="reloadInput" value="`${ReloadInput eq CY_TCPWM_INPUT_DISABLED ? "CY_TCPWM_INPUT_0" : (definePrefix . "_RELOAD_VALUE")}`" /> 366 <Member name="startInputMode" value="`${StartInput eq CY_TCPWM_INPUT_DISABLED ? defineInputDisabled : StartInput}`" /> 367 <Member name="startInput" value="`${StartInput eq CY_TCPWM_INPUT_DISABLED ? "CY_TCPWM_INPUT_0" : (definePrefix . "_START_VALUE")}`" /> 368 <Member name="killInputMode" value="`${KillInput eq CY_TCPWM_INPUT_DISABLED ? defineInputDisabled : KillInput}`" /> 369 <Member name="killInput" value="`${KillInput eq CY_TCPWM_INPUT_DISABLED ? "CY_TCPWM_INPUT_0" : (definePrefix . "_STOP_VALUE")}`" /> 370 <Member name="shiftInputMode" value="`${ShiftInput eq CY_TCPWM_INPUT_DISABLED ? defineInputDisabled : ShiftInput}`" /> 371 <Member name="shiftInput" value="`${ShiftInput eq CY_TCPWM_INPUT_DISABLED ? "CY_TCPWM_INPUT_1" : (definePrefix . "_COUNT_VALUE")}`" /> 372 <Member name="serialInputMode" value="`${SerialInput eq CY_TCPWM_INPUT_DISABLED ? defineInputDisabled : SerialInput}`" /> 373 <Member name="serialInput" value="`${SerialInput eq CY_TCPWM_INPUT_DISABLED ? "CY_TCPWM_INPUT_0" : (definePrefix . "_CAPTURE0_VALUE")}`" /> 374 <Member name="shiftRegOnDisable" value="`${ShiftRegDisabledOutput}`" /> 375 <Member name="trigger0Event" value="`${trigger0Event}`" /> 376 <Member name="trigger1Event" value="`${trigger1Event}`" /> 377 </ConfigStruct> 378 379 <ConfigStruct name="`${INST_NAME}`_obj" type="cyhal_resource_inst_t" const="true" public="true" include="true" guard="defined (CY_USING_HAL)"> 380 <Member name="type" value="CYHAL_RSC_TCPWM" /> 381 <Member name="block_num" value="`${(getInstNumber("tcpwm") * pMaxGroupCount) + pCntGroup}`U" /> 382 <Member name="channel_num" value="`${getInstNumber("cnt")}`U" /> 383 </ConfigStruct> 384 385 <ConfigInstruction value="Cy_SysClk_PeriphAssignDivider(`${pclkDst}`, `${getExposedMember(pclk, "clockSel")}`);" include="`${pclkOk}`" /> 386 <ConfigInstruction value="cyhal_hwmgr_reserve(&`${INST_NAME}`_obj);" include="true" guard="defined (CY_USING_HAL)" /> 387 </ConfigFirmware> 388 389</Personality> 390
