1 /***************************************************************************//** 2 * \file cyhal_peri_common.h 3 * 4 * Description: 5 * Provides definitions for the triggers for each supported device family. 6 * 7 ******************************************************************************** 8 * \copyright 9 * Copyright 2018-2019 Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 #pragma once 28 29 #include "cy_device.h" 30 31 #if defined(__cplusplus) 32 extern "C" { 33 #endif /* __cplusplus */ 34 35 #if defined(CY_IP_MXPERI) || defined(CY_IP_M0S8PERI) 36 37 #define _CYHAL_PCLK_GROUP(clkdst) 0 38 #define _CYHAL_TCPWM0_PCLK_CLOCK0 PCLK_TCPWM0_CLOCKS0 39 #define _CYHAL_TCPWM1_PCLK_CLOCK0 PCLK_TCPWM1_CLOCKS0 40 #define _CYHAL_SCB0_PCLK_CLOCK PCLK_SCB0_CLOCK 41 42 #elif defined(CY_IP_MXSPERI) 43 44 #define _CYHAL_PCLK_GROUP(clkdst) ((uint8_t)((uint32_t)(clkdst) >> 8)) 45 #define _CYHAL_TCPWM0_PCLK_CLOCK0 PCLK_TCPWM0_CLOCK_COUNTER_EN0 46 #define _CYHAL_TCPWM1_PCLK_CLOCK0 PCLK_TCPWM1_CLOCK_COUNTER_EN0 47 #define _CYHAL_SCB0_PCLK_CLOCK PCLK_SCB0_CLOCK_SCB_EN 48 #define _CYHAL_SCB1_PCLK_CLOCK PCLK_SCB1_CLOCK_SCB_EN 49 #endif 50 51 #if defined(__cplusplus) 52 } 53 #endif /* __cplusplus */ 54 55
