1 /***************************************************************************//** 2 * \file cyhal_interconnect_impl.h 3 * 4 * \brief 5 * Implementation details for the PSoC™ 4/6 interconnect. 6 * 7 ******************************************************************************** 8 * \copyright 9 * Copyright 2018-2022 Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 /** 28 * \addtogroup group_hal_impl_interconnect Interconnect (Internal Digital Routing) 29 * \ingroup group_hal_impl 30 * \{ 31 * The interconnect system connects the various hardware peripherals using trigger 32 * signals. Triggers are output when a particular event occurs or condition is 33 * met by one of the peripherals. These triggers can be routed to other 34 * peripherals using the interconnect system in order to initiate an action at 35 * the destination peripheral. 36 * 37 * Peripherals must be configured to produce/accept trigger signals. Therefore 38 * in practice, there is no need to call \ref \_cyhal_connect_signal manually. 39 * Instead, use the per-peripheral cyhal_*PERI*_connect_digital or 40 * cyhal_*PERI*_enable_output which will handle configuring the peripheral and 41 * making the connections internally. 42 * 43 * Trigger routing is implemented using trigger multiplexers. A single source 44 * trigger can be routed to multiple destinations but a single destination can 45 * only be connected to a single source. There are different trigger layouts 46 * depending on device architecture. 47 * 48 * Trigger routing is device specific. See \ref group_hal_impl_triggers 49 * for the available connections for your device. 50 */ 51 52 #pragma once 53 54 #include "cy_result.h" 55 #include "cyhal_hw_types.h" 56 57 #if defined(__cplusplus) 58 extern "C" { 59 #endif 60 61 /** Connects two digital signals on the device using the internal interconnect. 62 * A single source can drive multiple destinations, but a destination can be 63 * driven by only one source. If the destination is already connected, or the 64 * connection can not be established an error will be returned. 65 * @param[in] source The source of the signal to connect 66 * @param[in] dest The destination of the signal to connect 67 * @return The status of the connect request 68 */ 69 cy_rslt_t _cyhal_connect_signal(cyhal_source_t source, cyhal_dest_t dest); 70 71 /** Disconnects two digital signals on the device that were previously 72 * connected using the internal interconnect. 73 * @param[in] source The source of the signal to disconnect 74 * @param[in] dest The destination of the signal to disconnect 75 * @return The status of the disconnect request 76 */ 77 cy_rslt_t _cyhal_disconnect_signal(cyhal_source_t source, cyhal_dest_t dest); 78 79 /** Checks to see if a signal can be connected between the provided source and dest. 80 * @param[in] source The source of the signal to check 81 * @param[in] dest The destination of the signal to check 82 * @return Indication of whether a signal can connect between the provided points 83 */ 84 bool _cyhal_can_connect_signal(cyhal_source_t source, cyhal_dest_t dest); 85 86 #if defined(__cplusplus) 87 } 88 #endif 89 90 /** \} group_hal_impl_interconnect */ 91
