1 /***************************************************************************//** 2 * \file cyhal_triggers_xmc7100.c 3 * 4 * \brief 5 * XMC7100 family HAL triggers header 6 * 7 ******************************************************************************** 8 * \copyright 9 * (c) (2016-2023), Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation. 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 #include "cy_device_headers.h" 28 #include "cyhal_hw_types.h" 29 30 #ifdef CY_DEVICE_TVIIBH4M 31 #include "triggers/cyhal_triggers_xmc7100.h" 32 33 const uint16_t cyhal_sources_per_mux[24] = 34 { 35 69, 63, 82, 7, 0, 172, 94, 50, 9, 16, 188, 124, 156, 12, 72, 22, 2, 12, 6, 72, 72, 4, 4, 16, 36 }; 37 38 const bool cyhal_is_mux_1to1[24] = 39 { 40 false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, 41 }; 42 43 const _cyhal_trigger_source_xmc7100_t cyhal_mux0_sources[69] = 44 { 45 _CYHAL_TRIGGER_CPUSS_ZERO, 46 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 47 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 48 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 49 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 50 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 51 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 52 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 53 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 54 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 55 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 56 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 57 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 58 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 59 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 60 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 61 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 62 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 63 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 64 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 65 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 66 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 67 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 68 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 69 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 70 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8, 71 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9, 72 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10, 73 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11, 74 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12, 75 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13, 76 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14, 77 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15, 78 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 79 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 80 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 81 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 82 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT4, 83 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT5, 84 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT6, 85 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT7, 86 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 87 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 88 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 89 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT3, 90 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 91 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 92 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 93 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT3, 94 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 95 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 96 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 97 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 98 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 99 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 100 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 101 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 102 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 103 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 104 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 105 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 106 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 107 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 108 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 109 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 110 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 111 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 112 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 113 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 114 }; 115 116 const _cyhal_trigger_source_xmc7100_t cyhal_mux1_sources[63] = 117 { 118 _CYHAL_TRIGGER_CPUSS_ZERO, 119 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 120 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 121 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 122 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 123 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 124 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 125 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 126 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 127 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 128 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 129 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 130 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 131 _CYHAL_TRIGGER_TCPWM0_TR_OUT012, 132 _CYHAL_TRIGGER_TCPWM0_TR_OUT013, 133 _CYHAL_TRIGGER_TCPWM0_TR_OUT014, 134 _CYHAL_TRIGGER_TCPWM0_TR_OUT015, 135 _CYHAL_TRIGGER_TCPWM0_TR_OUT016, 136 _CYHAL_TRIGGER_TCPWM0_TR_OUT017, 137 _CYHAL_TRIGGER_TCPWM0_TR_OUT018, 138 _CYHAL_TRIGGER_TCPWM0_TR_OUT019, 139 _CYHAL_TRIGGER_TCPWM0_TR_OUT020, 140 _CYHAL_TRIGGER_TCPWM0_TR_OUT021, 141 _CYHAL_TRIGGER_TCPWM0_TR_OUT022, 142 _CYHAL_TRIGGER_TCPWM0_TR_OUT023, 143 _CYHAL_TRIGGER_TCPWM0_TR_OUT024, 144 _CYHAL_TRIGGER_TCPWM0_TR_OUT025, 145 _CYHAL_TRIGGER_TCPWM0_TR_OUT026, 146 _CYHAL_TRIGGER_TCPWM0_TR_OUT027, 147 _CYHAL_TRIGGER_TCPWM0_TR_OUT028, 148 _CYHAL_TRIGGER_TCPWM0_TR_OUT029, 149 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 150 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 151 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 152 _CYHAL_TRIGGER_TCPWM0_TR_OUT0259, 153 _CYHAL_TRIGGER_TCPWM0_TR_OUT0260, 154 _CYHAL_TRIGGER_TCPWM0_TR_OUT0261, 155 _CYHAL_TRIGGER_TCPWM0_TR_OUT0262, 156 _CYHAL_TRIGGER_TCPWM0_TR_OUT0263, 157 _CYHAL_TRIGGER_TCPWM0_TR_OUT0264, 158 _CYHAL_TRIGGER_TCPWM0_TR_OUT0265, 159 _CYHAL_TRIGGER_TCPWM0_TR_OUT0266, 160 _CYHAL_TRIGGER_TCPWM0_TR_OUT0267, 161 _CYHAL_TRIGGER_TCPWM0_TR_OUT0512, 162 _CYHAL_TRIGGER_TCPWM0_TR_OUT0513, 163 _CYHAL_TRIGGER_TCPWM0_TR_OUT0514, 164 _CYHAL_TRIGGER_TCPWM0_TR_OUT0515, 165 _CYHAL_TRIGGER_TCPWM0_TR_OUT0516, 166 _CYHAL_TRIGGER_TCPWM0_TR_OUT0517, 167 _CYHAL_TRIGGER_TCPWM0_TR_OUT0518, 168 _CYHAL_TRIGGER_TCPWM0_TR_OUT0519, 169 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 170 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 171 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 172 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 173 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 174 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 175 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 176 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 177 _CYHAL_TRIGGER_EVTGEN0_TR_OUT0, 178 _CYHAL_TRIGGER_EVTGEN0_TR_OUT1, 179 _CYHAL_TRIGGER_EVTGEN0_TR_OUT2, 180 _CYHAL_TRIGGER_EVTGEN0_TR_OUT3, 181 }; 182 183 const _cyhal_trigger_source_xmc7100_t cyhal_mux2_sources[82] = 184 { 185 _CYHAL_TRIGGER_CPUSS_ZERO, 186 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 187 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 188 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 189 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 190 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 191 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 192 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 193 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 194 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8, 195 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9, 196 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10, 197 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11, 198 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12, 199 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13, 200 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14, 201 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15, 202 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 203 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 204 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 205 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 206 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 207 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 208 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 209 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 210 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 211 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 212 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 213 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 214 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 215 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 216 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 217 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 218 _CYHAL_TRIGGER_TCPWM0_TR_OUT030, 219 _CYHAL_TRIGGER_TCPWM0_TR_OUT031, 220 _CYHAL_TRIGGER_TCPWM0_TR_OUT032, 221 _CYHAL_TRIGGER_TCPWM0_TR_OUT033, 222 _CYHAL_TRIGGER_TCPWM0_TR_OUT034, 223 _CYHAL_TRIGGER_TCPWM0_TR_OUT035, 224 _CYHAL_TRIGGER_TCPWM0_TR_OUT036, 225 _CYHAL_TRIGGER_TCPWM0_TR_OUT037, 226 _CYHAL_TRIGGER_TCPWM0_TR_OUT038, 227 _CYHAL_TRIGGER_TCPWM0_TR_OUT039, 228 _CYHAL_TRIGGER_TCPWM0_TR_OUT040, 229 _CYHAL_TRIGGER_TCPWM0_TR_OUT041, 230 _CYHAL_TRIGGER_TCPWM0_TR_OUT042, 231 _CYHAL_TRIGGER_TCPWM0_TR_OUT043, 232 _CYHAL_TRIGGER_TCPWM0_TR_OUT044, 233 _CYHAL_TRIGGER_TCPWM0_TR_OUT045, 234 _CYHAL_TRIGGER_TCPWM0_TR_OUT046, 235 _CYHAL_TRIGGER_TCPWM0_TR_OUT047, 236 _CYHAL_TRIGGER_TCPWM0_TR_OUT048, 237 _CYHAL_TRIGGER_TCPWM0_TR_OUT049, 238 _CYHAL_TRIGGER_TCPWM0_TR_OUT050, 239 _CYHAL_TRIGGER_TCPWM0_TR_OUT051, 240 _CYHAL_TRIGGER_TCPWM0_TR_OUT052, 241 _CYHAL_TRIGGER_TCPWM0_TR_OUT053, 242 _CYHAL_TRIGGER_TCPWM0_TR_OUT054, 243 _CYHAL_TRIGGER_TCPWM0_TR_OUT055, 244 _CYHAL_TRIGGER_TCPWM0_TR_OUT056, 245 _CYHAL_TRIGGER_TCPWM0_TR_OUT057, 246 _CYHAL_TRIGGER_TCPWM0_TR_OUT058, 247 _CYHAL_TRIGGER_TCPWM0_TR_OUT059, 248 _CYHAL_TRIGGER_TCPWM0_TR_OUT060, 249 _CYHAL_TRIGGER_TCPWM0_TR_OUT061, 250 _CYHAL_TRIGGER_TCPWM0_TR_OUT062, 251 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 252 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 253 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 254 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 255 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 256 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 257 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 258 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 259 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 260 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 261 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 262 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 263 _CYHAL_TRIGGER_PERI_TR_IO_INPUT28, 264 _CYHAL_TRIGGER_PERI_TR_IO_INPUT29, 265 _CYHAL_TRIGGER_PERI_TR_IO_INPUT30, 266 _CYHAL_TRIGGER_PERI_TR_IO_INPUT31, 267 }; 268 269 const _cyhal_trigger_source_xmc7100_t cyhal_mux3_sources[7] = 270 { 271 _CYHAL_TRIGGER_CPUSS_ZERO, 272 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 273 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 274 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 275 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 276 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 277 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 278 }; 279 280 const _cyhal_trigger_source_xmc7100_t cyhal_mux5_sources[172] = 281 { 282 _CYHAL_TRIGGER_CPUSS_ZERO, 283 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 284 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 285 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 286 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 287 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 288 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 289 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 290 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 291 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 292 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 293 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 294 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 295 _CYHAL_TRIGGER_TCPWM0_TR_OUT012, 296 _CYHAL_TRIGGER_TCPWM0_TR_OUT013, 297 _CYHAL_TRIGGER_TCPWM0_TR_OUT014, 298 _CYHAL_TRIGGER_TCPWM0_TR_OUT015, 299 _CYHAL_TRIGGER_TCPWM0_TR_OUT016, 300 _CYHAL_TRIGGER_TCPWM0_TR_OUT017, 301 _CYHAL_TRIGGER_TCPWM0_TR_OUT018, 302 _CYHAL_TRIGGER_TCPWM0_TR_OUT019, 303 _CYHAL_TRIGGER_TCPWM0_TR_OUT020, 304 _CYHAL_TRIGGER_TCPWM0_TR_OUT021, 305 _CYHAL_TRIGGER_TCPWM0_TR_OUT022, 306 _CYHAL_TRIGGER_TCPWM0_TR_OUT023, 307 _CYHAL_TRIGGER_TCPWM0_TR_OUT024, 308 _CYHAL_TRIGGER_TCPWM0_TR_OUT025, 309 _CYHAL_TRIGGER_TCPWM0_TR_OUT026, 310 _CYHAL_TRIGGER_TCPWM0_TR_OUT027, 311 _CYHAL_TRIGGER_TCPWM0_TR_OUT028, 312 _CYHAL_TRIGGER_TCPWM0_TR_OUT029, 313 _CYHAL_TRIGGER_TCPWM0_TR_OUT030, 314 _CYHAL_TRIGGER_TCPWM0_TR_OUT031, 315 _CYHAL_TRIGGER_TCPWM0_TR_OUT032, 316 _CYHAL_TRIGGER_TCPWM0_TR_OUT033, 317 _CYHAL_TRIGGER_TCPWM0_TR_OUT034, 318 _CYHAL_TRIGGER_TCPWM0_TR_OUT035, 319 _CYHAL_TRIGGER_TCPWM0_TR_OUT036, 320 _CYHAL_TRIGGER_TCPWM0_TR_OUT037, 321 _CYHAL_TRIGGER_TCPWM0_TR_OUT038, 322 _CYHAL_TRIGGER_TCPWM0_TR_OUT039, 323 _CYHAL_TRIGGER_TCPWM0_TR_OUT040, 324 _CYHAL_TRIGGER_TCPWM0_TR_OUT041, 325 _CYHAL_TRIGGER_TCPWM0_TR_OUT042, 326 _CYHAL_TRIGGER_TCPWM0_TR_OUT043, 327 _CYHAL_TRIGGER_TCPWM0_TR_OUT044, 328 _CYHAL_TRIGGER_TCPWM0_TR_OUT045, 329 _CYHAL_TRIGGER_TCPWM0_TR_OUT046, 330 _CYHAL_TRIGGER_TCPWM0_TR_OUT047, 331 _CYHAL_TRIGGER_TCPWM0_TR_OUT048, 332 _CYHAL_TRIGGER_TCPWM0_TR_OUT049, 333 _CYHAL_TRIGGER_TCPWM0_TR_OUT050, 334 _CYHAL_TRIGGER_TCPWM0_TR_OUT051, 335 _CYHAL_TRIGGER_TCPWM0_TR_OUT052, 336 _CYHAL_TRIGGER_TCPWM0_TR_OUT053, 337 _CYHAL_TRIGGER_TCPWM0_TR_OUT054, 338 _CYHAL_TRIGGER_TCPWM0_TR_OUT055, 339 _CYHAL_TRIGGER_TCPWM0_TR_OUT056, 340 _CYHAL_TRIGGER_TCPWM0_TR_OUT057, 341 _CYHAL_TRIGGER_TCPWM0_TR_OUT058, 342 _CYHAL_TRIGGER_TCPWM0_TR_OUT059, 343 _CYHAL_TRIGGER_TCPWM0_TR_OUT060, 344 _CYHAL_TRIGGER_TCPWM0_TR_OUT061, 345 _CYHAL_TRIGGER_TCPWM0_TR_OUT062, 346 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 347 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 348 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 349 _CYHAL_TRIGGER_TCPWM0_TR_OUT0259, 350 _CYHAL_TRIGGER_TCPWM0_TR_OUT0260, 351 _CYHAL_TRIGGER_TCPWM0_TR_OUT0261, 352 _CYHAL_TRIGGER_TCPWM0_TR_OUT0262, 353 _CYHAL_TRIGGER_TCPWM0_TR_OUT0263, 354 _CYHAL_TRIGGER_TCPWM0_TR_OUT0264, 355 _CYHAL_TRIGGER_TCPWM0_TR_OUT0265, 356 _CYHAL_TRIGGER_TCPWM0_TR_OUT0266, 357 _CYHAL_TRIGGER_TCPWM0_TR_OUT0267, 358 _CYHAL_TRIGGER_TCPWM0_TR_OUT0512, 359 _CYHAL_TRIGGER_TCPWM0_TR_OUT0513, 360 _CYHAL_TRIGGER_TCPWM0_TR_OUT0514, 361 _CYHAL_TRIGGER_TCPWM0_TR_OUT0515, 362 _CYHAL_TRIGGER_TCPWM0_TR_OUT0516, 363 _CYHAL_TRIGGER_TCPWM0_TR_OUT0517, 364 _CYHAL_TRIGGER_TCPWM0_TR_OUT0518, 365 _CYHAL_TRIGGER_TCPWM0_TR_OUT0519, 366 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0, 367 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1, 368 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ2, 369 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ3, 370 _CYHAL_TRIGGER_CANFD0_TR_FIFO00, 371 _CYHAL_TRIGGER_CANFD0_TR_FIFO01, 372 _CYHAL_TRIGGER_CANFD0_TR_FIFO02, 373 _CYHAL_TRIGGER_CANFD0_TR_FIFO03, 374 _CYHAL_TRIGGER_CANFD0_TR_FIFO10, 375 _CYHAL_TRIGGER_CANFD0_TR_FIFO11, 376 _CYHAL_TRIGGER_CANFD0_TR_FIFO12, 377 _CYHAL_TRIGGER_CANFD0_TR_FIFO13, 378 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ0, 379 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ1, 380 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ2, 381 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ3, 382 _CYHAL_TRIGGER_CANFD1_TR_FIFO00, 383 _CYHAL_TRIGGER_CANFD1_TR_FIFO01, 384 _CYHAL_TRIGGER_CANFD1_TR_FIFO02, 385 _CYHAL_TRIGGER_CANFD1_TR_FIFO03, 386 _CYHAL_TRIGGER_CANFD1_TR_FIFO10, 387 _CYHAL_TRIGGER_CANFD1_TR_FIFO11, 388 _CYHAL_TRIGGER_CANFD1_TR_FIFO12, 389 _CYHAL_TRIGGER_CANFD1_TR_FIFO13, 390 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 391 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 392 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 393 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT3, 394 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 395 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 396 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 397 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT3, 398 _CYHAL_TRIGGER_EVTGEN0_TR_OUT4, 399 _CYHAL_TRIGGER_EVTGEN0_TR_OUT5, 400 _CYHAL_TRIGGER_EVTGEN0_TR_OUT6, 401 _CYHAL_TRIGGER_EVTGEN0_TR_OUT7, 402 _CYHAL_TRIGGER_EVTGEN0_TR_OUT8, 403 _CYHAL_TRIGGER_EVTGEN0_TR_OUT9, 404 _CYHAL_TRIGGER_EVTGEN0_TR_OUT10, 405 _CYHAL_TRIGGER_EVTGEN0_TR_OUT11, 406 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 407 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 408 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 409 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 410 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 411 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 412 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 413 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 414 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 415 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 416 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 417 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 418 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 419 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 420 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 421 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 422 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 423 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 424 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 425 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 426 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 427 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 428 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 429 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 430 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8, 431 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9, 432 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10, 433 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11, 434 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12, 435 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13, 436 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14, 437 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15, 438 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 439 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 440 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 441 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 442 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT4, 443 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT5, 444 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT6, 445 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT7, 446 _CYHAL_TRIGGER_SMIF0_TR_TX_REQ, 447 _CYHAL_TRIGGER_SMIF0_TR_RX_REQ, 448 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_TX_REQ, 449 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_RX_REQ, 450 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_TX_REQ, 451 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_RX_REQ, 452 _CYHAL_TRIGGER_AUDIOSS2_TR_I2S_TX_REQ, 453 _CYHAL_TRIGGER_AUDIOSS2_TR_I2S_RX_REQ, 454 }; 455 456 const _cyhal_trigger_source_xmc7100_t cyhal_mux6_sources[94] = 457 { 458 _CYHAL_TRIGGER_CPUSS_ZERO, 459 _CYHAL_TRIGGER_TCPWM0_TR_OUT10, 460 _CYHAL_TRIGGER_TCPWM0_TR_OUT11, 461 _CYHAL_TRIGGER_TCPWM0_TR_OUT12, 462 _CYHAL_TRIGGER_TCPWM0_TR_OUT13, 463 _CYHAL_TRIGGER_TCPWM0_TR_OUT14, 464 _CYHAL_TRIGGER_TCPWM0_TR_OUT15, 465 _CYHAL_TRIGGER_TCPWM0_TR_OUT16, 466 _CYHAL_TRIGGER_TCPWM0_TR_OUT17, 467 _CYHAL_TRIGGER_TCPWM0_TR_OUT18, 468 _CYHAL_TRIGGER_TCPWM0_TR_OUT19, 469 _CYHAL_TRIGGER_TCPWM0_TR_OUT110, 470 _CYHAL_TRIGGER_TCPWM0_TR_OUT111, 471 _CYHAL_TRIGGER_TCPWM0_TR_OUT112, 472 _CYHAL_TRIGGER_TCPWM0_TR_OUT113, 473 _CYHAL_TRIGGER_TCPWM0_TR_OUT114, 474 _CYHAL_TRIGGER_TCPWM0_TR_OUT115, 475 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 476 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 477 _CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, 478 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 479 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 480 _CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, 481 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 482 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 483 _CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, 484 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 485 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 486 _CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, 487 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 488 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 489 _CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, 490 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 491 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 492 _CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, 493 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 494 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 495 _CYHAL_TRIGGER_SCB6_TR_I2C_SCL_FILTERED, 496 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 497 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 498 _CYHAL_TRIGGER_SCB7_TR_I2C_SCL_FILTERED, 499 _CYHAL_TRIGGER_SCB8_TR_TX_REQ, 500 _CYHAL_TRIGGER_SCB8_TR_RX_REQ, 501 _CYHAL_TRIGGER_SCB8_TR_I2C_SCL_FILTERED, 502 _CYHAL_TRIGGER_SCB9_TR_TX_REQ, 503 _CYHAL_TRIGGER_SCB9_TR_RX_REQ, 504 _CYHAL_TRIGGER_SCB9_TR_I2C_SCL_FILTERED, 505 _CYHAL_TRIGGER_SCB10_TR_TX_REQ, 506 _CYHAL_TRIGGER_SCB10_TR_RX_REQ, 507 _CYHAL_TRIGGER_SCB10_TR_I2C_SCL_FILTERED, 508 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 509 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 510 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 511 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 512 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 513 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 514 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 515 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 516 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 517 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 518 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 519 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 520 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 521 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 522 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 523 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 524 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 525 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 526 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 527 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 528 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 529 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 530 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 531 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 532 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 533 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 534 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 535 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 536 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 537 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 538 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 539 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 540 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 541 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 542 _CYHAL_TRIGGER_PERI_TR_IO_INPUT28, 543 _CYHAL_TRIGGER_PERI_TR_IO_INPUT29, 544 _CYHAL_TRIGGER_PERI_TR_IO_INPUT30, 545 _CYHAL_TRIGGER_PERI_TR_IO_INPUT31, 546 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 547 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 548 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 549 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 550 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 551 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 552 }; 553 554 const _cyhal_trigger_source_xmc7100_t cyhal_mux7_sources[50] = 555 { 556 _CYHAL_TRIGGER_CPUSS_ZERO, 557 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 558 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 559 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 560 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 561 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 562 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 563 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 564 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 565 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 566 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 567 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 568 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 569 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 570 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 571 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 572 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 573 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 574 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 575 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 576 _CYHAL_TRIGGER_TCPWM0_TR_OUT0259, 577 _CYHAL_TRIGGER_TCPWM0_TR_OUT0260, 578 _CYHAL_TRIGGER_TCPWM0_TR_OUT0261, 579 _CYHAL_TRIGGER_TCPWM0_TR_OUT0262, 580 _CYHAL_TRIGGER_TCPWM0_TR_OUT0263, 581 _CYHAL_TRIGGER_TCPWM0_TR_OUT0264, 582 _CYHAL_TRIGGER_TCPWM0_TR_OUT0265, 583 _CYHAL_TRIGGER_TCPWM0_TR_OUT0266, 584 _CYHAL_TRIGGER_TCPWM0_TR_OUT0267, 585 _CYHAL_TRIGGER_TCPWM0_TR_OUT0512, 586 _CYHAL_TRIGGER_TCPWM0_TR_OUT0513, 587 _CYHAL_TRIGGER_TCPWM0_TR_OUT0514, 588 _CYHAL_TRIGGER_TCPWM0_TR_OUT0515, 589 _CYHAL_TRIGGER_TCPWM0_TR_OUT0516, 590 _CYHAL_TRIGGER_TCPWM0_TR_OUT0517, 591 _CYHAL_TRIGGER_TCPWM0_TR_OUT0518, 592 _CYHAL_TRIGGER_TCPWM0_TR_OUT0519, 593 _CYHAL_TRIGGER_TCPWM0_TR_OUT160, 594 _CYHAL_TRIGGER_TCPWM0_TR_OUT161, 595 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 596 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 597 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 598 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 599 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 600 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 601 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 602 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 603 _CYHAL_TRIGGER_EVTGEN0_TR_OUT12, 604 _CYHAL_TRIGGER_EVTGEN0_TR_OUT13, 605 _CYHAL_TRIGGER_EVTGEN0_TR_OUT14, 606 }; 607 608 const _cyhal_trigger_source_xmc7100_t cyhal_mux8_sources[9] = 609 { 610 _CYHAL_TRIGGER_CPUSS_ZERO, 611 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 612 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 613 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 614 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT3, 615 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 616 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 617 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 618 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT3, 619 }; 620 621 const _cyhal_trigger_source_xmc7100_t cyhal_mux9_sources[16] = 622 { 623 _CYHAL_TRIGGER_CPUSS_ZERO, 624 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT0, 625 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT1, 626 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT2, 627 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT3, 628 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT4, 629 _CYHAL_TRIGGER_TR_GROUP11_OUTPUT0, 630 _CYHAL_TRIGGER_TR_GROUP11_OUTPUT1, 631 _CYHAL_TRIGGER_TR_GROUP11_OUTPUT2, 632 _CYHAL_TRIGGER_TR_GROUP11_OUTPUT3, 633 _CYHAL_TRIGGER_TR_GROUP11_OUTPUT4, 634 _CYHAL_TRIGGER_TR_GROUP12_OUTPUT0, 635 _CYHAL_TRIGGER_TR_GROUP12_OUTPUT1, 636 _CYHAL_TRIGGER_TR_GROUP12_OUTPUT2, 637 _CYHAL_TRIGGER_TR_GROUP12_OUTPUT3, 638 _CYHAL_TRIGGER_TR_GROUP12_OUTPUT4, 639 }; 640 641 const _cyhal_trigger_source_xmc7100_t cyhal_mux10_sources[188] = 642 { 643 _CYHAL_TRIGGER_CPUSS_ZERO, 644 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 645 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 646 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 647 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 648 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 649 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 650 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 651 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 652 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 653 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 654 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 655 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 656 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 657 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 658 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 659 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 660 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT16, 661 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT17, 662 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT18, 663 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT19, 664 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT20, 665 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT21, 666 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT22, 667 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT23, 668 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT24, 669 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT25, 670 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT26, 671 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT27, 672 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT28, 673 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT29, 674 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT30, 675 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT31, 676 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT32, 677 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT33, 678 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT34, 679 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT35, 680 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT36, 681 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT37, 682 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT38, 683 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT39, 684 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT40, 685 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT41, 686 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT42, 687 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT43, 688 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT44, 689 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT45, 690 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT46, 691 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT47, 692 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT48, 693 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT49, 694 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT50, 695 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT51, 696 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT52, 697 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT53, 698 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT54, 699 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT55, 700 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT56, 701 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT57, 702 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT58, 703 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT59, 704 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT60, 705 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT61, 706 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT62, 707 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT63, 708 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT64, 709 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT65, 710 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT66, 711 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT67, 712 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT68, 713 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT69, 714 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT70, 715 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT71, 716 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT72, 717 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT73, 718 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT74, 719 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT75, 720 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT76, 721 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT77, 722 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT78, 723 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT79, 724 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT80, 725 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT81, 726 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT82, 727 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT83, 728 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT84, 729 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT85, 730 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT86, 731 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT87, 732 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT88, 733 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT89, 734 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT90, 735 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT91, 736 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT92, 737 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT93, 738 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT94, 739 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT95, 740 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT96, 741 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT97, 742 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT98, 743 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT99, 744 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 745 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 746 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 747 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 748 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 749 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 750 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 751 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 752 _CYHAL_TRIGGER_SCB8_TR_TX_REQ, 753 _CYHAL_TRIGGER_SCB9_TR_TX_REQ, 754 _CYHAL_TRIGGER_SCB10_TR_TX_REQ, 755 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 756 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 757 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 758 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 759 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 760 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 761 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 762 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 763 _CYHAL_TRIGGER_SCB8_TR_RX_REQ, 764 _CYHAL_TRIGGER_SCB9_TR_RX_REQ, 765 _CYHAL_TRIGGER_SCB10_TR_RX_REQ, 766 _CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, 767 _CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, 768 _CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, 769 _CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, 770 _CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, 771 _CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, 772 _CYHAL_TRIGGER_SCB6_TR_I2C_SCL_FILTERED, 773 _CYHAL_TRIGGER_SCB7_TR_I2C_SCL_FILTERED, 774 _CYHAL_TRIGGER_SCB8_TR_I2C_SCL_FILTERED, 775 _CYHAL_TRIGGER_SCB9_TR_I2C_SCL_FILTERED, 776 _CYHAL_TRIGGER_SCB10_TR_I2C_SCL_FILTERED, 777 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0, 778 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1, 779 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ2, 780 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ3, 781 _CYHAL_TRIGGER_CANFD0_TR_FIFO00, 782 _CYHAL_TRIGGER_CANFD0_TR_FIFO01, 783 _CYHAL_TRIGGER_CANFD0_TR_FIFO02, 784 _CYHAL_TRIGGER_CANFD0_TR_FIFO03, 785 _CYHAL_TRIGGER_CANFD0_TR_FIFO10, 786 _CYHAL_TRIGGER_CANFD0_TR_FIFO11, 787 _CYHAL_TRIGGER_CANFD0_TR_FIFO12, 788 _CYHAL_TRIGGER_CANFD0_TR_FIFO13, 789 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 790 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 791 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 792 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT3, 793 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ0, 794 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ1, 795 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ2, 796 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ3, 797 _CYHAL_TRIGGER_CANFD1_TR_FIFO00, 798 _CYHAL_TRIGGER_CANFD1_TR_FIFO01, 799 _CYHAL_TRIGGER_CANFD1_TR_FIFO02, 800 _CYHAL_TRIGGER_CANFD1_TR_FIFO03, 801 _CYHAL_TRIGGER_CANFD1_TR_FIFO10, 802 _CYHAL_TRIGGER_CANFD1_TR_FIFO11, 803 _CYHAL_TRIGGER_CANFD1_TR_FIFO12, 804 _CYHAL_TRIGGER_CANFD1_TR_FIFO13, 805 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 806 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 807 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 808 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT3, 809 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 810 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 811 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 812 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 813 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 814 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 815 _CYHAL_TRIGGER_EVTGEN0_TR_OUT0, 816 _CYHAL_TRIGGER_EVTGEN0_TR_OUT1, 817 _CYHAL_TRIGGER_EVTGEN0_TR_OUT2, 818 _CYHAL_TRIGGER_EVTGEN0_TR_OUT3, 819 _CYHAL_TRIGGER_EVTGEN0_TR_OUT4, 820 _CYHAL_TRIGGER_EVTGEN0_TR_OUT5, 821 _CYHAL_TRIGGER_EVTGEN0_TR_OUT6, 822 _CYHAL_TRIGGER_EVTGEN0_TR_OUT7, 823 _CYHAL_TRIGGER_EVTGEN0_TR_OUT8, 824 _CYHAL_TRIGGER_EVTGEN0_TR_OUT9, 825 _CYHAL_TRIGGER_EVTGEN0_TR_OUT10, 826 _CYHAL_TRIGGER_EVTGEN0_TR_OUT11, 827 _CYHAL_TRIGGER_EVTGEN0_TR_OUT12, 828 _CYHAL_TRIGGER_EVTGEN0_TR_OUT13, 829 _CYHAL_TRIGGER_EVTGEN0_TR_OUT14, 830 _CYHAL_TRIGGER_EVTGEN0_TR_OUT15, 831 }; 832 833 const _cyhal_trigger_source_xmc7100_t cyhal_mux11_sources[124] = 834 { 835 _CYHAL_TRIGGER_CPUSS_ZERO, 836 _CYHAL_TRIGGER_TCPWM0_TR_OUT0512, 837 _CYHAL_TRIGGER_TCPWM0_TR_OUT0513, 838 _CYHAL_TRIGGER_TCPWM0_TR_OUT0514, 839 _CYHAL_TRIGGER_TCPWM0_TR_OUT0515, 840 _CYHAL_TRIGGER_TCPWM0_TR_OUT0516, 841 _CYHAL_TRIGGER_TCPWM0_TR_OUT0517, 842 _CYHAL_TRIGGER_TCPWM0_TR_OUT0518, 843 _CYHAL_TRIGGER_TCPWM0_TR_OUT0519, 844 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 845 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 846 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 847 _CYHAL_TRIGGER_TCPWM0_TR_OUT0259, 848 _CYHAL_TRIGGER_TCPWM0_TR_OUT0260, 849 _CYHAL_TRIGGER_TCPWM0_TR_OUT0261, 850 _CYHAL_TRIGGER_TCPWM0_TR_OUT0262, 851 _CYHAL_TRIGGER_TCPWM0_TR_OUT0263, 852 _CYHAL_TRIGGER_TCPWM0_TR_OUT0264, 853 _CYHAL_TRIGGER_TCPWM0_TR_OUT0265, 854 _CYHAL_TRIGGER_TCPWM0_TR_OUT0266, 855 _CYHAL_TRIGGER_TCPWM0_TR_OUT0267, 856 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 857 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 858 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 859 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 860 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 861 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 862 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 863 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 864 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 865 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 866 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 867 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 868 _CYHAL_TRIGGER_TCPWM0_TR_OUT012, 869 _CYHAL_TRIGGER_TCPWM0_TR_OUT013, 870 _CYHAL_TRIGGER_TCPWM0_TR_OUT014, 871 _CYHAL_TRIGGER_TCPWM0_TR_OUT015, 872 _CYHAL_TRIGGER_TCPWM0_TR_OUT016, 873 _CYHAL_TRIGGER_TCPWM0_TR_OUT017, 874 _CYHAL_TRIGGER_TCPWM0_TR_OUT018, 875 _CYHAL_TRIGGER_TCPWM0_TR_OUT019, 876 _CYHAL_TRIGGER_TCPWM0_TR_OUT020, 877 _CYHAL_TRIGGER_TCPWM0_TR_OUT021, 878 _CYHAL_TRIGGER_TCPWM0_TR_OUT022, 879 _CYHAL_TRIGGER_TCPWM0_TR_OUT023, 880 _CYHAL_TRIGGER_TCPWM0_TR_OUT024, 881 _CYHAL_TRIGGER_TCPWM0_TR_OUT025, 882 _CYHAL_TRIGGER_TCPWM0_TR_OUT026, 883 _CYHAL_TRIGGER_TCPWM0_TR_OUT027, 884 _CYHAL_TRIGGER_TCPWM0_TR_OUT028, 885 _CYHAL_TRIGGER_TCPWM0_TR_OUT029, 886 _CYHAL_TRIGGER_TCPWM0_TR_OUT030, 887 _CYHAL_TRIGGER_TCPWM0_TR_OUT031, 888 _CYHAL_TRIGGER_TCPWM0_TR_OUT032, 889 _CYHAL_TRIGGER_TCPWM0_TR_OUT033, 890 _CYHAL_TRIGGER_TCPWM0_TR_OUT034, 891 _CYHAL_TRIGGER_TCPWM0_TR_OUT035, 892 _CYHAL_TRIGGER_TCPWM0_TR_OUT036, 893 _CYHAL_TRIGGER_TCPWM0_TR_OUT037, 894 _CYHAL_TRIGGER_TCPWM0_TR_OUT038, 895 _CYHAL_TRIGGER_TCPWM0_TR_OUT039, 896 _CYHAL_TRIGGER_TCPWM0_TR_OUT040, 897 _CYHAL_TRIGGER_TCPWM0_TR_OUT041, 898 _CYHAL_TRIGGER_TCPWM0_TR_OUT042, 899 _CYHAL_TRIGGER_TCPWM0_TR_OUT043, 900 _CYHAL_TRIGGER_TCPWM0_TR_OUT044, 901 _CYHAL_TRIGGER_TCPWM0_TR_OUT045, 902 _CYHAL_TRIGGER_TCPWM0_TR_OUT046, 903 _CYHAL_TRIGGER_TCPWM0_TR_OUT047, 904 _CYHAL_TRIGGER_TCPWM0_TR_OUT048, 905 _CYHAL_TRIGGER_TCPWM0_TR_OUT049, 906 _CYHAL_TRIGGER_TCPWM0_TR_OUT050, 907 _CYHAL_TRIGGER_TCPWM0_TR_OUT051, 908 _CYHAL_TRIGGER_TCPWM0_TR_OUT052, 909 _CYHAL_TRIGGER_TCPWM0_TR_OUT053, 910 _CYHAL_TRIGGER_TCPWM0_TR_OUT054, 911 _CYHAL_TRIGGER_TCPWM0_TR_OUT055, 912 _CYHAL_TRIGGER_TCPWM0_TR_OUT056, 913 _CYHAL_TRIGGER_TCPWM0_TR_OUT057, 914 _CYHAL_TRIGGER_TCPWM0_TR_OUT058, 915 _CYHAL_TRIGGER_TCPWM0_TR_OUT059, 916 _CYHAL_TRIGGER_TCPWM0_TR_OUT060, 917 _CYHAL_TRIGGER_TCPWM0_TR_OUT061, 918 _CYHAL_TRIGGER_TCPWM0_TR_OUT062, 919 _CYHAL_TRIGGER_SMIF0_TR_TX_REQ, 920 _CYHAL_TRIGGER_SMIF0_TR_RX_REQ, 921 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_TX_REQ, 922 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_RX_REQ, 923 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_TX_REQ, 924 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_RX_REQ, 925 _CYHAL_TRIGGER_AUDIOSS2_TR_I2S_TX_REQ, 926 _CYHAL_TRIGGER_AUDIOSS2_TR_I2S_RX_REQ, 927 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 928 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 929 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 930 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 931 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 932 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 933 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 934 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 935 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 936 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 937 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 938 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 939 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 940 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 941 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 942 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 943 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 944 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 945 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 946 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 947 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 948 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 949 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 950 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 951 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 952 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 953 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 954 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 955 _CYHAL_TRIGGER_PERI_TR_IO_INPUT28, 956 _CYHAL_TRIGGER_PERI_TR_IO_INPUT29, 957 _CYHAL_TRIGGER_PERI_TR_IO_INPUT30, 958 _CYHAL_TRIGGER_PERI_TR_IO_INPUT31, 959 }; 960 961 const _cyhal_trigger_source_xmc7100_t cyhal_mux12_sources[156] = 962 { 963 _CYHAL_TRIGGER_CPUSS_ZERO, 964 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 965 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 966 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 967 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 968 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 969 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 970 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 971 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 972 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8, 973 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9, 974 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10, 975 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11, 976 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12, 977 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13, 978 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14, 979 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15, 980 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT16, 981 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT17, 982 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT18, 983 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT19, 984 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT20, 985 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT21, 986 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT22, 987 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT23, 988 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT24, 989 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT25, 990 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT26, 991 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT27, 992 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT28, 993 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT29, 994 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT30, 995 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT31, 996 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT32, 997 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT33, 998 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT34, 999 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT35, 1000 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT36, 1001 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT37, 1002 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT38, 1003 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT39, 1004 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT40, 1005 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT41, 1006 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT42, 1007 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT43, 1008 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT44, 1009 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT45, 1010 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT46, 1011 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT47, 1012 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT48, 1013 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT49, 1014 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT50, 1015 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT51, 1016 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT52, 1017 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT53, 1018 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT54, 1019 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT55, 1020 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT56, 1021 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT57, 1022 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 1023 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 1024 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 1025 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 1026 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT4, 1027 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT5, 1028 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT6, 1029 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT7, 1030 _CYHAL_TRIGGER_TCPWM0_TR_OUT10, 1031 _CYHAL_TRIGGER_TCPWM0_TR_OUT11, 1032 _CYHAL_TRIGGER_TCPWM0_TR_OUT12, 1033 _CYHAL_TRIGGER_TCPWM0_TR_OUT13, 1034 _CYHAL_TRIGGER_TCPWM0_TR_OUT14, 1035 _CYHAL_TRIGGER_TCPWM0_TR_OUT15, 1036 _CYHAL_TRIGGER_TCPWM0_TR_OUT16, 1037 _CYHAL_TRIGGER_TCPWM0_TR_OUT17, 1038 _CYHAL_TRIGGER_TCPWM0_TR_OUT18, 1039 _CYHAL_TRIGGER_TCPWM0_TR_OUT19, 1040 _CYHAL_TRIGGER_TCPWM0_TR_OUT110, 1041 _CYHAL_TRIGGER_TCPWM0_TR_OUT111, 1042 _CYHAL_TRIGGER_TCPWM0_TR_OUT112, 1043 _CYHAL_TRIGGER_TCPWM0_TR_OUT113, 1044 _CYHAL_TRIGGER_TCPWM0_TR_OUT114, 1045 _CYHAL_TRIGGER_TCPWM0_TR_OUT115, 1046 _CYHAL_TRIGGER_TCPWM0_TR_OUT116, 1047 _CYHAL_TRIGGER_TCPWM0_TR_OUT117, 1048 _CYHAL_TRIGGER_TCPWM0_TR_OUT118, 1049 _CYHAL_TRIGGER_TCPWM0_TR_OUT119, 1050 _CYHAL_TRIGGER_TCPWM0_TR_OUT120, 1051 _CYHAL_TRIGGER_TCPWM0_TR_OUT121, 1052 _CYHAL_TRIGGER_TCPWM0_TR_OUT122, 1053 _CYHAL_TRIGGER_TCPWM0_TR_OUT123, 1054 _CYHAL_TRIGGER_TCPWM0_TR_OUT124, 1055 _CYHAL_TRIGGER_TCPWM0_TR_OUT125, 1056 _CYHAL_TRIGGER_TCPWM0_TR_OUT126, 1057 _CYHAL_TRIGGER_TCPWM0_TR_OUT127, 1058 _CYHAL_TRIGGER_TCPWM0_TR_OUT128, 1059 _CYHAL_TRIGGER_TCPWM0_TR_OUT129, 1060 _CYHAL_TRIGGER_TCPWM0_TR_OUT130, 1061 _CYHAL_TRIGGER_TCPWM0_TR_OUT131, 1062 _CYHAL_TRIGGER_TCPWM0_TR_OUT132, 1063 _CYHAL_TRIGGER_TCPWM0_TR_OUT133, 1064 _CYHAL_TRIGGER_TCPWM0_TR_OUT134, 1065 _CYHAL_TRIGGER_TCPWM0_TR_OUT135, 1066 _CYHAL_TRIGGER_TCPWM0_TR_OUT136, 1067 _CYHAL_TRIGGER_TCPWM0_TR_OUT137, 1068 _CYHAL_TRIGGER_TCPWM0_TR_OUT138, 1069 _CYHAL_TRIGGER_TCPWM0_TR_OUT139, 1070 _CYHAL_TRIGGER_TCPWM0_TR_OUT140, 1071 _CYHAL_TRIGGER_TCPWM0_TR_OUT141, 1072 _CYHAL_TRIGGER_TCPWM0_TR_OUT142, 1073 _CYHAL_TRIGGER_TCPWM0_TR_OUT143, 1074 _CYHAL_TRIGGER_TCPWM0_TR_OUT144, 1075 _CYHAL_TRIGGER_TCPWM0_TR_OUT145, 1076 _CYHAL_TRIGGER_TCPWM0_TR_OUT146, 1077 _CYHAL_TRIGGER_TCPWM0_TR_OUT147, 1078 _CYHAL_TRIGGER_TCPWM0_TR_OUT148, 1079 _CYHAL_TRIGGER_TCPWM0_TR_OUT149, 1080 _CYHAL_TRIGGER_TCPWM0_TR_OUT150, 1081 _CYHAL_TRIGGER_TCPWM0_TR_OUT151, 1082 _CYHAL_TRIGGER_TCPWM0_TR_OUT152, 1083 _CYHAL_TRIGGER_TCPWM0_TR_OUT153, 1084 _CYHAL_TRIGGER_TCPWM0_TR_OUT154, 1085 _CYHAL_TRIGGER_TCPWM0_TR_OUT155, 1086 _CYHAL_TRIGGER_TCPWM0_TR_OUT156, 1087 _CYHAL_TRIGGER_TCPWM0_TR_OUT157, 1088 _CYHAL_TRIGGER_TCPWM0_TR_OUT158, 1089 _CYHAL_TRIGGER_TCPWM0_TR_OUT159, 1090 _CYHAL_TRIGGER_TCPWM0_TR_OUT160, 1091 _CYHAL_TRIGGER_TCPWM0_TR_OUT161, 1092 _CYHAL_TRIGGER_TCPWM0_TR_OUT162, 1093 _CYHAL_TRIGGER_TCPWM0_TR_OUT1256, 1094 _CYHAL_TRIGGER_TCPWM0_TR_OUT1257, 1095 _CYHAL_TRIGGER_TCPWM0_TR_OUT1258, 1096 _CYHAL_TRIGGER_TCPWM0_TR_OUT1259, 1097 _CYHAL_TRIGGER_TCPWM0_TR_OUT1260, 1098 _CYHAL_TRIGGER_TCPWM0_TR_OUT1261, 1099 _CYHAL_TRIGGER_TCPWM0_TR_OUT1262, 1100 _CYHAL_TRIGGER_TCPWM0_TR_OUT1263, 1101 _CYHAL_TRIGGER_TCPWM0_TR_OUT1264, 1102 _CYHAL_TRIGGER_TCPWM0_TR_OUT1265, 1103 _CYHAL_TRIGGER_TCPWM0_TR_OUT1266, 1104 _CYHAL_TRIGGER_TCPWM0_TR_OUT1267, 1105 _CYHAL_TRIGGER_TCPWM0_TR_OUT1512, 1106 _CYHAL_TRIGGER_TCPWM0_TR_OUT1513, 1107 _CYHAL_TRIGGER_TCPWM0_TR_OUT1514, 1108 _CYHAL_TRIGGER_TCPWM0_TR_OUT1515, 1109 _CYHAL_TRIGGER_TCPWM0_TR_OUT1516, 1110 _CYHAL_TRIGGER_TCPWM0_TR_OUT1517, 1111 _CYHAL_TRIGGER_TCPWM0_TR_OUT1518, 1112 _CYHAL_TRIGGER_TCPWM0_TR_OUT1519, 1113 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 1114 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 1115 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 1116 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 1117 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 1118 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 1119 }; 1120 1121 const _cyhal_trigger_source_xmc7100_t cyhal_mux13_sources[12] = 1122 { 1123 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0, 1124 _CYHAL_TRIGGER_CANFD0_TR_FIFO00, 1125 _CYHAL_TRIGGER_CANFD0_TR_FIFO10, 1126 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1, 1127 _CYHAL_TRIGGER_CANFD0_TR_FIFO01, 1128 _CYHAL_TRIGGER_CANFD0_TR_FIFO11, 1129 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ2, 1130 _CYHAL_TRIGGER_CANFD0_TR_FIFO02, 1131 _CYHAL_TRIGGER_CANFD0_TR_FIFO12, 1132 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ3, 1133 _CYHAL_TRIGGER_CANFD0_TR_FIFO03, 1134 _CYHAL_TRIGGER_CANFD0_TR_FIFO13, 1135 }; 1136 1137 const _cyhal_trigger_source_xmc7100_t cyhal_mux14_sources[72] = 1138 { 1139 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE0, 1140 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE1, 1141 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE2, 1142 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE3, 1143 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE4, 1144 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE5, 1145 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE6, 1146 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE7, 1147 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE8, 1148 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE9, 1149 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE10, 1150 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE11, 1151 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE12, 1152 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE13, 1153 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE14, 1154 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE15, 1155 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE16, 1156 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE17, 1157 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE18, 1158 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE19, 1159 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE20, 1160 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE21, 1161 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE22, 1162 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE23, 1163 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE24, 1164 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE25, 1165 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE26, 1166 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE27, 1167 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE28, 1168 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE29, 1169 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE30, 1170 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE31, 1171 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE32, 1172 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE33, 1173 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE34, 1174 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE35, 1175 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE36, 1176 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE37, 1177 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE38, 1178 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE39, 1179 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE40, 1180 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE41, 1181 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE42, 1182 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE43, 1183 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE44, 1184 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE45, 1185 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE46, 1186 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE47, 1187 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE48, 1188 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE49, 1189 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE50, 1190 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE51, 1191 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE52, 1192 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE53, 1193 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE54, 1194 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE55, 1195 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE56, 1196 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE57, 1197 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE58, 1198 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE59, 1199 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE60, 1200 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE61, 1201 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE62, 1202 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE63, 1203 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE64, 1204 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE65, 1205 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE66, 1206 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE67, 1207 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE68, 1208 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE69, 1209 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE70, 1210 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE71, 1211 }; 1212 1213 const _cyhal_trigger_source_xmc7100_t cyhal_mux15_sources[22] = 1214 { 1215 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 1216 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 1217 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 1218 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 1219 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 1220 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 1221 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 1222 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 1223 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 1224 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 1225 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 1226 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 1227 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 1228 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 1229 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 1230 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 1231 _CYHAL_TRIGGER_SCB8_TR_TX_REQ, 1232 _CYHAL_TRIGGER_SCB8_TR_RX_REQ, 1233 _CYHAL_TRIGGER_SCB9_TR_TX_REQ, 1234 _CYHAL_TRIGGER_SCB9_TR_RX_REQ, 1235 _CYHAL_TRIGGER_SCB10_TR_TX_REQ, 1236 _CYHAL_TRIGGER_SCB10_TR_RX_REQ, 1237 }; 1238 1239 const _cyhal_trigger_source_xmc7100_t cyhal_mux16_sources[2] = 1240 { 1241 _CYHAL_TRIGGER_SMIF0_TR_TX_REQ, 1242 _CYHAL_TRIGGER_SMIF0_TR_RX_REQ, 1243 }; 1244 1245 const _cyhal_trigger_source_xmc7100_t cyhal_mux17_sources[12] = 1246 { 1247 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ0, 1248 _CYHAL_TRIGGER_CANFD1_TR_FIFO00, 1249 _CYHAL_TRIGGER_CANFD1_TR_FIFO10, 1250 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ1, 1251 _CYHAL_TRIGGER_CANFD1_TR_FIFO01, 1252 _CYHAL_TRIGGER_CANFD1_TR_FIFO11, 1253 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ2, 1254 _CYHAL_TRIGGER_CANFD1_TR_FIFO02, 1255 _CYHAL_TRIGGER_CANFD1_TR_FIFO12, 1256 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ3, 1257 _CYHAL_TRIGGER_CANFD1_TR_FIFO03, 1258 _CYHAL_TRIGGER_CANFD1_TR_FIFO13, 1259 }; 1260 1261 const _cyhal_trigger_source_xmc7100_t cyhal_mux18_sources[6] = 1262 { 1263 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_TX_REQ, 1264 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_RX_REQ, 1265 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_TX_REQ, 1266 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_RX_REQ, 1267 _CYHAL_TRIGGER_AUDIOSS2_TR_I2S_TX_REQ, 1268 _CYHAL_TRIGGER_AUDIOSS2_TR_I2S_RX_REQ, 1269 }; 1270 1271 const _cyhal_trigger_source_xmc7100_t cyhal_mux19_sources[72] = 1272 { 1273 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO0, 1274 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO1, 1275 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO2, 1276 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO3, 1277 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO4, 1278 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO5, 1279 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO6, 1280 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO7, 1281 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO8, 1282 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO9, 1283 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO10, 1284 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO11, 1285 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO12, 1286 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO13, 1287 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO14, 1288 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO15, 1289 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO16, 1290 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO17, 1291 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO18, 1292 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO19, 1293 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO20, 1294 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO21, 1295 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO22, 1296 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO23, 1297 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO24, 1298 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO25, 1299 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO26, 1300 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO27, 1301 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO28, 1302 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO29, 1303 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO30, 1304 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO31, 1305 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO32, 1306 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO33, 1307 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO34, 1308 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO35, 1309 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO36, 1310 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO37, 1311 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO38, 1312 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO39, 1313 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO40, 1314 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO41, 1315 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO42, 1316 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO43, 1317 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO44, 1318 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO45, 1319 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO46, 1320 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO47, 1321 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO48, 1322 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO49, 1323 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO50, 1324 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO51, 1325 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO52, 1326 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO53, 1327 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO54, 1328 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO55, 1329 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO56, 1330 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO57, 1331 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO58, 1332 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO59, 1333 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO60, 1334 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO61, 1335 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO62, 1336 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO63, 1337 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO64, 1338 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO65, 1339 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO66, 1340 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO67, 1341 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO68, 1342 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO69, 1343 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO70, 1344 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO71, 1345 }; 1346 1347 const _cyhal_trigger_source_xmc7100_t cyhal_mux20_sources[72] = 1348 { 1349 _CYHAL_TRIGGER_TCPWM0_TR_OUT1256, 1350 _CYHAL_TRIGGER_TCPWM0_TR_OUT1259, 1351 _CYHAL_TRIGGER_TCPWM0_TR_OUT1262, 1352 _CYHAL_TRIGGER_TCPWM0_TR_OUT1265, 1353 _CYHAL_TRIGGER_TCPWM0_TR_OUT10, 1354 _CYHAL_TRIGGER_TCPWM0_TR_OUT11, 1355 _CYHAL_TRIGGER_TCPWM0_TR_OUT12, 1356 _CYHAL_TRIGGER_TCPWM0_TR_OUT13, 1357 _CYHAL_TRIGGER_TCPWM0_TR_OUT14, 1358 _CYHAL_TRIGGER_TCPWM0_TR_OUT15, 1359 _CYHAL_TRIGGER_TCPWM0_TR_OUT16, 1360 _CYHAL_TRIGGER_TCPWM0_TR_OUT17, 1361 _CYHAL_TRIGGER_TCPWM0_TR_OUT18, 1362 _CYHAL_TRIGGER_TCPWM0_TR_OUT19, 1363 _CYHAL_TRIGGER_TCPWM0_TR_OUT110, 1364 _CYHAL_TRIGGER_TCPWM0_TR_OUT111, 1365 _CYHAL_TRIGGER_TCPWM0_TR_OUT112, 1366 _CYHAL_TRIGGER_TCPWM0_TR_OUT113, 1367 _CYHAL_TRIGGER_TCPWM0_TR_OUT114, 1368 _CYHAL_TRIGGER_TCPWM0_TR_OUT115, 1369 _CYHAL_TRIGGER_TCPWM0_TR_OUT116, 1370 _CYHAL_TRIGGER_TCPWM0_TR_OUT117, 1371 _CYHAL_TRIGGER_TCPWM0_TR_OUT118, 1372 _CYHAL_TRIGGER_TCPWM0_TR_OUT119, 1373 _CYHAL_TRIGGER_TCPWM0_TR_OUT120, 1374 _CYHAL_TRIGGER_TCPWM0_TR_OUT121, 1375 _CYHAL_TRIGGER_TCPWM0_TR_OUT122, 1376 _CYHAL_TRIGGER_TCPWM0_TR_OUT123, 1377 _CYHAL_TRIGGER_TCPWM0_TR_OUT124, 1378 _CYHAL_TRIGGER_TCPWM0_TR_OUT125, 1379 _CYHAL_TRIGGER_TCPWM0_TR_OUT126, 1380 _CYHAL_TRIGGER_TCPWM0_TR_OUT127, 1381 _CYHAL_TRIGGER_TCPWM0_TR_OUT1257, 1382 _CYHAL_TRIGGER_TCPWM0_TR_OUT1260, 1383 _CYHAL_TRIGGER_TCPWM0_TR_OUT1263, 1384 _CYHAL_TRIGGER_TCPWM0_TR_OUT1266, 1385 _CYHAL_TRIGGER_TCPWM0_TR_OUT128, 1386 _CYHAL_TRIGGER_TCPWM0_TR_OUT129, 1387 _CYHAL_TRIGGER_TCPWM0_TR_OUT130, 1388 _CYHAL_TRIGGER_TCPWM0_TR_OUT131, 1389 _CYHAL_TRIGGER_TCPWM0_TR_OUT132, 1390 _CYHAL_TRIGGER_TCPWM0_TR_OUT133, 1391 _CYHAL_TRIGGER_TCPWM0_TR_OUT134, 1392 _CYHAL_TRIGGER_TCPWM0_TR_OUT135, 1393 _CYHAL_TRIGGER_TCPWM0_TR_OUT136, 1394 _CYHAL_TRIGGER_TCPWM0_TR_OUT137, 1395 _CYHAL_TRIGGER_TCPWM0_TR_OUT138, 1396 _CYHAL_TRIGGER_TCPWM0_TR_OUT139, 1397 _CYHAL_TRIGGER_TCPWM0_TR_OUT140, 1398 _CYHAL_TRIGGER_TCPWM0_TR_OUT141, 1399 _CYHAL_TRIGGER_TCPWM0_TR_OUT142, 1400 _CYHAL_TRIGGER_TCPWM0_TR_OUT143, 1401 _CYHAL_TRIGGER_TCPWM0_TR_OUT144, 1402 _CYHAL_TRIGGER_TCPWM0_TR_OUT145, 1403 _CYHAL_TRIGGER_TCPWM0_TR_OUT146, 1404 _CYHAL_TRIGGER_TCPWM0_TR_OUT147, 1405 _CYHAL_TRIGGER_TCPWM0_TR_OUT148, 1406 _CYHAL_TRIGGER_TCPWM0_TR_OUT149, 1407 _CYHAL_TRIGGER_TCPWM0_TR_OUT150, 1408 _CYHAL_TRIGGER_TCPWM0_TR_OUT151, 1409 _CYHAL_TRIGGER_TCPWM0_TR_OUT152, 1410 _CYHAL_TRIGGER_TCPWM0_TR_OUT153, 1411 _CYHAL_TRIGGER_TCPWM0_TR_OUT154, 1412 _CYHAL_TRIGGER_TCPWM0_TR_OUT155, 1413 _CYHAL_TRIGGER_TCPWM0_TR_OUT1258, 1414 _CYHAL_TRIGGER_TCPWM0_TR_OUT1261, 1415 _CYHAL_TRIGGER_TCPWM0_TR_OUT1264, 1416 _CYHAL_TRIGGER_TCPWM0_TR_OUT1267, 1417 _CYHAL_TRIGGER_TCPWM0_TR_OUT156, 1418 _CYHAL_TRIGGER_TCPWM0_TR_OUT157, 1419 _CYHAL_TRIGGER_TCPWM0_TR_OUT158, 1420 _CYHAL_TRIGGER_TCPWM0_TR_OUT159, 1421 }; 1422 1423 const _cyhal_trigger_source_xmc7100_t cyhal_mux21_sources[4] = 1424 { 1425 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT38, 1426 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT41, 1427 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT44, 1428 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT47, 1429 }; 1430 1431 const _cyhal_trigger_source_xmc7100_t cyhal_mux22_sources[4] = 1432 { 1433 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT16, 1434 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT19, 1435 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT22, 1436 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT25, 1437 }; 1438 1439 const _cyhal_trigger_source_xmc7100_t cyhal_mux23_sources[16] = 1440 { 1441 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 1442 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 1443 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 1444 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 1445 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 1446 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 1447 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 1448 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 1449 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 1450 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 1451 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 1452 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 1453 _CYHAL_TRIGGER_TCPWM0_TR_OUT012, 1454 _CYHAL_TRIGGER_TCPWM0_TR_OUT013, 1455 _CYHAL_TRIGGER_TCPWM0_TR_OUT014, 1456 _CYHAL_TRIGGER_TCPWM0_TR_OUT015, 1457 }; 1458 1459 const _cyhal_trigger_source_xmc7100_t* cyhal_mux_to_sources[24] = 1460 { 1461 cyhal_mux0_sources, 1462 cyhal_mux1_sources, 1463 cyhal_mux2_sources, 1464 cyhal_mux3_sources, 1465 NULL, 1466 cyhal_mux5_sources, 1467 cyhal_mux6_sources, 1468 cyhal_mux7_sources, 1469 cyhal_mux8_sources, 1470 cyhal_mux9_sources, 1471 cyhal_mux10_sources, 1472 cyhal_mux11_sources, 1473 cyhal_mux12_sources, 1474 cyhal_mux13_sources, 1475 cyhal_mux14_sources, 1476 cyhal_mux15_sources, 1477 cyhal_mux16_sources, 1478 cyhal_mux17_sources, 1479 cyhal_mux18_sources, 1480 cyhal_mux19_sources, 1481 cyhal_mux20_sources, 1482 cyhal_mux21_sources, 1483 cyhal_mux22_sources, 1484 cyhal_mux23_sources, 1485 }; 1486 1487 const uint8_t cyhal_dest_to_mux[407] = 1488 { 1489 137, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK0 */ 1490 137, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK1 */ 1491 137, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK2 */ 1492 137, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK3 */ 1493 136, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK0 */ 1494 136, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK1 */ 1495 136, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK2 */ 1496 136, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK3 */ 1497 8, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN0 */ 1498 8, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN1 */ 1499 8, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN2 */ 1500 8, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN3 */ 1501 8, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN0 */ 1502 8, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN1 */ 1503 8, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN2 */ 1504 8, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN3 */ 1505 9, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN0 */ 1506 9, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN1 */ 1507 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN0 */ 1508 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN1 */ 1509 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN2 */ 1510 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN3 */ 1511 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN4 */ 1512 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN5 */ 1513 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN6 */ 1514 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN7 */ 1515 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 */ 1516 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN1 */ 1517 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN2 */ 1518 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN3 */ 1519 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN4 */ 1520 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN5 */ 1521 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN6 */ 1522 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN7 */ 1523 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN8 */ 1524 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN9 */ 1525 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN10 */ 1526 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN11 */ 1527 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN12 */ 1528 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN13 */ 1529 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN14 */ 1530 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN15 */ 1531 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN16 */ 1532 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN17 */ 1533 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN18 */ 1534 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN19 */ 1535 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN20 */ 1536 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN21 */ 1537 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN22 */ 1538 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN23 */ 1539 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN24 */ 1540 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN25 */ 1541 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN26 */ 1542 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN27 */ 1543 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN28 */ 1544 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN29 */ 1545 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN30 */ 1546 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN31 */ 1547 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN32 */ 1548 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN33 */ 1549 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN34 */ 1550 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN35 */ 1551 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN36 */ 1552 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN37 */ 1553 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN38 */ 1554 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN39 */ 1555 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN40 */ 1556 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN41 */ 1557 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN42 */ 1558 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN43 */ 1559 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN44 */ 1560 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN45 */ 1561 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN46 */ 1562 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN47 */ 1563 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN48 */ 1564 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN49 */ 1565 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN50 */ 1566 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN51 */ 1567 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN52 */ 1568 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN53 */ 1569 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN54 */ 1570 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN55 */ 1571 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN56 */ 1572 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN57 */ 1573 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN58 */ 1574 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN59 */ 1575 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN60 */ 1576 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN61 */ 1577 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN62 */ 1578 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN63 */ 1579 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN64 */ 1580 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN65 */ 1581 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN66 */ 1582 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN67 */ 1583 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN68 */ 1584 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN69 */ 1585 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN70 */ 1586 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN71 */ 1587 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN72 */ 1588 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN73 */ 1589 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN74 */ 1590 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN75 */ 1591 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN76 */ 1592 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN77 */ 1593 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN78 */ 1594 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN79 */ 1595 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN80 */ 1596 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN81 */ 1597 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN82 */ 1598 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN83 */ 1599 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN84 */ 1600 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN85 */ 1601 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN86 */ 1602 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN87 */ 1603 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN88 */ 1604 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN89 */ 1605 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN90 */ 1606 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN91 */ 1607 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN92 */ 1608 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN93 */ 1609 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN94 */ 1610 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN95 */ 1611 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN96 */ 1612 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN97 */ 1613 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN98 */ 1614 129, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN99 */ 1615 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN0 */ 1616 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN1 */ 1617 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN2 */ 1618 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN3 */ 1619 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN4 */ 1620 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN5 */ 1621 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN6 */ 1622 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN7 */ 1623 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN8 */ 1624 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN9 */ 1625 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN10 */ 1626 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN11 */ 1627 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN12 */ 1628 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN13 */ 1629 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN14 */ 1630 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN15 */ 1631 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN16 */ 1632 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN17 */ 1633 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN18 */ 1634 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN19 */ 1635 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN20 */ 1636 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN21 */ 1637 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN22 */ 1638 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN23 */ 1639 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN24 */ 1640 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN25 */ 1641 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN26 */ 1642 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN27 */ 1643 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN28 */ 1644 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN29 */ 1645 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN30 */ 1646 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN31 */ 1647 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN32 */ 1648 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN33 */ 1649 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN34 */ 1650 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN35 */ 1651 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN36 */ 1652 130, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN37 */ 1653 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN38 */ 1654 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN39 */ 1655 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN40 */ 1656 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN41 */ 1657 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN42 */ 1658 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN43 */ 1659 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN44 */ 1660 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN45 */ 1661 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN46 */ 1662 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN47 */ 1663 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN48 */ 1664 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN49 */ 1665 131, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN50 */ 1666 131, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN51 */ 1667 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN52 */ 1668 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN53 */ 1669 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN54 */ 1670 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN55 */ 1671 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN56 */ 1672 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN57 */ 1673 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER0 */ 1674 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER1 */ 1675 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER2 */ 1676 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER3 */ 1677 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER4 */ 1678 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER5 */ 1679 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER6 */ 1680 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER7 */ 1681 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER8 */ 1682 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER9 */ 1683 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER10 */ 1684 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER11 */ 1685 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER12 */ 1686 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER13 */ 1687 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER14 */ 1688 138, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER15 */ 1689 9, /* CYHAL_TRIGGER_PASS0_TR_DEBUG_FREEZE */ 1690 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN0 */ 1691 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN1 */ 1692 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN2 */ 1693 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN3 */ 1694 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN4 */ 1695 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN5 */ 1696 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN6 */ 1697 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN7 */ 1698 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN8 */ 1699 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN9 */ 1700 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN10 */ 1701 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN11 */ 1702 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN12 */ 1703 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN13 */ 1704 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN14 */ 1705 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN15 */ 1706 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN16 */ 1707 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN17 */ 1708 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN18 */ 1709 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN19 */ 1710 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN20 */ 1711 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN21 */ 1712 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN22 */ 1713 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN23 */ 1714 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN24 */ 1715 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN25 */ 1716 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN26 */ 1717 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN27 */ 1718 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN28 */ 1719 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN29 */ 1720 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN30 */ 1721 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN31 */ 1722 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN32 */ 1723 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN33 */ 1724 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN34 */ 1725 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN35 */ 1726 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN36 */ 1727 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN37 */ 1728 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN38 */ 1729 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN39 */ 1730 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN40 */ 1731 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN41 */ 1732 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN42 */ 1733 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN43 */ 1734 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN44 */ 1735 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN45 */ 1736 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN46 */ 1737 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN47 */ 1738 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN48 */ 1739 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN49 */ 1740 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN50 */ 1741 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN51 */ 1742 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN52 */ 1743 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN53 */ 1744 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN54 */ 1745 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN55 */ 1746 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN56 */ 1747 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN57 */ 1748 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN58 */ 1749 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN59 */ 1750 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN60 */ 1751 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN61 */ 1752 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN62 */ 1753 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN63 */ 1754 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN64 */ 1755 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN65 */ 1756 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN66 */ 1757 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN67 */ 1758 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN68 */ 1759 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN69 */ 1760 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN70 */ 1761 135, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN71 */ 1762 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN0 */ 1763 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN1 */ 1764 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN2 */ 1765 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN3 */ 1766 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN4 */ 1767 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN5 */ 1768 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN6 */ 1769 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN7 */ 1770 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN8 */ 1771 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN9 */ 1772 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN10 */ 1773 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN11 */ 1774 9, /* CYHAL_TRIGGER_PERI_TR_DBG_FREEZE */ 1775 9, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT0 */ 1776 9, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT1 */ 1777 9, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT0 */ 1778 9, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT1 */ 1779 9, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT2 */ 1780 9, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_WDT */ 1781 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN0 */ 1782 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN1 */ 1783 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN2 */ 1784 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN3 */ 1785 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN4 */ 1786 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN5 */ 1787 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN6 */ 1788 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN7 */ 1789 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN8 */ 1790 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN9 */ 1791 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN10 */ 1792 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN11 */ 1793 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN12 */ 1794 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN13 */ 1795 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN14 */ 1796 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN15 */ 1797 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN16 */ 1798 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN17 */ 1799 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN18 */ 1800 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN19 */ 1801 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN20 */ 1802 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN21 */ 1803 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN22 */ 1804 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN23 */ 1805 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN24 */ 1806 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN25 */ 1807 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN26 */ 1808 9, /* CYHAL_TRIGGER_TCPWM0_TR_DEBUG_FREEZE */ 1809 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN2 */ 1810 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN5 */ 1811 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN8 */ 1812 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN11 */ 1813 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN14 */ 1814 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN17 */ 1815 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN20 */ 1816 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN23 */ 1817 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN26 */ 1818 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN29 */ 1819 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN32 */ 1820 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN35 */ 1821 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN38 */ 1822 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN41 */ 1823 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN44 */ 1824 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN47 */ 1825 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN50 */ 1826 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN53 */ 1827 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN56 */ 1828 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN59 */ 1829 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN62 */ 1830 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN65 */ 1831 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN68 */ 1832 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN71 */ 1833 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN74 */ 1834 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN77 */ 1835 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN80 */ 1836 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN83 */ 1837 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN86 */ 1838 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN89 */ 1839 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN92 */ 1840 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN95 */ 1841 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN98 */ 1842 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN101 */ 1843 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN104 */ 1844 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN107 */ 1845 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN110 */ 1846 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN113 */ 1847 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN116 */ 1848 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN119 */ 1849 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN122 */ 1850 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN125 */ 1851 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN128 */ 1852 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN131 */ 1853 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN134 */ 1854 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN137 */ 1855 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN140 */ 1856 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN143 */ 1857 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN146 */ 1858 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN149 */ 1859 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN152 */ 1860 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN155 */ 1861 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN158 */ 1862 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN161 */ 1863 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN164 */ 1864 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN167 */ 1865 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN170 */ 1866 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN173 */ 1867 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN176 */ 1868 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN179 */ 1869 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN770 */ 1870 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN773 */ 1871 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN776 */ 1872 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN779 */ 1873 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN782 */ 1874 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN785 */ 1875 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN788 */ 1876 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN791 */ 1877 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN794 */ 1878 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN797 */ 1879 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN800 */ 1880 134, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN803 */ 1881 10, /* CYHAL_TRIGGER_TR_GROUP9_INPUT1 */ 1882 10, /* CYHAL_TRIGGER_TR_GROUP9_INPUT2 */ 1883 10, /* CYHAL_TRIGGER_TR_GROUP9_INPUT3 */ 1884 10, /* CYHAL_TRIGGER_TR_GROUP9_INPUT4 */ 1885 10, /* CYHAL_TRIGGER_TR_GROUP9_INPUT5 */ 1886 11, /* CYHAL_TRIGGER_TR_GROUP9_INPUT6 */ 1887 11, /* CYHAL_TRIGGER_TR_GROUP9_INPUT7 */ 1888 11, /* CYHAL_TRIGGER_TR_GROUP9_INPUT8 */ 1889 11, /* CYHAL_TRIGGER_TR_GROUP9_INPUT9 */ 1890 11, /* CYHAL_TRIGGER_TR_GROUP9_INPUT10 */ 1891 12, /* CYHAL_TRIGGER_TR_GROUP9_INPUT11 */ 1892 12, /* CYHAL_TRIGGER_TR_GROUP9_INPUT12 */ 1893 12, /* CYHAL_TRIGGER_TR_GROUP9_INPUT13 */ 1894 12, /* CYHAL_TRIGGER_TR_GROUP9_INPUT14 */ 1895 12, /* CYHAL_TRIGGER_TR_GROUP9_INPUT15 */ 1896 }; 1897 1898 const uint8_t cyhal_mux_dest_index[407] = 1899 { 1900 0, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK0 */ 1901 1, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK1 */ 1902 2, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK2 */ 1903 3, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK3 */ 1904 0, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK0 */ 1905 1, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK1 */ 1906 2, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK2 */ 1907 3, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK3 */ 1908 0, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN0 */ 1909 1, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN1 */ 1910 2, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN2 */ 1911 3, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN3 */ 1912 4, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN0 */ 1913 5, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN1 */ 1914 6, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN2 */ 1915 7, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN3 */ 1916 2, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN0 */ 1917 3, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN1 */ 1918 0, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN0 */ 1919 1, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN1 */ 1920 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN2 */ 1921 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN3 */ 1922 4, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN4 */ 1923 5, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN5 */ 1924 6, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN6 */ 1925 7, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN7 */ 1926 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 */ 1927 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN1 */ 1928 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN2 */ 1929 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN3 */ 1930 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN4 */ 1931 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN5 */ 1932 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN6 */ 1933 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN7 */ 1934 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN8 */ 1935 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN9 */ 1936 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN10 */ 1937 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN11 */ 1938 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN12 */ 1939 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN13 */ 1940 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN14 */ 1941 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN15 */ 1942 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN16 */ 1943 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN17 */ 1944 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN18 */ 1945 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN19 */ 1946 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN20 */ 1947 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN21 */ 1948 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN22 */ 1949 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN23 */ 1950 8, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN24 */ 1951 9, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN25 */ 1952 10, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN26 */ 1953 11, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN27 */ 1954 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN28 */ 1955 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN29 */ 1956 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN30 */ 1957 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN31 */ 1958 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN32 */ 1959 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN33 */ 1960 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN34 */ 1961 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN35 */ 1962 8, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN36 */ 1963 9, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN37 */ 1964 10, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN38 */ 1965 11, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN39 */ 1966 12, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN40 */ 1967 13, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN41 */ 1968 14, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN42 */ 1969 15, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN43 */ 1970 16, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN44 */ 1971 17, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN45 */ 1972 18, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN46 */ 1973 19, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN47 */ 1974 20, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN48 */ 1975 21, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN49 */ 1976 22, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN50 */ 1977 23, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN51 */ 1978 24, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN52 */ 1979 25, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN53 */ 1980 26, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN54 */ 1981 27, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN55 */ 1982 28, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN56 */ 1983 29, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN57 */ 1984 30, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN58 */ 1985 31, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN59 */ 1986 32, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN60 */ 1987 33, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN61 */ 1988 34, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN62 */ 1989 35, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN63 */ 1990 36, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN64 */ 1991 37, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN65 */ 1992 38, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN66 */ 1993 39, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN67 */ 1994 40, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN68 */ 1995 41, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN69 */ 1996 42, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN70 */ 1997 43, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN71 */ 1998 44, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN72 */ 1999 45, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN73 */ 2000 46, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN74 */ 2001 47, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN75 */ 2002 48, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN76 */ 2003 49, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN77 */ 2004 50, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN78 */ 2005 51, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN79 */ 2006 52, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN80 */ 2007 53, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN81 */ 2008 54, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN82 */ 2009 55, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN83 */ 2010 56, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN84 */ 2011 57, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN85 */ 2012 58, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN86 */ 2013 59, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN87 */ 2014 60, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN88 */ 2015 61, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN89 */ 2016 62, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN90 */ 2017 63, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN91 */ 2018 64, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN92 */ 2019 65, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN93 */ 2020 66, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN94 */ 2021 67, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN95 */ 2022 68, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN96 */ 2023 69, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN97 */ 2024 70, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN98 */ 2025 71, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN99 */ 2026 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN0 */ 2027 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN1 */ 2028 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN2 */ 2029 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN3 */ 2030 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN4 */ 2031 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN5 */ 2032 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN6 */ 2033 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN7 */ 2034 8, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN8 */ 2035 9, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN9 */ 2036 10, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN10 */ 2037 11, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN11 */ 2038 12, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN12 */ 2039 13, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN13 */ 2040 14, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN14 */ 2041 15, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN15 */ 2042 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN16 */ 2043 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN17 */ 2044 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN18 */ 2045 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN19 */ 2046 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN20 */ 2047 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN21 */ 2048 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN22 */ 2049 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN23 */ 2050 8, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN24 */ 2051 9, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN25 */ 2052 10, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN26 */ 2053 11, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN27 */ 2054 12, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN28 */ 2055 13, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN29 */ 2056 14, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN30 */ 2057 15, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN31 */ 2058 16, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN32 */ 2059 17, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN33 */ 2060 18, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN34 */ 2061 19, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN35 */ 2062 20, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN36 */ 2063 21, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN37 */ 2064 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN38 */ 2065 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN39 */ 2066 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN40 */ 2067 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN41 */ 2068 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN42 */ 2069 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN43 */ 2070 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN44 */ 2071 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN45 */ 2072 8, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN46 */ 2073 9, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN47 */ 2074 10, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN48 */ 2075 11, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN49 */ 2076 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN50 */ 2077 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN51 */ 2078 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN52 */ 2079 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN53 */ 2080 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN54 */ 2081 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN55 */ 2082 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN56 */ 2083 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN57 */ 2084 0, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER0 */ 2085 1, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER1 */ 2086 2, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER2 */ 2087 3, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER3 */ 2088 4, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER4 */ 2089 5, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER5 */ 2090 6, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER6 */ 2091 7, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER7 */ 2092 8, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER8 */ 2093 9, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER9 */ 2094 10, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER10 */ 2095 11, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER11 */ 2096 12, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER12 */ 2097 13, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER13 */ 2098 14, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER14 */ 2099 15, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER15 */ 2100 5, /* CYHAL_TRIGGER_PASS0_TR_DEBUG_FREEZE */ 2101 0, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN0 */ 2102 1, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN1 */ 2103 2, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN2 */ 2104 3, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN3 */ 2105 4, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN4 */ 2106 5, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN5 */ 2107 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN6 */ 2108 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN7 */ 2109 8, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN8 */ 2110 9, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN9 */ 2111 10, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN10 */ 2112 11, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN11 */ 2113 12, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN12 */ 2114 13, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN13 */ 2115 14, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN14 */ 2116 15, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN15 */ 2117 16, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN16 */ 2118 17, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN17 */ 2119 18, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN18 */ 2120 19, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN19 */ 2121 20, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN20 */ 2122 21, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN21 */ 2123 22, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN22 */ 2124 23, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN23 */ 2125 24, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN24 */ 2126 25, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN25 */ 2127 26, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN26 */ 2128 27, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN27 */ 2129 28, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN28 */ 2130 29, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN29 */ 2131 30, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN30 */ 2132 31, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN31 */ 2133 32, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN32 */ 2134 33, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN33 */ 2135 34, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN34 */ 2136 35, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN35 */ 2137 36, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN36 */ 2138 37, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN37 */ 2139 38, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN38 */ 2140 39, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN39 */ 2141 40, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN40 */ 2142 41, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN41 */ 2143 42, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN42 */ 2144 43, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN43 */ 2145 44, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN44 */ 2146 45, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN45 */ 2147 46, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN46 */ 2148 47, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN47 */ 2149 48, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN48 */ 2150 49, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN49 */ 2151 50, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN50 */ 2152 51, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN51 */ 2153 52, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN52 */ 2154 53, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN53 */ 2155 54, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN54 */ 2156 55, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN55 */ 2157 56, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN56 */ 2158 57, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN57 */ 2159 58, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN58 */ 2160 59, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN59 */ 2161 60, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN60 */ 2162 61, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN61 */ 2163 62, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN62 */ 2164 63, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN63 */ 2165 64, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN64 */ 2166 65, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN65 */ 2167 66, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN66 */ 2168 67, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN67 */ 2169 68, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN68 */ 2170 69, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN69 */ 2171 70, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN70 */ 2172 71, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN71 */ 2173 0, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN0 */ 2174 1, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN1 */ 2175 2, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN2 */ 2176 3, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN3 */ 2177 4, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN4 */ 2178 5, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN5 */ 2179 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN6 */ 2180 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN7 */ 2181 8, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN8 */ 2182 9, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN9 */ 2183 10, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN10 */ 2184 11, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN11 */ 2185 4, /* CYHAL_TRIGGER_PERI_TR_DBG_FREEZE */ 2186 0, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT0 */ 2187 1, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT1 */ 2188 9, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT0 */ 2189 8, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT1 */ 2190 7, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT2 */ 2191 6, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_WDT */ 2192 0, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN0 */ 2193 1, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN1 */ 2194 2, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN2 */ 2195 3, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN3 */ 2196 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN4 */ 2197 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN5 */ 2198 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN6 */ 2199 7, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN7 */ 2200 8, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN8 */ 2201 9, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN9 */ 2202 10, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN10 */ 2203 11, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN11 */ 2204 0, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN12 */ 2205 1, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN13 */ 2206 2, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN14 */ 2207 3, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN15 */ 2208 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN16 */ 2209 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN17 */ 2210 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN18 */ 2211 7, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN19 */ 2212 8, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN20 */ 2213 9, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN21 */ 2214 10, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN22 */ 2215 11, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN23 */ 2216 12, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN24 */ 2217 13, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN25 */ 2218 14, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN26 */ 2219 10, /* CYHAL_TRIGGER_TCPWM0_TR_DEBUG_FREEZE */ 2220 4, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN2 */ 2221 5, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN5 */ 2222 6, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN8 */ 2223 7, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN11 */ 2224 8, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN14 */ 2225 9, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN17 */ 2226 10, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN20 */ 2227 11, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN23 */ 2228 12, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN26 */ 2229 13, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN29 */ 2230 14, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN32 */ 2231 15, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN35 */ 2232 16, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN38 */ 2233 17, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN41 */ 2234 18, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN44 */ 2235 19, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN47 */ 2236 20, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN50 */ 2237 21, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN53 */ 2238 22, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN56 */ 2239 23, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN59 */ 2240 24, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN62 */ 2241 25, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN65 */ 2242 26, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN68 */ 2243 27, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN71 */ 2244 28, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN74 */ 2245 29, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN77 */ 2246 30, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN80 */ 2247 31, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN83 */ 2248 36, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN86 */ 2249 37, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN89 */ 2250 38, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN92 */ 2251 39, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN95 */ 2252 40, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN98 */ 2253 41, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN101 */ 2254 42, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN104 */ 2255 43, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN107 */ 2256 44, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN110 */ 2257 45, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN113 */ 2258 46, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN116 */ 2259 47, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN119 */ 2260 48, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN122 */ 2261 49, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN125 */ 2262 50, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN128 */ 2263 51, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN131 */ 2264 52, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN134 */ 2265 53, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN137 */ 2266 54, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN140 */ 2267 55, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN143 */ 2268 56, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN146 */ 2269 57, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN149 */ 2270 58, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN152 */ 2271 59, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN155 */ 2272 60, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN158 */ 2273 61, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN161 */ 2274 62, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN164 */ 2275 63, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN167 */ 2276 68, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN170 */ 2277 69, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN173 */ 2278 70, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN176 */ 2279 71, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN179 */ 2280 0, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN770 */ 2281 32, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN773 */ 2282 64, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN776 */ 2283 1, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN779 */ 2284 33, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN782 */ 2285 65, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN785 */ 2286 2, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN788 */ 2287 34, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN791 */ 2288 66, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN794 */ 2289 3, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN797 */ 2290 35, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN800 */ 2291 67, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN803 */ 2292 0, /* CYHAL_TRIGGER_TR_GROUP9_INPUT1 */ 2293 1, /* CYHAL_TRIGGER_TR_GROUP9_INPUT2 */ 2294 2, /* CYHAL_TRIGGER_TR_GROUP9_INPUT3 */ 2295 3, /* CYHAL_TRIGGER_TR_GROUP9_INPUT4 */ 2296 4, /* CYHAL_TRIGGER_TR_GROUP9_INPUT5 */ 2297 0, /* CYHAL_TRIGGER_TR_GROUP9_INPUT6 */ 2298 1, /* CYHAL_TRIGGER_TR_GROUP9_INPUT7 */ 2299 2, /* CYHAL_TRIGGER_TR_GROUP9_INPUT8 */ 2300 3, /* CYHAL_TRIGGER_TR_GROUP9_INPUT9 */ 2301 4, /* CYHAL_TRIGGER_TR_GROUP9_INPUT10 */ 2302 0, /* CYHAL_TRIGGER_TR_GROUP9_INPUT11 */ 2303 1, /* CYHAL_TRIGGER_TR_GROUP9_INPUT12 */ 2304 2, /* CYHAL_TRIGGER_TR_GROUP9_INPUT13 */ 2305 3, /* CYHAL_TRIGGER_TR_GROUP9_INPUT14 */ 2306 4, /* CYHAL_TRIGGER_TR_GROUP9_INPUT15 */ 2307 }; 2308 2309 #endif /* CY_DEVICE_TVIIBH4M */ 2310
