1 /***************************************************************************//** 2 * \file cyhal_triggers_psoc6_02.c 3 * 4 * \brief 5 * PSoC6_02 family HAL triggers header 6 * 7 ******************************************************************************** 8 * \copyright 9 * (c) (2016-2023), Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation. 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 #include "cy_device_headers.h" 28 #include "cyhal_hw_types.h" 29 30 #ifdef CY_DEVICE_PSOC6A2M 31 #include "triggers/cyhal_triggers_psoc6_02.h" 32 33 const uint16_t cyhal_sources_per_mux[17] = 34 { 35 87, 86, 135, 135, 223, 251, 27, 3, 127, 127, 12, 14, 1, 2, 5, 8, 8, 36 }; 37 38 const bool cyhal_is_mux_1to1[17] = 39 { 40 false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, 41 }; 42 43 const _cyhal_trigger_source_psoc6_02_t cyhal_mux0_sources[87] = 44 { 45 _CYHAL_TRIGGER_CPUSS_ZERO, 46 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 47 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 48 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 49 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 50 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 51 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 52 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 53 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 54 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 55 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 56 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 57 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 58 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 59 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 60 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 61 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 62 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW0, 63 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH0, 64 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW0, 65 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW1, 66 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH1, 67 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW1, 68 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW2, 69 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH2, 70 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW2, 71 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW3, 72 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH3, 73 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW3, 74 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW0, 75 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH0, 76 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW0, 77 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW1, 78 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH1, 79 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW1, 80 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW2, 81 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH2, 82 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW2, 83 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW3, 84 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH3, 85 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW3, 86 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW4, 87 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH4, 88 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW4, 89 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW5, 90 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH5, 91 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW5, 92 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW6, 93 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH6, 94 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW6, 95 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW7, 96 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH7, 97 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW7, 98 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW8, 99 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH8, 100 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW8, 101 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW9, 102 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH9, 103 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW9, 104 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW10, 105 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH10, 106 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW10, 107 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW11, 108 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH11, 109 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW11, 110 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 111 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 112 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 113 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 114 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 115 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 116 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 117 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 118 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 119 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 120 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 121 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 122 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 123 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 124 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 125 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 126 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 127 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 128 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 129 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 130 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 131 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 132 }; 133 134 const _cyhal_trigger_source_psoc6_02_t cyhal_mux1_sources[86] = 135 { 136 _CYHAL_TRIGGER_CPUSS_ZERO, 137 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 138 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 139 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 140 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 141 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 142 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 143 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 144 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 145 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 146 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 147 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 148 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 149 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 150 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 151 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 152 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 153 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW4, 154 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH4, 155 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW4, 156 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW5, 157 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH5, 158 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW5, 159 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW6, 160 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH6, 161 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW6, 162 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW7, 163 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH7, 164 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW7, 165 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW12, 166 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH12, 167 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW12, 168 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW13, 169 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH13, 170 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW13, 171 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW14, 172 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH14, 173 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW14, 174 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW15, 175 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH15, 176 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW15, 177 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW16, 178 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH16, 179 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW16, 180 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW17, 181 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH17, 182 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW17, 183 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW18, 184 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH18, 185 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW18, 186 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW19, 187 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH19, 188 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW19, 189 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW20, 190 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH20, 191 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW20, 192 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW21, 193 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH21, 194 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW21, 195 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW22, 196 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH22, 197 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW22, 198 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW23, 199 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH23, 200 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW23, 201 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 202 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 203 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 204 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 205 _CYHAL_TRIGGER_CSD_TR_ADC_DONE, 206 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 207 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 208 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 209 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 210 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 211 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 212 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 213 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 214 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 215 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 216 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 217 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 218 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 219 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 220 _CYHAL_TRIGGER_LPCOMP_DSI_COMP0, 221 _CYHAL_TRIGGER_LPCOMP_DSI_COMP1, 222 }; 223 224 const _cyhal_trigger_source_psoc6_02_t cyhal_mux2_sources[135] = 225 { 226 _CYHAL_TRIGGER_CPUSS_ZERO, 227 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 228 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 229 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 230 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 231 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 232 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 233 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 234 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 235 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW0, 236 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH0, 237 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW0, 238 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW1, 239 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH1, 240 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW1, 241 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW2, 242 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH2, 243 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW2, 244 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW3, 245 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH3, 246 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW3, 247 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW4, 248 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH4, 249 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW4, 250 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW5, 251 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH5, 252 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW5, 253 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW6, 254 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH6, 255 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW6, 256 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW7, 257 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH7, 258 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW7, 259 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW0, 260 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH0, 261 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW0, 262 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW1, 263 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH1, 264 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW1, 265 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW2, 266 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH2, 267 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW2, 268 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW3, 269 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH3, 270 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW3, 271 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW4, 272 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH4, 273 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW4, 274 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW5, 275 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH5, 276 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW5, 277 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW6, 278 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH6, 279 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW6, 280 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW7, 281 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH7, 282 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW7, 283 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 284 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 285 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 286 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 287 _CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, 288 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 289 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 290 _CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, 291 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 292 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 293 _CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, 294 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 295 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 296 _CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, 297 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 298 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 299 _CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, 300 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 301 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 302 _CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, 303 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 304 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 305 _CYHAL_TRIGGER_SCB6_TR_I2C_SCL_FILTERED, 306 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 307 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 308 _CYHAL_TRIGGER_SCB7_TR_I2C_SCL_FILTERED, 309 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 310 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 311 _CYHAL_TRIGGER_SCB8_TR_I2C_SCL_FILTERED, 312 _CYHAL_TRIGGER_SCB8_TR_TX_REQ, 313 _CYHAL_TRIGGER_SCB8_TR_RX_REQ, 314 _CYHAL_TRIGGER_SCB9_TR_I2C_SCL_FILTERED, 315 _CYHAL_TRIGGER_SCB9_TR_TX_REQ, 316 _CYHAL_TRIGGER_SCB9_TR_RX_REQ, 317 _CYHAL_TRIGGER_SCB10_TR_I2C_SCL_FILTERED, 318 _CYHAL_TRIGGER_SCB10_TR_TX_REQ, 319 _CYHAL_TRIGGER_SCB10_TR_RX_REQ, 320 _CYHAL_TRIGGER_SCB11_TR_I2C_SCL_FILTERED, 321 _CYHAL_TRIGGER_SCB11_TR_TX_REQ, 322 _CYHAL_TRIGGER_SCB11_TR_RX_REQ, 323 _CYHAL_TRIGGER_SCB12_TR_I2C_SCL_FILTERED, 324 _CYHAL_TRIGGER_SCB12_TR_TX_REQ, 325 _CYHAL_TRIGGER_SCB12_TR_RX_REQ, 326 _CYHAL_TRIGGER_SMIF_TR_TX_REQ, 327 _CYHAL_TRIGGER_SMIF_TR_RX_REQ, 328 _CYHAL_TRIGGER_USB_DMA_REQ0, 329 _CYHAL_TRIGGER_USB_DMA_REQ1, 330 _CYHAL_TRIGGER_USB_DMA_REQ2, 331 _CYHAL_TRIGGER_USB_DMA_REQ3, 332 _CYHAL_TRIGGER_USB_DMA_REQ4, 333 _CYHAL_TRIGGER_USB_DMA_REQ5, 334 _CYHAL_TRIGGER_USB_DMA_REQ6, 335 _CYHAL_TRIGGER_USB_DMA_REQ7, 336 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_TX_REQ, 337 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_RX_REQ, 338 _CYHAL_TRIGGER_AUDIOSS0_TR_PDM_RX_REQ, 339 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_TX_REQ, 340 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_RX_REQ, 341 _CYHAL_TRIGGER_PASS_TR_SAR_OUT, 342 _CYHAL_TRIGGER_CSD_DSI_SENSE_OUT, 343 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 344 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 345 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 346 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 347 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 348 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 349 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 350 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 351 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 352 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 353 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 354 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 355 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 356 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 357 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 358 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 359 _CYHAL_TRIGGER_LPCOMP_DSI_COMP0, 360 _CYHAL_TRIGGER_LPCOMP_DSI_COMP1, 361 }; 362 363 const _cyhal_trigger_source_psoc6_02_t cyhal_mux3_sources[135] = 364 { 365 _CYHAL_TRIGGER_CPUSS_ZERO, 366 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 367 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 368 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 369 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 370 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 371 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 372 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 373 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 374 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW0, 375 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH0, 376 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW0, 377 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW1, 378 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH1, 379 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW1, 380 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW2, 381 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH2, 382 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW2, 383 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW3, 384 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH3, 385 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW3, 386 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW4, 387 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH4, 388 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW4, 389 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW5, 390 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH5, 391 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW5, 392 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW6, 393 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH6, 394 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW6, 395 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW7, 396 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH7, 397 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW7, 398 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW0, 399 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH0, 400 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW0, 401 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW1, 402 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH1, 403 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW1, 404 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW2, 405 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH2, 406 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW2, 407 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW3, 408 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH3, 409 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW3, 410 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW4, 411 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH4, 412 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW4, 413 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW5, 414 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH5, 415 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW5, 416 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW6, 417 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH6, 418 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW6, 419 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW7, 420 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH7, 421 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW7, 422 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 423 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 424 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 425 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 426 _CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, 427 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 428 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 429 _CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, 430 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 431 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 432 _CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, 433 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 434 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 435 _CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, 436 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 437 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 438 _CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, 439 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 440 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 441 _CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, 442 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 443 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 444 _CYHAL_TRIGGER_SCB6_TR_I2C_SCL_FILTERED, 445 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 446 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 447 _CYHAL_TRIGGER_SCB7_TR_I2C_SCL_FILTERED, 448 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 449 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 450 _CYHAL_TRIGGER_SCB8_TR_I2C_SCL_FILTERED, 451 _CYHAL_TRIGGER_SCB8_TR_TX_REQ, 452 _CYHAL_TRIGGER_SCB8_TR_RX_REQ, 453 _CYHAL_TRIGGER_SCB9_TR_I2C_SCL_FILTERED, 454 _CYHAL_TRIGGER_SCB9_TR_TX_REQ, 455 _CYHAL_TRIGGER_SCB9_TR_RX_REQ, 456 _CYHAL_TRIGGER_SCB10_TR_I2C_SCL_FILTERED, 457 _CYHAL_TRIGGER_SCB10_TR_TX_REQ, 458 _CYHAL_TRIGGER_SCB10_TR_RX_REQ, 459 _CYHAL_TRIGGER_SCB11_TR_I2C_SCL_FILTERED, 460 _CYHAL_TRIGGER_SCB11_TR_TX_REQ, 461 _CYHAL_TRIGGER_SCB11_TR_RX_REQ, 462 _CYHAL_TRIGGER_SCB12_TR_I2C_SCL_FILTERED, 463 _CYHAL_TRIGGER_SCB12_TR_TX_REQ, 464 _CYHAL_TRIGGER_SCB12_TR_RX_REQ, 465 _CYHAL_TRIGGER_SMIF_TR_TX_REQ, 466 _CYHAL_TRIGGER_SMIF_TR_RX_REQ, 467 _CYHAL_TRIGGER_USB_DMA_REQ0, 468 _CYHAL_TRIGGER_USB_DMA_REQ1, 469 _CYHAL_TRIGGER_USB_DMA_REQ2, 470 _CYHAL_TRIGGER_USB_DMA_REQ3, 471 _CYHAL_TRIGGER_USB_DMA_REQ4, 472 _CYHAL_TRIGGER_USB_DMA_REQ5, 473 _CYHAL_TRIGGER_USB_DMA_REQ6, 474 _CYHAL_TRIGGER_USB_DMA_REQ7, 475 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_TX_REQ, 476 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_RX_REQ, 477 _CYHAL_TRIGGER_AUDIOSS0_TR_PDM_RX_REQ, 478 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_TX_REQ, 479 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_RX_REQ, 480 _CYHAL_TRIGGER_PASS_TR_SAR_OUT, 481 _CYHAL_TRIGGER_CSD_DSI_SENSE_OUT, 482 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 483 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 484 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 485 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 486 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 487 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 488 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 489 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 490 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 491 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 492 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 493 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 494 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 495 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 496 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 497 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 498 _CYHAL_TRIGGER_LPCOMP_DSI_COMP0, 499 _CYHAL_TRIGGER_LPCOMP_DSI_COMP1, 500 }; 501 502 const _cyhal_trigger_source_psoc6_02_t cyhal_mux4_sources[223] = 503 { 504 _CYHAL_TRIGGER_CPUSS_ZERO, 505 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 506 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 507 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 508 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 509 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 510 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 511 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 512 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 513 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 514 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 515 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 516 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 517 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 518 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 519 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 520 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 521 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT16, 522 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT17, 523 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT18, 524 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT19, 525 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT20, 526 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT21, 527 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT22, 528 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT23, 529 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT24, 530 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT25, 531 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT26, 532 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT27, 533 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT28, 534 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 535 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 536 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 537 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 538 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 539 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 540 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 541 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 542 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8, 543 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9, 544 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10, 545 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11, 546 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12, 547 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13, 548 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14, 549 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15, 550 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT16, 551 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT17, 552 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT18, 553 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT19, 554 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT20, 555 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT21, 556 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT22, 557 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT23, 558 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT24, 559 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT25, 560 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT26, 561 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT27, 562 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT28, 563 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW0, 564 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH0, 565 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW0, 566 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW1, 567 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH1, 568 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW1, 569 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW2, 570 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH2, 571 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW2, 572 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW3, 573 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH3, 574 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW3, 575 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW4, 576 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH4, 577 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW4, 578 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW5, 579 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH5, 580 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW5, 581 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW6, 582 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH6, 583 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW6, 584 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW7, 585 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH7, 586 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW7, 587 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW0, 588 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH0, 589 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW0, 590 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW1, 591 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH1, 592 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW1, 593 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW2, 594 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH2, 595 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW2, 596 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW3, 597 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH3, 598 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW3, 599 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW4, 600 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH4, 601 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW4, 602 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW5, 603 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH5, 604 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW5, 605 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW6, 606 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH6, 607 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW6, 608 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW7, 609 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH7, 610 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW7, 611 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW8, 612 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH8, 613 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW8, 614 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW9, 615 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH9, 616 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW9, 617 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW10, 618 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH10, 619 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW10, 620 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW11, 621 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH11, 622 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW11, 623 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW12, 624 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH12, 625 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW12, 626 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW13, 627 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH13, 628 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW13, 629 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW14, 630 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH14, 631 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW14, 632 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW15, 633 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH15, 634 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW15, 635 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW16, 636 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH16, 637 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW16, 638 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW17, 639 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH17, 640 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW17, 641 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW18, 642 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH18, 643 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW18, 644 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW19, 645 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH19, 646 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW19, 647 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW20, 648 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH20, 649 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW20, 650 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW21, 651 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH21, 652 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW21, 653 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW22, 654 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH22, 655 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW22, 656 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW23, 657 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH23, 658 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW23, 659 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 660 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 661 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 662 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 663 _CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, 664 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 665 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 666 _CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, 667 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 668 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 669 _CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, 670 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 671 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 672 _CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, 673 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 674 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 675 _CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, 676 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 677 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 678 _CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, 679 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 680 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 681 _CYHAL_TRIGGER_SCB6_TR_I2C_SCL_FILTERED, 682 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 683 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 684 _CYHAL_TRIGGER_SCB7_TR_I2C_SCL_FILTERED, 685 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 686 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 687 _CYHAL_TRIGGER_SCB8_TR_I2C_SCL_FILTERED, 688 _CYHAL_TRIGGER_SCB8_TR_TX_REQ, 689 _CYHAL_TRIGGER_SCB8_TR_RX_REQ, 690 _CYHAL_TRIGGER_SCB9_TR_I2C_SCL_FILTERED, 691 _CYHAL_TRIGGER_SCB9_TR_TX_REQ, 692 _CYHAL_TRIGGER_SCB9_TR_RX_REQ, 693 _CYHAL_TRIGGER_SCB10_TR_I2C_SCL_FILTERED, 694 _CYHAL_TRIGGER_SCB10_TR_TX_REQ, 695 _CYHAL_TRIGGER_SCB10_TR_RX_REQ, 696 _CYHAL_TRIGGER_SCB11_TR_I2C_SCL_FILTERED, 697 _CYHAL_TRIGGER_SCB11_TR_TX_REQ, 698 _CYHAL_TRIGGER_SCB11_TR_RX_REQ, 699 _CYHAL_TRIGGER_SCB12_TR_I2C_SCL_FILTERED, 700 _CYHAL_TRIGGER_SCB12_TR_TX_REQ, 701 _CYHAL_TRIGGER_SCB12_TR_RX_REQ, 702 _CYHAL_TRIGGER_SMIF_TR_TX_REQ, 703 _CYHAL_TRIGGER_SMIF_TR_RX_REQ, 704 _CYHAL_TRIGGER_USB_DMA_REQ0, 705 _CYHAL_TRIGGER_USB_DMA_REQ1, 706 _CYHAL_TRIGGER_USB_DMA_REQ2, 707 _CYHAL_TRIGGER_USB_DMA_REQ3, 708 _CYHAL_TRIGGER_USB_DMA_REQ4, 709 _CYHAL_TRIGGER_USB_DMA_REQ5, 710 _CYHAL_TRIGGER_USB_DMA_REQ6, 711 _CYHAL_TRIGGER_USB_DMA_REQ7, 712 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_TX_REQ, 713 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_RX_REQ, 714 _CYHAL_TRIGGER_AUDIOSS0_TR_PDM_RX_REQ, 715 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_TX_REQ, 716 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_RX_REQ, 717 _CYHAL_TRIGGER_CSD_DSI_SENSE_OUT, 718 _CYHAL_TRIGGER_CSD_DSI_SAMPLE_OUT, 719 _CYHAL_TRIGGER_CSD_TR_ADC_DONE, 720 _CYHAL_TRIGGER_PASS_TR_SAR_OUT, 721 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 722 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 723 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 724 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 725 _CYHAL_TRIGGER_LPCOMP_DSI_COMP0, 726 _CYHAL_TRIGGER_LPCOMP_DSI_COMP1, 727 }; 728 729 const _cyhal_trigger_source_psoc6_02_t cyhal_mux5_sources[251] = 730 { 731 _CYHAL_TRIGGER_CPUSS_ZERO, 732 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 733 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 734 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 735 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 736 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 737 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 738 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 739 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 740 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 741 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 742 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 743 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 744 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 745 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 746 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 747 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 748 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT16, 749 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT17, 750 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT18, 751 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT19, 752 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT20, 753 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT21, 754 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT22, 755 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT23, 756 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT24, 757 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT25, 758 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT26, 759 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT27, 760 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT28, 761 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 762 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 763 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 764 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 765 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 766 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 767 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 768 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 769 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8, 770 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9, 771 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10, 772 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11, 773 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12, 774 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13, 775 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14, 776 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15, 777 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT16, 778 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT17, 779 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT18, 780 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT19, 781 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT20, 782 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT21, 783 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT22, 784 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT23, 785 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT24, 786 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT25, 787 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT26, 788 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT27, 789 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT28, 790 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW0, 791 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH0, 792 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW0, 793 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW1, 794 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH1, 795 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW1, 796 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW2, 797 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH2, 798 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW2, 799 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW3, 800 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH3, 801 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW3, 802 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW4, 803 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH4, 804 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW4, 805 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW5, 806 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH5, 807 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW5, 808 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW6, 809 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH6, 810 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW6, 811 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW7, 812 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH7, 813 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW7, 814 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW0, 815 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH0, 816 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW0, 817 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW1, 818 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH1, 819 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW1, 820 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW2, 821 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH2, 822 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW2, 823 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW3, 824 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH3, 825 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW3, 826 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW4, 827 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH4, 828 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW4, 829 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW5, 830 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH5, 831 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW5, 832 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW6, 833 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH6, 834 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW6, 835 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW7, 836 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH7, 837 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW7, 838 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW8, 839 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH8, 840 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW8, 841 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW9, 842 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH9, 843 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW9, 844 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW10, 845 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH10, 846 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW10, 847 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW11, 848 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH11, 849 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW11, 850 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW12, 851 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH12, 852 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW12, 853 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW13, 854 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH13, 855 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW13, 856 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW14, 857 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH14, 858 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW14, 859 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW15, 860 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH15, 861 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW15, 862 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW16, 863 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH16, 864 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW16, 865 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW17, 866 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH17, 867 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW17, 868 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW18, 869 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH18, 870 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW18, 871 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW19, 872 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH19, 873 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW19, 874 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW20, 875 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH20, 876 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW20, 877 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW21, 878 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH21, 879 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW21, 880 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW22, 881 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH22, 882 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW22, 883 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW23, 884 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH23, 885 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW23, 886 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 887 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 888 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 889 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 890 _CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, 891 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 892 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 893 _CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, 894 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 895 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 896 _CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, 897 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 898 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 899 _CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, 900 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 901 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 902 _CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, 903 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 904 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 905 _CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, 906 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 907 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 908 _CYHAL_TRIGGER_SCB6_TR_I2C_SCL_FILTERED, 909 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 910 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 911 _CYHAL_TRIGGER_SCB7_TR_I2C_SCL_FILTERED, 912 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 913 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 914 _CYHAL_TRIGGER_SCB8_TR_I2C_SCL_FILTERED, 915 _CYHAL_TRIGGER_SCB8_TR_TX_REQ, 916 _CYHAL_TRIGGER_SCB8_TR_RX_REQ, 917 _CYHAL_TRIGGER_SCB9_TR_I2C_SCL_FILTERED, 918 _CYHAL_TRIGGER_SCB9_TR_TX_REQ, 919 _CYHAL_TRIGGER_SCB9_TR_RX_REQ, 920 _CYHAL_TRIGGER_SCB10_TR_I2C_SCL_FILTERED, 921 _CYHAL_TRIGGER_SCB10_TR_TX_REQ, 922 _CYHAL_TRIGGER_SCB10_TR_RX_REQ, 923 _CYHAL_TRIGGER_SCB11_TR_I2C_SCL_FILTERED, 924 _CYHAL_TRIGGER_SCB11_TR_TX_REQ, 925 _CYHAL_TRIGGER_SCB11_TR_RX_REQ, 926 _CYHAL_TRIGGER_SCB12_TR_I2C_SCL_FILTERED, 927 _CYHAL_TRIGGER_SCB12_TR_TX_REQ, 928 _CYHAL_TRIGGER_SCB12_TR_RX_REQ, 929 _CYHAL_TRIGGER_SMIF_TR_TX_REQ, 930 _CYHAL_TRIGGER_SMIF_TR_RX_REQ, 931 _CYHAL_TRIGGER_USB_DMA_REQ0, 932 _CYHAL_TRIGGER_USB_DMA_REQ1, 933 _CYHAL_TRIGGER_USB_DMA_REQ2, 934 _CYHAL_TRIGGER_USB_DMA_REQ3, 935 _CYHAL_TRIGGER_USB_DMA_REQ4, 936 _CYHAL_TRIGGER_USB_DMA_REQ5, 937 _CYHAL_TRIGGER_USB_DMA_REQ6, 938 _CYHAL_TRIGGER_USB_DMA_REQ7, 939 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_TX_REQ, 940 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_RX_REQ, 941 _CYHAL_TRIGGER_AUDIOSS0_TR_PDM_RX_REQ, 942 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_TX_REQ, 943 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_RX_REQ, 944 _CYHAL_TRIGGER_CSD_DSI_SENSE_OUT, 945 _CYHAL_TRIGGER_CSD_DSI_SAMPLE_OUT, 946 _CYHAL_TRIGGER_CSD_TR_ADC_DONE, 947 _CYHAL_TRIGGER_PASS_TR_SAR_OUT, 948 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 949 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 950 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 951 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 952 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 953 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 954 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 955 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 956 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 957 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 958 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 959 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 960 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 961 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 962 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 963 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 964 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 965 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 966 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 967 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 968 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 969 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 970 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 971 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 972 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 973 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 974 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 975 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 976 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 977 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 978 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 979 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 980 _CYHAL_TRIGGER_LPCOMP_DSI_COMP0, 981 _CYHAL_TRIGGER_LPCOMP_DSI_COMP1, 982 }; 983 984 const _cyhal_trigger_source_psoc6_02_t cyhal_mux6_sources[27] = 985 { 986 _CYHAL_TRIGGER_CPUSS_ZERO, 987 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW0, 988 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH0, 989 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW0, 990 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW1, 991 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH1, 992 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW1, 993 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW2, 994 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH2, 995 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW2, 996 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW3, 997 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH3, 998 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW3, 999 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW4, 1000 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH4, 1001 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW4, 1002 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW5, 1003 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH5, 1004 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW5, 1005 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW6, 1006 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH6, 1007 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW6, 1008 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW7, 1009 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH7, 1010 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW7, 1011 _CYHAL_TRIGGER_SMIF_TR_TX_REQ, 1012 _CYHAL_TRIGGER_SMIF_TR_RX_REQ, 1013 }; 1014 1015 const _cyhal_trigger_source_psoc6_02_t cyhal_mux7_sources[3] = 1016 { 1017 _CYHAL_TRIGGER_CPUSS_ZERO, 1018 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 1019 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 1020 }; 1021 1022 const _cyhal_trigger_source_psoc6_02_t cyhal_mux8_sources[127] = 1023 { 1024 _CYHAL_TRIGGER_CPUSS_ZERO, 1025 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW0, 1026 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH0, 1027 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW0, 1028 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW1, 1029 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH1, 1030 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW1, 1031 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW2, 1032 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH2, 1033 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW2, 1034 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW3, 1035 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH3, 1036 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW3, 1037 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW4, 1038 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH4, 1039 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW4, 1040 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW5, 1041 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH5, 1042 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW5, 1043 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW6, 1044 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH6, 1045 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW6, 1046 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW7, 1047 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH7, 1048 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW7, 1049 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW0, 1050 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH0, 1051 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW0, 1052 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW1, 1053 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH1, 1054 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW1, 1055 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW2, 1056 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH2, 1057 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW2, 1058 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW3, 1059 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH3, 1060 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW3, 1061 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW4, 1062 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH4, 1063 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW4, 1064 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW5, 1065 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH5, 1066 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW5, 1067 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW6, 1068 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH6, 1069 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW6, 1070 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW7, 1071 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH7, 1072 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW7, 1073 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW8, 1074 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH8, 1075 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW8, 1076 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW9, 1077 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH9, 1078 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW9, 1079 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW10, 1080 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH10, 1081 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW10, 1082 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW11, 1083 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH11, 1084 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW11, 1085 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW12, 1086 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH12, 1087 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW12, 1088 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW13, 1089 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH13, 1090 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW13, 1091 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW14, 1092 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH14, 1093 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW14, 1094 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW15, 1095 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH15, 1096 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW15, 1097 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW16, 1098 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH16, 1099 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW16, 1100 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW17, 1101 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH17, 1102 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW17, 1103 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW18, 1104 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH18, 1105 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW18, 1106 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW19, 1107 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH19, 1108 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW19, 1109 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW20, 1110 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH20, 1111 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW20, 1112 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW21, 1113 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH21, 1114 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW21, 1115 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW22, 1116 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH22, 1117 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW22, 1118 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW23, 1119 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH23, 1120 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW23, 1121 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 1122 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 1123 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 1124 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 1125 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 1126 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 1127 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 1128 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 1129 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 1130 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 1131 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 1132 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 1133 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 1134 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 1135 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 1136 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 1137 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 1138 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 1139 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 1140 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 1141 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 1142 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 1143 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 1144 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 1145 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 1146 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 1147 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 1148 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 1149 _CYHAL_TRIGGER_LPCOMP_DSI_COMP0, 1150 _CYHAL_TRIGGER_LPCOMP_DSI_COMP1, 1151 }; 1152 1153 const _cyhal_trigger_source_psoc6_02_t cyhal_mux9_sources[127] = 1154 { 1155 _CYHAL_TRIGGER_CPUSS_ZERO, 1156 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW0, 1157 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH0, 1158 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW0, 1159 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW1, 1160 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH1, 1161 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW1, 1162 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW2, 1163 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH2, 1164 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW2, 1165 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW3, 1166 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH3, 1167 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW3, 1168 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW4, 1169 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH4, 1170 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW4, 1171 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW5, 1172 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH5, 1173 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW5, 1174 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW6, 1175 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH6, 1176 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW6, 1177 _CYHAL_TRIGGER_TCPWM0_TR_OVERFLOW7, 1178 _CYHAL_TRIGGER_TCPWM0_TR_COMPARE_MATCH7, 1179 _CYHAL_TRIGGER_TCPWM0_TR_UNDERFLOW7, 1180 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW0, 1181 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH0, 1182 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW0, 1183 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW1, 1184 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH1, 1185 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW1, 1186 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW2, 1187 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH2, 1188 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW2, 1189 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW3, 1190 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH3, 1191 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW3, 1192 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW4, 1193 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH4, 1194 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW4, 1195 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW5, 1196 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH5, 1197 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW5, 1198 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW6, 1199 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH6, 1200 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW6, 1201 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW7, 1202 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH7, 1203 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW7, 1204 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW8, 1205 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH8, 1206 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW8, 1207 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW9, 1208 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH9, 1209 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW9, 1210 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW10, 1211 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH10, 1212 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW10, 1213 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW11, 1214 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH11, 1215 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW11, 1216 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW12, 1217 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH12, 1218 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW12, 1219 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW13, 1220 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH13, 1221 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW13, 1222 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW14, 1223 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH14, 1224 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW14, 1225 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW15, 1226 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH15, 1227 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW15, 1228 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW16, 1229 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH16, 1230 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW16, 1231 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW17, 1232 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH17, 1233 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW17, 1234 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW18, 1235 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH18, 1236 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW18, 1237 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW19, 1238 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH19, 1239 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW19, 1240 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW20, 1241 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH20, 1242 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW20, 1243 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW21, 1244 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH21, 1245 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW21, 1246 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW22, 1247 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH22, 1248 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW22, 1249 _CYHAL_TRIGGER_TCPWM1_TR_OVERFLOW23, 1250 _CYHAL_TRIGGER_TCPWM1_TR_COMPARE_MATCH23, 1251 _CYHAL_TRIGGER_TCPWM1_TR_UNDERFLOW23, 1252 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 1253 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 1254 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 1255 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 1256 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 1257 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 1258 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 1259 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 1260 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 1261 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 1262 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 1263 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 1264 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 1265 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 1266 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 1267 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 1268 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 1269 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 1270 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 1271 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 1272 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 1273 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 1274 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 1275 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 1276 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 1277 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 1278 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 1279 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 1280 _CYHAL_TRIGGER_LPCOMP_DSI_COMP0, 1281 _CYHAL_TRIGGER_LPCOMP_DSI_COMP1, 1282 }; 1283 1284 const _cyhal_trigger_source_psoc6_02_t cyhal_mux10_sources[12] = 1285 { 1286 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 1287 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 1288 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 1289 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 1290 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 1291 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 1292 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 1293 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 1294 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 1295 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 1296 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 1297 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 1298 }; 1299 1300 const _cyhal_trigger_source_psoc6_02_t cyhal_mux11_sources[14] = 1301 { 1302 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 1303 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 1304 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 1305 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 1306 _CYHAL_TRIGGER_SCB8_TR_TX_REQ, 1307 _CYHAL_TRIGGER_SCB8_TR_RX_REQ, 1308 _CYHAL_TRIGGER_SCB9_TR_TX_REQ, 1309 _CYHAL_TRIGGER_SCB9_TR_RX_REQ, 1310 _CYHAL_TRIGGER_SCB10_TR_TX_REQ, 1311 _CYHAL_TRIGGER_SCB10_TR_RX_REQ, 1312 _CYHAL_TRIGGER_SCB11_TR_TX_REQ, 1313 _CYHAL_TRIGGER_SCB11_TR_RX_REQ, 1314 _CYHAL_TRIGGER_SCB12_TR_TX_REQ, 1315 _CYHAL_TRIGGER_SCB12_TR_RX_REQ, 1316 }; 1317 1318 const _cyhal_trigger_source_psoc6_02_t cyhal_mux12_sources[1] = 1319 { 1320 _CYHAL_TRIGGER_PASS_TR_SAR_OUT, 1321 }; 1322 1323 const _cyhal_trigger_source_psoc6_02_t cyhal_mux13_sources[2] = 1324 { 1325 _CYHAL_TRIGGER_SMIF_TR_TX_REQ, 1326 _CYHAL_TRIGGER_SMIF_TR_RX_REQ, 1327 }; 1328 1329 const _cyhal_trigger_source_psoc6_02_t cyhal_mux14_sources[5] = 1330 { 1331 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_TX_REQ, 1332 _CYHAL_TRIGGER_AUDIOSS0_TR_I2S_RX_REQ, 1333 _CYHAL_TRIGGER_AUDIOSS0_TR_PDM_RX_REQ, 1334 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_TX_REQ, 1335 _CYHAL_TRIGGER_AUDIOSS1_TR_I2S_RX_REQ, 1336 }; 1337 1338 const _cyhal_trigger_source_psoc6_02_t cyhal_mux15_sources[8] = 1339 { 1340 _CYHAL_TRIGGER_USB_DMA_REQ0, 1341 _CYHAL_TRIGGER_USB_DMA_REQ1, 1342 _CYHAL_TRIGGER_USB_DMA_REQ2, 1343 _CYHAL_TRIGGER_USB_DMA_REQ3, 1344 _CYHAL_TRIGGER_USB_DMA_REQ4, 1345 _CYHAL_TRIGGER_USB_DMA_REQ5, 1346 _CYHAL_TRIGGER_USB_DMA_REQ6, 1347 _CYHAL_TRIGGER_USB_DMA_REQ7, 1348 }; 1349 1350 const _cyhal_trigger_source_psoc6_02_t cyhal_mux16_sources[8] = 1351 { 1352 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 1353 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 1354 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 1355 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 1356 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 1357 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 1358 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 1359 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 1360 }; 1361 1362 const _cyhal_trigger_source_psoc6_02_t* cyhal_mux_to_sources[17] = 1363 { 1364 cyhal_mux0_sources, 1365 cyhal_mux1_sources, 1366 cyhal_mux2_sources, 1367 cyhal_mux3_sources, 1368 cyhal_mux4_sources, 1369 cyhal_mux5_sources, 1370 cyhal_mux6_sources, 1371 cyhal_mux7_sources, 1372 cyhal_mux8_sources, 1373 cyhal_mux9_sources, 1374 cyhal_mux10_sources, 1375 cyhal_mux11_sources, 1376 cyhal_mux12_sources, 1377 cyhal_mux13_sources, 1378 cyhal_mux14_sources, 1379 cyhal_mux15_sources, 1380 cyhal_mux16_sources, 1381 }; 1382 1383 const uint8_t cyhal_dest_to_mux[107] = 1384 { 1385 5, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN0 */ 1386 5, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN1 */ 1387 6, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN0 */ 1388 6, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN1 */ 1389 6, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN2 */ 1390 6, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN3 */ 1391 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 */ 1392 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN1 */ 1393 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN2 */ 1394 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN3 */ 1395 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN4 */ 1396 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN5 */ 1397 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN6 */ 1398 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN7 */ 1399 133, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN8 */ 1400 133, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN9 */ 1401 133, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN10 */ 1402 133, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN11 */ 1403 133, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN12 */ 1404 133, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN13 */ 1405 133, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN14 */ 1406 133, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN15 */ 1407 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN16 */ 1408 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN17 */ 1409 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN18 */ 1410 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN19 */ 1411 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN20 */ 1412 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN21 */ 1413 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN22 */ 1414 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN23 */ 1415 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN24 */ 1416 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN25 */ 1417 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN26 */ 1418 128, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN27 */ 1419 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN28 */ 1420 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN0 */ 1421 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN1 */ 1422 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN2 */ 1423 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN3 */ 1424 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN4 */ 1425 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN5 */ 1426 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN6 */ 1427 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN7 */ 1428 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN8 */ 1429 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN9 */ 1430 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN10 */ 1431 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN11 */ 1432 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN12 */ 1433 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN13 */ 1434 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN14 */ 1435 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN15 */ 1436 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN16 */ 1437 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN17 */ 1438 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN18 */ 1439 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN19 */ 1440 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN20 */ 1441 129, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN21 */ 1442 131, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN22 */ 1443 131, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN23 */ 1444 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN24 */ 1445 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN25 */ 1446 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN26 */ 1447 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN27 */ 1448 132, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN28 */ 1449 8, /* CYHAL_TRIGGER_CSD_DSI_START */ 1450 9, /* CYHAL_TRIGGER_PASS_TR_SAR_IN */ 1451 7, /* CYHAL_TRIGGER_PERI_TR_DBG_FREEZE */ 1452 4, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT0 */ 1453 4, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT1 */ 1454 5, /* CYHAL_TRIGGER_PROFILE_TR_START */ 1455 5, /* CYHAL_TRIGGER_PROFILE_TR_STOP */ 1456 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN0 */ 1457 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN1 */ 1458 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN2 */ 1459 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN3 */ 1460 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN4 */ 1461 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN5 */ 1462 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN6 */ 1463 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN7 */ 1464 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN8 */ 1465 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN9 */ 1466 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN10 */ 1467 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN11 */ 1468 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN12 */ 1469 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN13 */ 1470 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN0 */ 1471 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN1 */ 1472 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN2 */ 1473 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN3 */ 1474 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN4 */ 1475 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN5 */ 1476 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN6 */ 1477 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN7 */ 1478 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN8 */ 1479 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN9 */ 1480 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN10 */ 1481 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN11 */ 1482 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN12 */ 1483 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN13 */ 1484 134, /* CYHAL_TRIGGER_USB_DMA_BURSTEND0 */ 1485 134, /* CYHAL_TRIGGER_USB_DMA_BURSTEND1 */ 1486 134, /* CYHAL_TRIGGER_USB_DMA_BURSTEND2 */ 1487 134, /* CYHAL_TRIGGER_USB_DMA_BURSTEND3 */ 1488 134, /* CYHAL_TRIGGER_USB_DMA_BURSTEND4 */ 1489 134, /* CYHAL_TRIGGER_USB_DMA_BURSTEND5 */ 1490 134, /* CYHAL_TRIGGER_USB_DMA_BURSTEND6 */ 1491 134, /* CYHAL_TRIGGER_USB_DMA_BURSTEND7 */ 1492 }; 1493 1494 const uint8_t cyhal_mux_dest_index[107] = 1495 { 1496 0, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN0 */ 1497 1, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN1 */ 1498 0, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN0 */ 1499 1, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN1 */ 1500 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN2 */ 1501 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN3 */ 1502 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 */ 1503 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN1 */ 1504 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN2 */ 1505 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN3 */ 1506 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN4 */ 1507 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN5 */ 1508 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN6 */ 1509 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN7 */ 1510 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN8 */ 1511 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN9 */ 1512 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN10 */ 1513 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN11 */ 1514 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN12 */ 1515 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN13 */ 1516 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN14 */ 1517 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN15 */ 1518 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN16 */ 1519 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN17 */ 1520 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN18 */ 1521 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN19 */ 1522 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN20 */ 1523 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN21 */ 1524 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN22 */ 1525 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN23 */ 1526 8, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN24 */ 1527 9, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN25 */ 1528 10, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN26 */ 1529 11, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN27 */ 1530 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN28 */ 1531 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN0 */ 1532 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN1 */ 1533 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN2 */ 1534 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN3 */ 1535 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN4 */ 1536 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN5 */ 1537 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN6 */ 1538 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN7 */ 1539 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN8 */ 1540 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN9 */ 1541 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN10 */ 1542 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN11 */ 1543 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN12 */ 1544 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN13 */ 1545 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN14 */ 1546 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN15 */ 1547 8, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN16 */ 1548 9, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN17 */ 1549 10, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN18 */ 1550 11, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN19 */ 1551 12, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN20 */ 1552 13, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN21 */ 1553 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN22 */ 1554 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN23 */ 1555 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN24 */ 1556 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN25 */ 1557 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN26 */ 1558 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN27 */ 1559 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN28 */ 1560 0, /* CYHAL_TRIGGER_CSD_DSI_START */ 1561 0, /* CYHAL_TRIGGER_PASS_TR_SAR_IN */ 1562 0, /* CYHAL_TRIGGER_PERI_TR_DBG_FREEZE */ 1563 0, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT0 */ 1564 1, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT1 */ 1565 2, /* CYHAL_TRIGGER_PROFILE_TR_START */ 1566 3, /* CYHAL_TRIGGER_PROFILE_TR_STOP */ 1567 0, /* CYHAL_TRIGGER_TCPWM0_TR_IN0 */ 1568 1, /* CYHAL_TRIGGER_TCPWM0_TR_IN1 */ 1569 2, /* CYHAL_TRIGGER_TCPWM0_TR_IN2 */ 1570 3, /* CYHAL_TRIGGER_TCPWM0_TR_IN3 */ 1571 4, /* CYHAL_TRIGGER_TCPWM0_TR_IN4 */ 1572 5, /* CYHAL_TRIGGER_TCPWM0_TR_IN5 */ 1573 6, /* CYHAL_TRIGGER_TCPWM0_TR_IN6 */ 1574 7, /* CYHAL_TRIGGER_TCPWM0_TR_IN7 */ 1575 8, /* CYHAL_TRIGGER_TCPWM0_TR_IN8 */ 1576 9, /* CYHAL_TRIGGER_TCPWM0_TR_IN9 */ 1577 10, /* CYHAL_TRIGGER_TCPWM0_TR_IN10 */ 1578 11, /* CYHAL_TRIGGER_TCPWM0_TR_IN11 */ 1579 12, /* CYHAL_TRIGGER_TCPWM0_TR_IN12 */ 1580 13, /* CYHAL_TRIGGER_TCPWM0_TR_IN13 */ 1581 0, /* CYHAL_TRIGGER_TCPWM1_TR_IN0 */ 1582 1, /* CYHAL_TRIGGER_TCPWM1_TR_IN1 */ 1583 2, /* CYHAL_TRIGGER_TCPWM1_TR_IN2 */ 1584 3, /* CYHAL_TRIGGER_TCPWM1_TR_IN3 */ 1585 4, /* CYHAL_TRIGGER_TCPWM1_TR_IN4 */ 1586 5, /* CYHAL_TRIGGER_TCPWM1_TR_IN5 */ 1587 6, /* CYHAL_TRIGGER_TCPWM1_TR_IN6 */ 1588 7, /* CYHAL_TRIGGER_TCPWM1_TR_IN7 */ 1589 8, /* CYHAL_TRIGGER_TCPWM1_TR_IN8 */ 1590 9, /* CYHAL_TRIGGER_TCPWM1_TR_IN9 */ 1591 10, /* CYHAL_TRIGGER_TCPWM1_TR_IN10 */ 1592 11, /* CYHAL_TRIGGER_TCPWM1_TR_IN11 */ 1593 12, /* CYHAL_TRIGGER_TCPWM1_TR_IN12 */ 1594 13, /* CYHAL_TRIGGER_TCPWM1_TR_IN13 */ 1595 0, /* CYHAL_TRIGGER_USB_DMA_BURSTEND0 */ 1596 1, /* CYHAL_TRIGGER_USB_DMA_BURSTEND1 */ 1597 2, /* CYHAL_TRIGGER_USB_DMA_BURSTEND2 */ 1598 3, /* CYHAL_TRIGGER_USB_DMA_BURSTEND3 */ 1599 4, /* CYHAL_TRIGGER_USB_DMA_BURSTEND4 */ 1600 5, /* CYHAL_TRIGGER_USB_DMA_BURSTEND5 */ 1601 6, /* CYHAL_TRIGGER_USB_DMA_BURSTEND6 */ 1602 7, /* CYHAL_TRIGGER_USB_DMA_BURSTEND7 */ 1603 }; 1604 1605 #endif /* CY_DEVICE_PSOC6A2M */ 1606
