1 /**
2 * @file xmc_dsd.h
3 * @date 2015-09-18
4 *
5 * @cond
6 *********************************************************************************************************************
7 * XMClib v2.1.24 - XMC Peripheral Driver Library
8 *
9 * Copyright (c) 2015-2019, Infineon Technologies AG
10 * All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
13 * following conditions are met:
14 *
15 * Redistributions of source code must retain the above copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
19 * disclaimer in the documentation and/or other materials provided with the distribution.
20 *
21 * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
22 * products derived from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
25 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with
33 * Infineon Technologies AG dave@infineon.com).
34 *********************************************************************************************************************
35 *
36 * Change History
37 * --------------
38 *
39 * 2015-03-30:
40 * - Initial version
41 *
42 * 2015-06-19:
43 * - Removed version macros and declaration of GetDriverVersion API <BR>
44 * - Added API XMC_DSD_CH_GetRectifyDelay <BR>
45 *
46 * 2015-07-16:
47 * - Renamed API “XMC_DSD_CH_AuxFilter_SetBoudary()” to “XMC_DSD_CH_AuxFilter_SetBoundary()” <BR>
48 *
49 * 2015-09-18:
50 * - Added APIs "XMC_DSD_SetResultEventFlag()","XMC_DSD_ClearResultEventFlag()"
51 * "XMC_DSD_SetAlarmEventFlag()" and "XMC_DSD_ClearAlarmEventFlag()" <BR>
52 * - Support added for XMC4800 microcontroller family <BR>
53 * @endcond
54 *
55 */
56
57
58 #ifndef XMC_DSD_H
59 #define XMC_DSD_H
60
61
62 /**********************************************************************************************************************
63 * HEADER FILES
64 *********************************************************************************************************************/
65 #include <xmc_common.h>
66
67 #if defined(DSD)
68 #include <xmc_scu.h>
69
70 /**
71 * @addtogroup XMClib XMC Peripheral Library
72 * @{
73 */
74
75 /**
76 * @addtogroup DSD
77 * @{
78 * @brief Delta Sigma Demodulator (DSD) driver for the XMC4500, XMC4400 and XMC4800 microcontroller family <br>
79 *
80 * The DSD unit provides a series of digital input channels accepting data streams from external modulators
81 * using the Delta/Sigma (DS) conversion principle. The on-chip demodulator channels convert these inputs to
82 * discrete digital values.
83 * DSD unit can be used for isolated current/voltage measurement and for sensor interfaces.<br>
84 *
85 * Driver is divided in six DSD functional blocks -
86 * - Main Filter (APIs prefixed with XMC_DSD_CH_MainFilter),
87 * - Aux Filter (APIs prefixed with XMC_DSD_CH_AuxFilter),
88 * - Integrator (APIs prefixed with XMC_DSD_CH_Integrator),
89 * - Timestamp (APIs prefixed with XMC_DSD_CH_Timestamp),
90 * - Rectification (APIs prefixed with XMC_DSD_CH_Rectify),
91 * - Carrier Generator (APIs prefixed with XMC_DSD_Generator)
92 *
93 * DSD driver features:
94 * -# DSD channel Configuration structure XMC_DSD_CH_CONFIG_t initialization function XMC_DSD_CH_Init() to configure all the functional blocks (except carrier generator)
95 * -# Configuration structure XMC_DSD_GENERATOR_CONFIG_t and initialization function XMC_DSD_Generator_Init() to configure carrier generator
96 * -# Configuration structure XMC_DSD_CH_FILTER_CONFIG_t and initialization function XMC_DSD_CH_MainFilter_Init() to configure main filter
97 * -# Configuration structure XMC_DSD_CH_AUX_FILTER_CONFIG_t and initialization function XMC_DSD_CH_AuxFilter_Init() to configure auxilary filter
98 * -# Configuration structure XMC_DSD_CH_INTEGRATOR_CONFIG_t and initialization function XMC_DSD_CH_Integrator_Init() to configure integrator
99 * -# Configuration structure XMC_DSD_CH_TIMESTAMP_CONFIG_t and initialization function XMC_DSD_CH_Timestamp_Init() to configure timestamp
100 * -# Configuration structure XMC_DSD_CH_RECTIFY_CONFIG_t and initialization function XMC_DSD_CH_Rectify_Init() to configure rectifier
101 */
102
103 /*********************************************************************************************************************
104 * MACROS
105 ********************************************************************************************************************/
106 #define XMC_DSD_CHECK_MODULE_PTR(PTR) ( ((PTR)== DSD))
107 #define XMC_DSD_CHECK_CHANNEL_PTR(PTR) ( ((PTR) == DSD_CH0) || ((PTR) == DSD_CH1) || ((PTR) == DSD_CH2) || ((PTR) == DSD_CH3))
108
109 /**********************************************************************************************************************
110 * ENUMS
111 *********************************************************************************************************************/
112 /**
113 * DSD Channel
114 */
115 typedef DSD_CH_TypeDef XMC_DSD_CH_t;
116
117 /**
118 * DSD Module
119 */
120 typedef DSD_GLOBAL_TypeDef XMC_DSD_t;
121
122
123 /**
124 * Return types of the API's.Use type @ref XMC_DSD_STATUS_t for this enum.
125 */
126 typedef enum XMC_DSD_STATUS
127 {
128
129 XMC_DSD_STATUS_OK, /**< API fulfills request */
130 XMC_DSD_STATUS_ERROR /**< Error detected */
131
132 } XMC_DSD_STATUS_t;
133
134 /**
135 * Enumerates the divider factor for the PWM pattern signal generator.
136 * Use divider factor to derive input frequency of the carrier signal generator(fCG),
137 * from the selected internal clock source(fCLK).
138 * Use type @ref XMC_DSD_GENERATOR_CLKDIV_t for this enum.
139 */
140 typedef enum XMC_DSD_GENERATOR_CLKDIV
141 {
142 XMC_DSD_GENERATOR_CLKDIV_2048 = 0x00U, /**< fCG = (fCLK/2)/1024 */
143 XMC_DSD_GENERATOR_CLKDIV_4096 = 0x01U, /**< fCG = (fCLK/4)/1024 */
144 XMC_DSD_GENERATOR_CLKDIV_6144 = 0x02U, /**< fCG = (fCLK/6)/1024 */
145 XMC_DSD_GENERATOR_CLKDIV_8192 = 0x03U, /**< fCG = (fCLK/8)/1024 */
146 XMC_DSD_GENERATOR_CLKDIV_10240 = 0x04U, /**< fCG = (fCLK/10)/1024 */
147 XMC_DSD_GENERATOR_CLKDIV_12288 = 0x05U, /**< fCG = (fCLK/12)/1024 */
148 XMC_DSD_GENERATOR_CLKDIV_14336 = 0x06U, /**< fCG = (fCLK/14)/1024 */
149 XMC_DSD_GENERATOR_CLKDIV_16384 = 0x07U, /**< fCG = (fCLK/16)/1024 */
150 XMC_DSD_GENERATOR_CLKDIV_18432 = 0x08U, /**< fCG = (fCLK/18)/1024 */
151 XMC_DSD_GENERATOR_CLKDIV_20480 = 0x09U, /**< fCG = (fCLK/20)/1024 */
152 XMC_DSD_GENERATOR_CLKDIV_22528 = 0x0AU, /**< fCG = (fCLK/22)/1024 */
153 XMC_DSD_GENERATOR_CLKDIV_24576 = 0x0BU, /**< fCG = (fCLK/24)/1024 */
154 XMC_DSD_GENERATOR_CLKDIV_26624 = 0x0CU, /**< fCG = (fCLK/26)/1024 */
155 XMC_DSD_GENERATOR_CLKDIV_28672 = 0x0DU, /**< fCG = (fCLK/28)/1024 */
156 XMC_DSD_GENERATOR_CLKDIV_30720 = 0x0EU, /**< fCG = (fCLK/30)/1024 */
157 XMC_DSD_GENERATOR_CLKDIV_32768 = 0x0FU /**< fCG = (fCLK/32)/1024 */
158
159 } XMC_DSD_GENERATOR_CLKDIV_t;
160
161
162 /**
163 * Enumerates the carrier generator operating mode.
164 * Use type @ref XMC_DSD_GENERATOR_MODE_t for this enum.
165 */
166 typedef enum XMC_DSD_GENERATOR_MODE
167 {
168 XMC_DSD_GENERATOR_MODE_STOPPED = 0x00U, /**< Stopped */
169 XMC_DSD_GENERATOR_MODE_RECTANGLE = 0x01U, /**< Square wave */
170 XMC_DSD_GENERATOR_MODE_TRIANGLE = 0x02U, /**< Triangle */
171 XMC_DSD_GENERATOR_MODE_SINE = 0x03U /**< Sine wave*/
172
173 } XMC_DSD_GENERATOR_MODE_t;
174
175
176 /**
177 * Enumerates the CIC(cyclic integrating comb) filter type.
178 * Use type @ref XMC_DSD_CH_FILTER_TYPE_t for this enum.
179 */
180 typedef enum XMC_DSD_CH_FILTER_TYPE
181 {
182
183 XMC_DSD_CH_FILTER_TYPE_CIC1, /**< CIC1 filter*/
184 XMC_DSD_CH_FILTER_TYPE_CIC2, /**< CIC2 filter*/
185 XMC_DSD_CH_FILTER_TYPE_CIC3, /**< CIC3 filter*/
186 XMC_DSD_CH_FILTER_TYPE_CICF /**< CICF filter*/
187
188 } XMC_DSD_CH_FILTER_TYPE_t;
189
190 /**
191 * Enumerates the input data source select.
192 * Use type @ref XMC_DSD_CH_DATA_SOURCE_t for this enum.
193 */
194 typedef enum XMC_DSD_CH_DATA_SOURCE
195 {
196
197 XMC_DSD_CH_DATA_SOURCE_DISCONNECT = 0U, /**< Disconnected */
198 XMC_DSD_CH_DATA_SOURCE_A_DIRECT = 2U, /**< External source, from input A, direct */
199 XMC_DSD_CH_DATA_SOURCE_A_INVERTED = 3U, /**< External source, from input A, inverted */
200 XMC_DSD_CH_DATA_SOURCE_B_DIRECT = 4U, /**< External source, from input B, direct */
201 XMC_DSD_CH_DATA_SOURCE_B_INVERTED = 5U /**< External source, from input B, inverted */
202
203 } XMC_DSD_CH_DATA_SOURCE_t;
204
205 /**
206 * Enumerates the sample clock source select.
207 * Use type @ref XMC_DSD_CH_CLOCK_SOURCE_t for this enum.
208 */
209 typedef enum XMC_DSD_CH_CLOCK_SOURCE
210 {
211
212 XMC_DSD_CH_CLOCK_SOURCE_A = 1U, /**< External source, from input A */
213 XMC_DSD_CH_CLOCK_SOURCE_B = 2U, /**< External source, from input B */
214 XMC_DSD_CH_CLOCK_SOURCE_C = 3U, /**< External source, from input C */
215 XMC_DSD_CH_CLOCK_SOURCE_D = 4U, /**< External source, from input D */
216 XMC_DSD_CH_CLOCK_SOURCE_INTERN = 15U /**< Internal clock source */
217
218 } XMC_DSD_CH_CLOCK_SOURCE_t;
219
220
221 /**
222 * Enumerates the data strobe generation Mode.
223 * Use type @ref XMC_DSD_CH_STROBE_t for this enum.
224 */
225 typedef enum XMC_DSD_CH_STROBE
226 {
227
228 XMC_DSD_CH_STROBE_DIRECT_CLOCK_RISE = 1U, /* Direct clock, a sample trigger is generated at each rising clock edge */
229 XMC_DSD_CH_STROBE_DIRECT_CLOCK_FALL = 2U, /* Direct clock, a sample trigger is generated at each falling clock edge */
230 XMC_DSD_CH_STROBE_DOUBLE_DATA = 3U, /* Double data, a sample trigger is generated at each rising and falling clock edge */
231 XMC_DSD_CH_STROBE_DOUBLE_CLOCK_RISE = 5U, /* Double clock, a sample trigger is generated at every 2nd rising clock edge */
232 XMC_DSD_CH_STROBE_DOUBLE_CLOCK_FALL = 6U /* Double clock, a sample trigger is generated at every 2nd falling clock edge */
233
234 } XMC_DSD_CH_STROBE_t;
235
236
237 /**
238 * Enumerates the divider factor for modulator clock (fMOD).
239 * Use divider factor to derive modulator clock frequency(fMOD),
240 * from the selected internal clock source(fCLK).
241 * Use type @ref XMC_DSD_CH_CLK_t for this enum.
242 */
243 typedef enum XMC_DSD_CH_CLK_DIV
244 {
245
246 XMC_DSD_CH_CLK_DIV_2, /**< fMOD = fCLK/2 */
247 XMC_DSD_CH_CLK_DIV_4, /**< fMOD = fCLK/4 */
248 XMC_DSD_CH_CLK_DIV_6, /**< fMOD = fCLK/6 */
249 XMC_DSD_CH_CLK_DIV_8, /**< fMOD = fCLK/8 */
250 XMC_DSD_CH_CLK_DIV_10, /**< fMOD = fCLK/10 */
251 XMC_DSD_CH_CLK_DIV_12, /**< fMOD = fCLK/12 */
252 XMC_DSD_CH_CLK_DIV_14, /**< fMOD = fCLK/14 */
253 XMC_DSD_CH_CLK_DIV_16, /**< fMOD = fCLK/16 */
254 XMC_DSD_CH_CLK_DIV_18, /**< fMOD = fCLK/18 */
255 XMC_DSD_CH_CLK_DIV_20, /**< fMOD = fCLK/20 */
256 XMC_DSD_CH_CLK_DIV_22, /**< fMOD = fCLK/22 */
257 XMC_DSD_CH_CLK_DIV_24, /**< fMOD = fCLK/24 */
258 XMC_DSD_CH_CLK_DIV_26, /**< fMOD = fCLK/26 */
259 XMC_DSD_CH_CLK_DIV_28, /**< fMOD = fCLK/28 */
260 XMC_DSD_CH_CLK_DIV_30, /**< fMOD = fCLK/30 */
261 XMC_DSD_CH_CLK_DIV_32 /**< fMOD = fCLK/32 */
262
263 } XMC_DSD_CH_CLK_t;
264
265 /**
266 * Enumerates the integrator trigger mode.
267 * Use type @ref XMC_DSD_CH_INTEGRATOR_START_t for this enum.
268 */
269 typedef enum XMC_DSD_CH_INTEGRATOR_START
270 {
271 XMC_DSD_CH_INTEGRATOR_START_OFF, /**< No integration trigger */
272 XMC_DSD_CH_INTEGRATOR_START_TRIGGER_FALL, /**< Trigger event upon a falling edge */
273 XMC_DSD_CH_INTEGRATOR_START_TRIGGER_RISE, /**< Trigger event upon a rising edge */
274 XMC_DSD_CH_INTEGRATOR_START_ALLWAYS_ON /**< No trigger, integrator active all the time */
275
276 } XMC_DSD_CH_INTEGRATOR_START_t;
277
278 /**
279 * Enumerates the integration enable.
280 * Use type @ref XMC_DSD_CH_INTEGRATOR_STOP_t for this enum.
281 */
282 typedef enum XMC_DSD_CH_INTEGRATOR_STOP
283 {
284 XMC_DSD_CH_INTEGRATOR_STOP_END_OF_LOOPS, /**< Integration stopped upon the inverse trigger event */
285 XMC_DSD_CH_INTEGRATOR_STOP_ENDLESS_OR_INVERSE_TRIGGER /**< Integration enabled upon the defined trigger event. */
286
287 } XMC_DSD_CH_INTEGRATOR_STOP_t;
288
289
290 /**
291 * Enumerates the trigger signal.
292 * Use type @ref XMC_DSD_CH_TRIGGER_SOURCE_t for this enum.
293 */
294 typedef enum XMC_DSD_CH_TRIGGER_SOURCE
295 {
296
297 XMC_DSD_CH_TRIGGER_SOURCE_A = 0U, /**< Trigger signal,input A*/
298 XMC_DSD_CH_TRIGGER_SOURCE_B = 1U, /**< Trigger signal,input B*/
299 XMC_DSD_CH_TRIGGER_SOURCE_C = 2U, /**< Trigger signal,input C*/
300 XMC_DSD_CH_TRIGGER_SOURCE_D = 3U, /**< Trigger signal,input D*/
301 XMC_DSD_CH_TRIGGER_SOURCE_E = 4U, /**< Trigger signal,input E*/
302 XMC_DSD_CH_TRIGGER_SOURCE_F = 5U, /**< Trigger signal,input F*/
303 XMC_DSD_CH_TRIGGER_SOURCE_G = 6U, /**< Trigger signal,input G*/
304 XMC_DSD_CH_TRIGGER_SOURCE_H = 7U /**< Trigger signal,input H*/
305
306 } XMC_DSD_CH_TRIGGER_SOURCE_t;
307
308 /**
309 * Enumerates the timestamp trigger mode.
310 * Use type @ref XMC_DSD_CH_TIMESTAMP_TRIGGER_t for this enum.
311 */
312 typedef enum XMC_DSD_CH_TIMESTAMP_TRIGGER
313 {
314 XMC_DSD_CH_TIMESTAMP_TRIGGER_DISABLE, /**< No trigger event*/
315 XMC_DSD_CH_TIMESTAMP_TRIGGER_FALL, /**< Trigger event upon a falling edge*/
316 XMC_DSD_CH_TIMESTAMP_TRIGGER_RISE, /**< Trigger event upon a rising edge*/
317 XMC_DSD_CH_TIMESTAMP_TRIGGER_BOTH_EDGES /**< Trigger event upon both the edge*/
318
319 } XMC_DSD_CH_TIMESTAMP_TRIGGER_t;
320
321 /**
322 * Enumerates the carrier generation mode.
323 * Use type @ref XMC_DSD_CH_SIGN_SOURCE_t for this enum.
324 */
325 typedef enum XMC_DSD_CH_SIGN_SOURCE
326 {
327 XMC_DSD_CH_SIGN_SOURCE_ON_CHIP_GENERATOR, /**< Carrier is generated internally by DSD */
328 XMC_DSD_CH_SIGN_SOURCE_NEXT_CHANNEL, /**< Carrier sign signal is generated internally by next channel*/
329 XMC_DSD_CH_SIGN_SOURCE_EXTERNAL_A, /**< Carrier is generated externally, External sign signal A*/
330 XMC_DSD_CH_SIGN_SOURCE_EXTERNAL_B /**< Carrier is generated externally, External sign signal B*/
331
332 } XMC_DSD_CH_SIGN_SOURCE_t;
333
334 /**
335 * Enumerates the channel run control bit register value in global run control register.
336 * Use type @ref XMC_DSD_CH_ID_t for this enum.
337 */
338 typedef enum XMC_DSD_CH_ID
339 {
340 XMC_DSD_CH_ID_0 = 1U, /**< Register value for channel 0 */
341 XMC_DSD_CH_ID_1 = 2U, /**< Register value for channel 1 */
342 XMC_DSD_CH_ID_2 = 4U, /**< Register value for channel 2 */
343 XMC_DSD_CH_ID_3 = 8U /**< Register value for channel 3 */
344
345 } XMC_DSD_CH_ID_t;
346
347 /**
348 * Enumerates the service request generation mode for auxiliary filter.
349 * Use type @ref XMC_DSD_CH_AUX_EVENT_t for this enum.
350 * Note: This is combined ENUM for SRGA + ESEL bit fields
351 */
352 typedef enum XMC_DSD_CH_AUX_EVENT
353 {
354 XMC_DSD_CH_AUX_EVENT_DISABLED = 0U, /**< Service request is disabled */
355 XMC_DSD_CH_AUX_EVENT_EVERY_NEW_RESULT = 1U, /**< Service request generated for aux filter for every new result */
356 XMC_DSD_CH_AUX_EVENT_CAPTURE_SIGN_DELAY = 2U, /**< Service request generated for alternate source */
357 XMC_DSD_CH_AUX_EVENT_INSIDE_BOUNDARY = 5U, /**< Service request generated for aux filter if result is inside boundary */
358 XMC_DSD_CH_AUX_EVENT_OUTSIDE_BOUNDARY = 9U /**< Service request generated for aux filter if result is outside boundary */
359
360 } XMC_DSD_CH_AUX_EVENT_t;
361
362 /**
363 * Enumerates the service request generation for main chain filter.
364 * Use type @ref XMC_DSD_CH_RESULT_EVENT_t for this enum.
365 */
366 typedef enum XMC_DSD_CH_RESULT_EVENT
367 {
368 XMC_DSD_CH_RESULT_EVENT_DISABLE = 0U, /**< Disable service request */
369 XMC_DSD_CH_RESULT_EVENT_ENABLE = 3U /**< Enable service request for each new result value */
370
371 } XMC_DSD_CH_RESULT_EVENT_t;
372
373
374 /*********************************************************************************************************************
375 * DATA STRUCTURES
376 ********************************************************************************************************************/
377 /*Anonymous structure/union guard start*/
378 #if defined(__CC_ARM)
379 #pragma push
380 #pragma anon_unions
381 #elif defined(__TASKING__)
382 #pragma warning 586
383 #endif
384
385 /**
386 * DSD generator generates several pattern and frequencies.
387 * Use type @ref XMC_DSD_GENERATOR_CONFIG_t for this data structure.
388 * Note: Output pins have to be enabled by user.
389 */
390 typedef struct XMC_DSD_GENERATOR_CONFIG
391 {
392 union
393 {
394 struct
395 {
396 uint32_t mode: 2; /**< carrier generator operating mode. This parameter can take a value of XMC_DSD_GENERATOR_MODE_t */
397 uint32_t bit_reverse: 1; /**< should PWM signal be bit-reversed? 0: Normal mode, 1:Bit-reverse mode */
398 uint32_t inverted_polarity: 1; /**< should PWM signal start from negative max. 0: Normal, 1: Inverted */
399 uint32_t frequency: 4; /**< Frequency divider value of PWM signal. This parameter can take a value of XMC_DSD_GENERATOR_CLKDIV_t */
400 uint32_t :24;
401 };
402 uint32_t generator_conf; /**< Carrier generator configuration register(CGCFG)*/
403 };
404 } XMC_DSD_GENERATOR_CONFIG_t;
405
406
407 /**
408 * DSD filter is the basic module of the DSD. It can be used separately or can be combined with the other modules like
409 * integrator, rectify, auxiliary filter etc.
410 * The filter demodulates the incoming bit stream from the delta sigma modulator to a 16 bit result.
411 * Note: Configure or reconfigure filter parameters while the channel is inactive.
412 */
413 typedef struct XMC_DSD_CH_FILTER_CONFIG
414 {
415 uint32_t clock_divider: 4; /**< This parameter can take a value of XMC_DSD_CH_CLK_t */
416 int16_t offset; /**< Offset subtracted from result.This parameter can take a value of int16_t */
417 union
418 {
419 struct
420 {
421 uint32_t data_source: 4; /**< This parameter can take a value of XMC_DSD_CH_DATA_SOURCE_t */
422 uint32_t : 12;
423 uint32_t clock_source: 4; /**< This parameter can take a value of XMC_DSD_CH_CLOCK_SOURCE_t */
424 uint32_t strobe: 4; /**< This parameter can take a value of XMC_DSD_CH_STROBE_t */
425 uint32_t :8;
426 };
427 uint32_t demodulator_conf; /*Demodulator Input Configuration Register*/
428 };
429 union
430 {
431 struct
432 {
433 uint32_t : 8;
434 uint32_t filter_type: 2; /**< This parameter can take a value of XMC_DSD_CH_FILTER_TYPE_t */
435 uint32_t : 4;
436 uint32_t result_event : 2; /**< This parameter can take a value of XMC_DSD_CH_RESULT_EVENT_t */
437 uint32_t : 8;
438 uint32_t : 8;
439 };
440 uint32_t main_filter_conf;
441
442 };
443 uint32_t decimation_factor; /**< This parameter can be in range of 4 - 256[dec] */
444 uint32_t filter_start_value; /**< This parameter can be in range of 4 - decimation_factor[dec]*/
445
446 } XMC_DSD_CH_FILTER_CONFIG_t;
447
448 /**
449 * The integrator is mainly used for high accurate measurement.
450 * Note:DSD Filter is mandatory to use this block.
451 */
452 typedef struct XMC_DSD_CH_INTEGRATOR_CONFIG
453 {
454 union
455 {
456 struct
457 {
458 uint32_t :8;
459 uint32_t start_condition: 2; /**< Can take a value of XMC_DSD_CH_INTEGRATOR_START_t.Bitfields \a ITRMODE of \a DICFG.*/
460 uint32_t :2;
461 uint32_t trigger_source: 3; /**< Can take a value of XMC_DSD_CH_TRIGGER_SOURCE_t.Bitfields \a TRSEL of \a DICFG. */
462 uint32_t :17;
463 };
464 uint32_t integrator_trigger; /**< Demodulator Input Configuration Register(\a DICFG).*/
465
466 };
467 uint32_t integration_loop; /**< Integration loops to see stop condition. Bitfields \a REPVAL of \a IWCTR.*/
468 uint32_t discarded_values; /**< Number of mainfilter results,discarded before integration starts.Bitfields \a NVALDIS of \a IWCTR.*/
469 uint32_t stop_condition; /**< Integrator stop condition. Can take a value of XMC_DSD_CH_INTEGRATOR_STOP_t.Bitfields \a IWS of \a IWCTR.*/
470 uint32_t counted_values; /**< Number of mainfilter results, integrated to a integrator result.Bitfields \a NVALINT of \a IWCTR.*/
471
472 } XMC_DSD_CH_INTEGRATOR_CONFIG_t;
473
474 /**
475 * DSD timestamp saves result, filter counter register and integrator count register.
476 * Note: Trigger source for timestamp and integrator trigger are shared.
477 * DSD Filter is mandatory to use this block.
478 */
479 typedef struct XMC_DSD_CH_TIMESTAMP_CONFIG
480 {
481 union
482 {
483 struct
484 {
485 uint32_t :10;
486 uint32_t trigger_mode:2; /**< This parameter can take a value of XMC_DSD_CH_TIMESTAMP_TRIGGER_t */
487 uint32_t trigger_source: 3; /**< This parameter can take a value of XMC_DSD_CH_TRIGGER_SOURCE_t */
488 uint32_t : 17;
489 };
490 uint32_t timestamp_conf;
491 };
492 } XMC_DSD_CH_TIMESTAMP_CONFIG_t;
493
494 /**
495 * DSD auxiliary Filter is used as fast filter to detect overvoltage or current by defining the boundaries.
496 */
497 typedef struct XMC_DSD_CH_AUX_FILTER_CONFIG
498 {
499 union
500 {
501 struct
502 {
503 uint32_t : 8; /**< This parameter can be in range of 4 - 256[dec] */
504 uint32_t filter_type : 2; /**< This parameter can take a value of XMC_DSD_CH_FILTER_TYPE_t */
505 uint32_t result_event_type : 4; /**< Result event for aux filter and the event select configuration.
506 Use enum XMC_DSD_CH_AUX_EVENT_t */
507 uint32_t enable_integrator_coupling : 1; /**< Only enable AUX filter when Integrator is enabled*/
508 uint32_t : 17;
509 };
510 uint32_t aux_filter_conf;
511 };
512 union
513 {
514 struct
515 {
516 uint32_t lower_boundary : 16; /**< This parameter can take a value of int16_t */
517 uint32_t upper_boundary : 16; /**< This parameter can take a value of int16_t */
518 };
519 uint32_t boundary_conf;
520 };
521
522 uint32_t decimation_factor; /**< This parameter can be in range of 4 - 256[dec]*/
523
524 } XMC_DSD_CH_AUX_FILTER_CONFIG_t;
525
526
527 /**
528 * DSD Rectify.
529 * Note: DSD Filter and integrator is mandatory to use this block.
530 */
531 typedef struct XMC_DSD_CH_RECTIFY_CONFIG
532 {
533 union
534 {
535 struct
536 {
537 uint32_t :4;
538 uint32_t sign_source: 2; /**< Can take a value of XMC_DSD_CH_SIGN_SOURCE_t.Bitfields \a SSRC of \a RECTCFG.*/
539 uint32_t :26;
540 };
541 uint32_t rectify_config; /**< Rectification configuration register(\a RECTCFG)*/
542 };
543
544 uint8_t delay;
545 uint8_t half_cycle;
546
547 } XMC_DSD_CH_RECTIFY_CONFIG_t;
548
549
550 /*Anonymous structure/union guard end*/
551 #if defined(__CC_ARM)
552 #pragma pop
553 #elif defined(__TASKING__)
554 #pragma warning restore
555 #endif
556
557 /**
558 * DSD Enable Channel
559 */
560 typedef struct XMC_DSD_CONFIG
561 {
562 XMC_DSD_CH_FILTER_CONFIG_t *const filter; /**< Pointer to the filter configuration */
563 XMC_DSD_CH_INTEGRATOR_CONFIG_t *const integrator; /**< Pointer to the integrator configuration*/
564 XMC_DSD_CH_TIMESTAMP_CONFIG_t *const timestamp; /**< Pointer to the time stamp configuration*/
565 XMC_DSD_CH_AUX_FILTER_CONFIG_t *const aux; /**< Pointer to the aux_filter configuration*/
566 XMC_DSD_CH_RECTIFY_CONFIG_t *const rectify; /**< Pointer to the rectify configuration*/
567 } XMC_DSD_CH_CONFIG_t;
568
569
570 /**********************************************************************************************************************
571 * API PROTOTYPES
572 *********************************************************************************************************************/
573 #ifdef __cplusplus
574 extern "C" {
575 #endif
576
577 /**
578 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
579 * @return None
580 *
581 * \par<b>Description</b><br>
582 * De-asserts the DSD module from reset.\n
583 * Configures \a PRCLR0 register's \a DSDRS bit field.
584 * If running on XMC44/XMC48 device then it will ungate the peripheral clock.
585 *
586 * \par<b>Note</b><br>
587 * It is internally called by XMC_DSD_Init().
588 *
589 * \par<b>Related APIs:</b><BR>
590 * XMC_DSD_Disable(),XMC_DSD_Init() \n\n\n
591 */
592 void XMC_DSD_Enable(XMC_DSD_t *const dsd);
593
594 /**
595 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
596 * @return None
597 *
598 * \par<b>Description</b><br>
599 * Asserts the DSD module into reset.\n
600 * Configures \a PRSET0 register's \a DSDRS bit field.
601 * If running on XMC44/XMC48 device then it will gate the peripheral clock.
602 *
603 * \par<b>Related APIs:</b><BR>
604 * XMC_DSD_Enable()\n\n\n
605 */
606 void XMC_DSD_Disable(XMC_DSD_t *const dsd);
607 /**
608 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
609 * @return None
610 *
611 * \par<b>Description</b><br>
612 * Enable the module clock and internal module clock for DSD.\n
613 * Configures bit field \a MCSEL of register \a GLOBCFG and bit field \a DISR of register \a CLC.
614 *
615 * \par<b>Note</b><br>
616 * It is internally called by XMC_DSD_Init().
617 *
618 * \par<b>Related APIs:</b><BR>
619 * XMC_DSD_DisableClock(),XMC_DSD_Init() \n\n\n
620 */
621 void XMC_DSD_EnableClock(XMC_DSD_t *const dsd);
622 /**
623 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
624 * @return None
625 *
626 * \par<b>Description</b><br>
627 * Stop the module clock and disable internal module clock for DSD.\n
628 * Configures bit field \a MCSEL of register \a GLOBCFG and bit field \a DISR of register \a CLC.
629 *
630 * \par<b>Related APIs:</b><BR>
631 * XMC_DSD_DisableClock()\n\n\n
632 */
633 void XMC_DSD_DisableClock(XMC_DSD_t *const dsd);
634 /**
635 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
636 * @return bool Return 1 if success else 0.
637 *
638 * \par<b>Description</b><br>
639 * Find out if the DSD reset is asserted.\n
640 * Read \a PRSTAT0 register's \a DSDRS bit field.\n\n\n
641 */
642 bool XMC_DSD_IsEnabled(XMC_DSD_t *const dsd);
643
644 /**
645 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
646 * @return None
647 *
648 * \par<b>Description</b><br>
649 * Enable the DSD module and clock.\n
650 *
651 * \par<b>Note</b><br>
652 * This is the first API which application must invoke to configure DSD.
653 *
654 * \par<b>Related APIs:</b><BR>
655 * XMC_DSD_Enable(),XMC_DSD_EnableClock()\n\n\n
656 */
657 void XMC_DSD_Init(XMC_DSD_t *const dsd);
658 /**
659 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
660 * @param init Pointer to an instance of data structure of type @ref XMC_DSD_CH_TIMESTAMP_CONFIG_t
661 * @return None
662 *
663 * \par<b>Description</b><br>
664 * Initialize timestamp mode of DSD module with \a init.\n
665 * Configures bits \a TRSEL and \a TSTRMODE of register \a DICFG .
666 *
667 * \par<b>Note</b><br>
668 * Trigger source for timestamp and integrator are shared.
669 * It is internally called by XMC_DSD_CH_Init().
670 *
671 * \par<b>Related APIs:</b><BR>
672 * XMC_DSD_CH_Init()\n\n\n
673 */
674 void XMC_DSD_CH_Timestamp_Init(XMC_DSD_CH_t *const channel, const XMC_DSD_CH_TIMESTAMP_CONFIG_t *const init);
675
676 /**
677 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
678 * @param init Pointer to an instance of data structure of type @ref XMC_DSD_CH_CONFIG_t
679 * @return XMC_DSD_STATUS_t if success Returns @ref XMC_DSD_STATUS_OK
680 * else return @ref XMC_DSD_STATUS_ERROR.
681 *
682 * \par<b>Description</b><br>
683 * Initialize main filter,auxiliary filter,integrator, rectifier and timestamp of DSD module with \a init.\n
684 * Internally this API invoke main filter, auxiliary filter, integrator, rectifier and timestamp init API.
685 *
686 * \par<b>Related APIs:</b><BR>
687 * XMC_DSD_CH_MainFilter_Init(),XMC_DSD_CH_AuxFilter_Init(),XMC_DSD_CH_Integrator_Init(),
688 * XMC_DSD_CH_Rectify_Init(),XMC_DSD_CH_Timestamp_Init()\n\n\n
689 */
690 XMC_DSD_STATUS_t XMC_DSD_CH_Init(XMC_DSD_CH_t *const channel, const XMC_DSD_CH_CONFIG_t *const init);
691
692 /**
693 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
694 * @param channel Channel run control bit register value
695 * @return None
696 *
697 * \par<b>Description</b><br>
698 * Start demodulator channel by enabling run control bit.
699 * Multiple channel can be start at a time.
700 * For an example: To start all four channel, call this function as
701 * XMC_DSD_Start(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1|XMC_DSD_CH_ID_2|XMC_DSD_CH_ID_3));
702 *
703 * \par<b>Note</b><br>
704 * All filter blocks are cleared when CHxRUN is set.
705 *
706 * \par<b>Related APIs:</b><BR>
707 * XMC_DSD_Stop(),XMC_DSD_IsChannelStarted()\n\n\n
708 */
XMC_DSD_Start(XMC_DSD_t * const dsd,const uint32_t channel)709 __STATIC_INLINE void XMC_DSD_Start(XMC_DSD_t *const dsd, const uint32_t channel)
710 {
711 XMC_ASSERT("XMC_DSD_Start:Invalid module pointer", XMC_DSD_CHECK_MODULE_PTR(dsd));
712 dsd->GLOBRC |= channel;
713 }
714
715 /**
716 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t\n
717 * @param channel Channel run control bit register value\n
718 * @return None\n
719 *
720 * \par<b>Description</b><br>
721 * Stop demodulator channel by resetting run control bit.
722 * Multiple channel can be stop at a time.
723 * For an example: To stop all four channel, call this function as
724 * XMC_DSD_Stop(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1|XMC_DSD_CH_ID_2|XMC_DSD_CH_ID_3));
725 *
726 *
727 * \par<b>Related APIs:</b><BR>
728 * XMC_DSD_Start(),XMC_DSD_IsChannelStarted()\n\n\n
729 */
XMC_DSD_Stop(XMC_DSD_t * const dsd,const uint32_t channel)730 __STATIC_INLINE void XMC_DSD_Stop(XMC_DSD_t *const dsd, const uint32_t channel)
731 {
732 XMC_ASSERT("XMC_DSD_Stop:Invalid module pointer", XMC_DSD_CHECK_MODULE_PTR(dsd));
733 dsd->GLOBRC &= (uint32_t) ~channel;
734 }
735
736 /**
737 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t\n
738 * @param channel Channel run control bit register value of type @ref XMC_DSD_CH_ID_t\n
739 * @return bool Return 1 if started else 0.\n
740 *
741 * \par<b>Description</b><br>
742 * Find out if particular demodulator channel is started or not.\n
743 *
744 * \par<b>Related APIs:</b><BR>
745 * XMC_DSD_Start(),XMC_DSD_Stop()\n\n\n
746 */
XMC_DSD_IsChannelStarted(XMC_DSD_t * const dsd,const XMC_DSD_CH_ID_t channel)747 __STATIC_INLINE bool XMC_DSD_IsChannelStarted(XMC_DSD_t *const dsd, const XMC_DSD_CH_ID_t channel)
748 {
749 bool status;
750 XMC_ASSERT("XMC_DSD_IsChannelStarted:Invalid module pointer", XMC_DSD_CHECK_MODULE_PTR(dsd));
751 if (dsd->GLOBRC & (uint32_t)channel)
752 {
753 status = true;
754 }
755 else
756 {
757 status = false;
758 }
759 return (status);
760 }
761
762 /**
763 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
764 * @param dsd_Result pointer point to the address of 16 bit variable
765 * @return None
766 *
767 * \par<b>Description:</b><br>
768 * Returns the result of most recent conversion associated with this channel.\n
769 * A call to this API would access the register bit field \a RESMx.RESULT (x = 0 - 3).
770 *
771 * \par<b>Related APIs:</b><br>
772 * XMC_DSD_CH_GetResult_TS()\n\n\n
773 */
XMC_DSD_CH_GetResult(XMC_DSD_CH_t * const channel,int16_t * dsd_Result)774 __STATIC_INLINE void XMC_DSD_CH_GetResult(XMC_DSD_CH_t *const channel, int16_t* dsd_Result)
775 {
776 uint16_t result;
777 result = (uint16_t)((uint32_t)channel->RESM & DSD_CH_RESM_RESULT_Msk);
778 *dsd_Result = (int16_t)result;
779 }
780
781 /**
782 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t\n
783 * @param dsd_Result pointer point to the address of 16 bit variable holds result value\n
784 * @param dsd_filter_loop pointer point to the address of 8 bit variable holds decimation counter value\n
785 * @param dsd_integration_loop pointer point to the address of 8 bit integration counter variable holds value\n
786 * @return None\n
787 *
788 * \par<b>Description:</b><br>
789 * API to get the result of the last conversion associated with this channel with
790 * CIC filter decimation counter and number of values counted.\n
791 * A call to this API would access the register bit field \a TSTMPx.RESULT \a TSTMPx.CFMDCNT and \a TSTMPx.NVALCNT where (x = 0 - 3).
792 *
793 * \par<b>Related APIs:</b><br>
794 * XMC_DSD_CH_GetResult(),XMC_DSD_CH_GetResult_TS_Time()\n\n\n
795 */
796 void XMC_DSD_CH_GetResult_TS(
797 XMC_DSD_CH_t *const channel,
798 int16_t* dsd_Result,
799 uint8_t* dsd_filter_loop,
800 uint8_t* dsd_integration_loop);
801
802 /**
803 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t\n
804 * @param dsd_Result pointer point to the address of 16 bit variable holds result value\n
805 * @param time pointer point to the address of 32 bit variable holds the time\n
806 * @return None
807 *
808 * \par<b>Description:</b><br>
809 * API to get the result of the last conversion with the time, associated with this channel.\n
810 *
811 * \par<b>Related APIs:</b><br>
812 * XMC_DSD_CH_GetResult(),XMC_DSD_CH_GetResult_TS()\n\n\n
813 */
814 void XMC_DSD_CH_GetResult_TS_Time(XMC_DSD_CH_t *const channel, int16_t* dsd_Result, uint32_t* time);
815
816 /**
817 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
818 * @param dsd_Result pointer point to the address of 16 bit variable
819 * @return None
820 *
821 * \par<b>Description:</b><br>
822 * Returns the most recent conversion result values of the auxiliary filter associated with this channel.\n
823 * A call to this API would access the register bit field \a RESAx.RESULT (x = 0 - 3).
824 *
825 * \par<b>Related APIs:</b><br>
826 * XMC_DSD_CH_GetResult_TS()\n\n\n
827 */
XMC_DSD_CH_GetResult_AUX(XMC_DSD_CH_t * const channel,int16_t * dsd_Result)828 __STATIC_INLINE void XMC_DSD_CH_GetResult_AUX(XMC_DSD_CH_t *const channel, int16_t* dsd_Result)
829 {
830 uint16_t result;
831 result = (uint16_t) (channel->RESA & DSD_CH_RESA_RESULT_Msk);
832 *dsd_Result = (int16_t) (result);
833 }
834
835 /**
836 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
837 * @param init Pointer to an instance of data structure of type @ref XMC_DSD_GENERATOR_CONFIG_t
838 * @return None
839 *
840 * \par<b>Description</b><br>
841 * This API initialize generator module with \a init, to generate a wave for a resolver.
842 * Three types of waveforms can be generated: Rectangle, Triangle and Sine.
843 *
844 */
845 void XMC_DSD_Generator_Init(XMC_DSD_t *const dsd, const XMC_DSD_GENERATOR_CONFIG_t *const init);
846
847 /**
848 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
849 * @param config Pointer to an instance of data structure of type @ref XMC_DSD_GENERATOR_CONFIG_t
850 * @return None
851 *
852 * \par<b>Description</b><br>
853 * Start carrier generator by configuring operating mode.
854 * Configures bit field \a CGMOD of register \a CGCFG.
855 *
856 *
857 * \par<b>Related APIs:</b><BR>
858 * XMC_DSD_Generator_Stop()\n\n\n
859 */
XMC_DSD_Generator_Start(XMC_DSD_t * const dsd,const XMC_DSD_GENERATOR_CONFIG_t * const config)860 __STATIC_INLINE void XMC_DSD_Generator_Start(XMC_DSD_t *const dsd, const XMC_DSD_GENERATOR_CONFIG_t *const config)
861 {
862 XMC_ASSERT("XMC_DSD_Generator_Start:Invalid module pointer", XMC_DSD_CHECK_MODULE_PTR(dsd));
863 XMC_ASSERT("XMC_DSD_Generator_Start:NULL Pointer", (config != (XMC_DSD_GENERATOR_CONFIG_t *)NULL) );
864 dsd->CGCFG |= config->mode;
865 }
866
867 /**
868 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
869 * @return None
870 *
871 * \par<b>Description</b><br>
872 * Stop carrier generator by configuring operating mode.
873 * Reset bit field \a CGMOD of register \a CGCFG.
874 *
875 * \par<b>Note</b><br>
876 * Stopping the carrier generator terminates the PWM output after completion of the current period.
877 *
878 * \par<b>Related APIs:</b><BR>
879 * XMC_DSD_Generator_Start()\n\n\n
880 */
XMC_DSD_Generator_Stop(XMC_DSD_t * const dsd)881 __STATIC_INLINE void XMC_DSD_Generator_Stop(XMC_DSD_t *const dsd)
882 {
883 XMC_ASSERT("XMC_DSD_Generator_Stop:Invalid module pointer", XMC_DSD_CHECK_MODULE_PTR(dsd));
884 dsd->CGCFG &= ~((uint32_t)DSD_CGCFG_CGMOD_Msk);
885 }
886
887 /**
888 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
889 * @param init Pointer to an instance of data structure of type @ref XMC_DSD_CH_FILTER_CONFIG_t
890 * @return None
891 *
892 * \par<b>Description</b><br>
893 * This API initialize main filter module with \a init.
894 * The filter demodulates the incoming bit stream from the delta sigma modulator to a 16 bit result.
895 *
896 *
897 * \par<b>Note</b><br>
898 * It is internally called by XMC_DSD_CH_Init().
899 *
900 * \par<b>Related APIs:</b><BR>
901 * XMC_DSD_CH_Init()\n\n\n
902 */
903 void XMC_DSD_CH_MainFilter_Init(XMC_DSD_CH_t *const channel, const XMC_DSD_CH_FILTER_CONFIG_t *const init);
904
905 /**
906 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
907 * @param offset Signed Offset value to be set
908 * @return None
909 *
910 * \par<b>Description</b><br>
911 * API set the signed offset value for this channel.
912 * This offset value is subtracted from each result before being written to the corresponding result register \a RESMx.
913 *
914 * \par<b>Note</b><br>
915 * The offset value is measured for each channel separately.
916 *
917 */
XMC_DSD_CH_MainFilter_SetOffset(XMC_DSD_CH_t * const channel,const int16_t offset)918 __STATIC_INLINE void XMC_DSD_CH_MainFilter_SetOffset(XMC_DSD_CH_t *const channel, const int16_t offset)
919 {
920 XMC_ASSERT("XMC_DSD_CH_MainFilter_SetOffset:Invalid module pointer", XMC_DSD_CHECK_CHANNEL_PTR(channel));
921 channel->OFFM = (uint32_t)offset;
922 }
923
924 /**
925 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
926 * @return None
927 *
928 * \par<b>Description</b><br>
929 * This API enable the service request generation for result of this channel.
930 * Result events are generated at the output rate of the configured main filter chain.
931 * Configure bit field \a SRGM of register \a FCFGC
932 *
933 */
XMC_DSD_CH_MainFilter_EnableEvent(XMC_DSD_CH_t * const channel)934 __STATIC_INLINE void XMC_DSD_CH_MainFilter_EnableEvent(XMC_DSD_CH_t *const channel)
935 {
936 XMC_ASSERT("XMC_DSD_CH_MainFilter_EnableEvent:Invalid module pointer", XMC_DSD_CHECK_CHANNEL_PTR(channel));
937 channel->FCFGC |= (uint32_t)DSD_CH_FCFGC_SRGM_Msk;
938 }
939
940 /**
941 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
942 * @return None
943 *
944 * \par<b>Description</b><br>
945 * This API disable the service request generation for result of this channel.
946 * Configure bit field \a SRGM of register \a FCFGC
947 *
948 */
XMC_DSD_CH_MainFilter_DisableEvent(XMC_DSD_CH_t * const channel)949 __STATIC_INLINE void XMC_DSD_CH_MainFilter_DisableEvent(XMC_DSD_CH_t *const channel)
950 {
951 XMC_ASSERT("XMC_DSD_CH_MainFilter_DisableEvent:Invalid module pointer", XMC_DSD_CHECK_CHANNEL_PTR(channel));
952 channel->FCFGC &= ~((uint32_t)DSD_CH_FCFGC_SRGM_Msk);
953 }
954
955 /**
956 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
957 * @param init Pointer to an instance of data structure of type @ref XMC_DSD_CH_AUX_FILTER_CONFIG_t
958 * @return None
959 *
960 * \par<b>Description</b><br>
961 * This API initialize auxiliary filter module with \a init. The auxiliary Filter is mainly used as fast filter.\n
962 * Adding the auxiliary filter to the system structure helps by defining the boundaries and filter configurations.\n
963 *
964 *
965 * \par<b>Note</b><br>
966 * It is internally called by XMC_DSD_CH_Init().\n
967 *
968 * \par<b>Related APIs:</b><BR>
969 * XMC_DSD_CH_Init()\n\n\n
970 */
971 void XMC_DSD_CH_AuxFilter_Init(XMC_DSD_CH_t *const channel, const XMC_DSD_CH_AUX_FILTER_CONFIG_t *const init);
972
973 /**
974 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
975 * @param lower_boundary lower boundary value for limit checking
976 * @param upper_boundary upper boundary value for limit checking
977 * @return None
978 *
979 * \par<b>Description</b><br>
980 * Invoke this API, to set the lower and upper boundary for limit checking for this channel.
981 * This (two’s complement) value is compared to the results of the parallel filter.
982 * Configure bit fields \a BOUNDARYU and \a BOUNDARYL of register \a BOUNDSEL.
983 *
984 * \par<b>Note</b><br>
985 * Lower and upper boundaries are internally configured by function XMC_DSD_CH_AuxFilter_Init().
986 *
987 * \par<b>Related APIs:</b><BR>
988 * XMC_DSD_CH_AuxFilter_Init()\n\n\n
989 */
XMC_DSD_CH_AuxFilter_SetBoundary(XMC_DSD_CH_t * const channel,const int16_t lower_boundary,const int16_t upper_boundary)990 __STATIC_INLINE void XMC_DSD_CH_AuxFilter_SetBoundary(
991 XMC_DSD_CH_t *const channel,
992 const int16_t lower_boundary,
993 const int16_t upper_boundary)
994 {
995 XMC_ASSERT("XMC_DSD_CH_AuxFilter_SetBoundary:Invalid module pointer", XMC_DSD_CHECK_CHANNEL_PTR(channel));
996 channel->BOUNDSEL = (((uint32_t)upper_boundary << (uint32_t)DSD_CH_BOUNDSEL_BOUNDARYU_Pos)
997 | ((uint32_t)lower_boundary & (uint32_t)DSD_CH_BOUNDSEL_BOUNDARYL_Msk));
998 }
999
1000 /**
1001 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
1002 * @param event to select the type of event which will be enabled of type @ref XMC_DSD_CH_AUX_EVENT_t
1003 * @return None
1004 *
1005 * \par<b>Description</b><br>
1006 * This API enable the service request generation for this channel.
1007 * Result events are generated at the output rate of the configured auxiliary filter chain.
1008 * Configure bit field \a SRGA and ESEL of register \a FCFGA
1009 *
1010 */
XMC_DSD_CH_AuxFilter_EnableEvent(XMC_DSD_CH_t * const channel,XMC_DSD_CH_AUX_EVENT_t event)1011 __STATIC_INLINE void XMC_DSD_CH_AuxFilter_EnableEvent(XMC_DSD_CH_t *const channel, XMC_DSD_CH_AUX_EVENT_t event)
1012 {
1013 XMC_ASSERT("XMC_DSD_CH_AuxFilter_EnableEvent:Invalid module pointer", XMC_DSD_CHECK_CHANNEL_PTR(channel));
1014 channel->FCFGA &= ~((uint32_t)DSD_CH_FCFGA_ESEL_Msk|(uint32_t)DSD_CH_FCFGA_SRGA_Msk);
1015 channel->FCFGA |= ((uint32_t)event << DSD_CH_FCFGA_SRGA_Pos);
1016 }
1017
1018 /**
1019 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
1020 * @return None
1021 *
1022 * \par<b>Description</b><br>
1023 * This API disable the auxiliary filter service request generation for this channel.
1024 * Clear the bit fields \a SRGA and ESEL of register \a FCFGA.
1025 *
1026 */
XMC_DSD_CH_AuxFilter_DisableEvent(XMC_DSD_CH_t * const channel)1027 __STATIC_INLINE void XMC_DSD_CH_AuxFilter_DisableEvent(XMC_DSD_CH_t *const channel)
1028 {
1029 XMC_ASSERT("XMC_DSD_CH_AuxFilter_DisableEvent:Invalid module pointer", XMC_DSD_CHECK_CHANNEL_PTR(channel));
1030 channel->FCFGA &= ~((uint32_t)DSD_CH_FCFGA_ESEL_Msk|(uint32_t)DSD_CH_FCFGA_SRGA_Msk);
1031 }
1032
1033 /**
1034 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
1035 * @param init Pointer to an instance of data structure of type @ref XMC_DSD_CH_INTEGRATOR_CONFIG_t
1036 * @return None
1037 *
1038 * \par<b>Description</b><br>
1039 * Initialize integrator of DSD module.The integrator is mainly used for resolver feedback but can also be used for high accurate measurement.
1040 * This API configures number of integration loops, number of results are discarded before integration starts, integrator stop condition,
1041 * number of integrator loop to get integration result and trigger mode.
1042 *
1043 * \par<b>Note</b><br>
1044 * Trigger source for timestamp and integrator are shared.
1045 * It is internally called by XMC_DSD_CH_Init().
1046 *
1047 * \par<b>Related APIs:</b><BR>
1048 * XMC_DSD_CH_Init()\n\n\n
1049 */
1050 void XMC_DSD_CH_Integrator_Init(XMC_DSD_CH_t *const channel, const XMC_DSD_CH_INTEGRATOR_CONFIG_t *const init);
1051 /**
1052 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
1053 * @param init Pointer to an instance of data structure of type @ref XMC_DSD_CH_RECTIFY_CONFIG_t
1054 * @return None
1055 *
1056 * \par<b>Description</b><br>
1057 * Initialize rectification for this channel.
1058 * In a resolver feedback system, rectifier is used to rectify the result from the integrator.
1059 * Configure bit field \a RFEN and \a SSRC of register \a RECTCFG. Also configure sign delay
1060 * value for positive halfwave(\a SDPOS) and negative halfwave(\a SDNEG).
1061 * \par<b>Note</b><br>
1062 * For the operational capability of rectifier the filter and the integrator is mandatory.
1063 * It is internally called by XMC_DSD_CH_Init().
1064 *
1065 * \par<b>Related APIs:</b><BR>
1066 * XMC_DSD_CH_Init()\n\n\n
1067 */
1068 void XMC_DSD_CH_Rectify_Init(XMC_DSD_CH_t *const channel, const XMC_DSD_CH_RECTIFY_CONFIG_t *const init);
1069
1070 /**
1071 * @param channel Pointer to an instance of DSD channel of type @ref XMC_DSD_CH_t
1072 * @param delay Captured value
1073 * @return uint8_t
1074 *
1075 * \par<b>Description</b><br>
1076 * This API, capture sign delay value for DSD channel.
1077 * Captured value indicates the values counted between the begin of the positive
1078 * halfwave of the carrier signal and the first received positive value.
1079 * Read bit field \a SDCAP of register \a CGSYNC
1080 *
1081 */
XMC_DSD_CH_GetRectifyDelay(XMC_DSD_CH_t * const channel,uint8_t * delay)1082 __STATIC_INLINE void XMC_DSD_CH_GetRectifyDelay(XMC_DSD_CH_t *const channel, uint8_t* delay)
1083 {
1084 XMC_ASSERT("XMC_DSD_CH_GetRectifyDelay:Invalid module pointer", XMC_DSD_CHECK_CHANNEL_PTR(channel));
1085 *delay = (uint8_t)((channel->CGSYNC & DSD_CH_CGSYNC_SDCAP_Msk ) >> DSD_CH_CGSYNC_SDCAP_Pos);
1086 }
1087 /**
1088 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
1089 * @param channel_id Channel number register value of type @ref XMC_DSD_CH_ID_t
1090 * @return None
1091 *
1092 * \par<b>Description</b><br>
1093 * Set the result event flag and trigger the corresponding event.\n
1094 * Set bit fields \a RESEVx of register \a EVFLAG.Clearing these bits has no effect.
1095 *
1096 * \par<b>Note</b><br>
1097 * API call for channel-0 : XMC_DSD_SetResultEventFlag(DSD,(uint32_t)XMC_DSD_CH_ID_0);
1098 * API call for channel-0 and 1: XMC_DSD_SetResultEventFlag(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1));
1099 *
1100 * \par<b>Related APIs:</b><BR>
1101 * XMC_DSD_ClearResultEventFlag()\n\n\n
1102 */
XMC_DSD_SetResultEventFlag(XMC_DSD_t * const dsd,const uint32_t channel_id)1103 __STATIC_INLINE void XMC_DSD_SetResultEventFlag(XMC_DSD_t *const dsd, const uint32_t channel_id)
1104 {
1105 XMC_ASSERT("XMC_DSD_SetResultEventFlag:Invalid module pointer", XMC_DSD_CHECK_MODULE_PTR(dsd));
1106 dsd->EVFLAG = channel_id;
1107 }
1108 /**
1109 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
1110 * @param channel_id Channel number register value of type @ref XMC_DSD_CH_ID_t
1111 * @return None
1112 *
1113 * \par<b>Description</b><br>
1114 * Clear the result event flag.\n
1115 * Set bit fields \a RESECx of register \a EVFLAGCLR.Clearing these bits has no effect.
1116 *
1117 * \par<b>Note</b><br>
1118 * API call for channel-0 : XMC_DSD_ClearResultEventFlag(DSD,(uint32_t)XMC_DSD_CH_ID_0);
1119 * API call for channel-0 and 1: XMC_DSD_ClearResultEventFlag(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1));
1120 *
1121 * \par<b>Related APIs:</b><BR>
1122 * XMC_DSD_SetResultEventFlag()\n\n\n
1123 */
XMC_DSD_ClearResultEventFlag(XMC_DSD_t * const dsd,const uint32_t channel_id)1124 __STATIC_INLINE void XMC_DSD_ClearResultEventFlag(XMC_DSD_t *const dsd, const uint32_t channel_id)
1125 {
1126 XMC_ASSERT("XMC_DSD_ClearResultEventFlag:Invalid module pointer", XMC_DSD_CHECK_MODULE_PTR(dsd));
1127 dsd->EVFLAGCLR = channel_id;
1128 }
1129 /**
1130 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
1131 * @param channel_id Channel number register value of type @ref XMC_DSD_CH_ID_t
1132 * @return None
1133 *
1134 * \par<b>Description</b><br>
1135 * Set the alarm event flag.\n
1136 * Set bit fields \a ALEVx of register \a EVFLAG.Clearing these bits has no effect.
1137 *
1138 * \par<b>Note</b><br>
1139 * API call for channel-0 : XMC_DSD_SetAlarmEventFlag(DSD,(uint32_t)XMC_DSD_CH_ID_0);
1140 * API call for channel-0 and 1: XMC_DSD_SetAlarmEventFlag(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1));
1141 *
1142 * \par<b>Related APIs:</b><BR>
1143 * XMC_DSD_ClearAlarmEventFlag()\n\n\n
1144 */
XMC_DSD_SetAlarmEventFlag(XMC_DSD_t * const dsd,const uint32_t channel_id)1145 __STATIC_INLINE void XMC_DSD_SetAlarmEventFlag(XMC_DSD_t *const dsd, const uint32_t channel_id)
1146 {
1147 XMC_ASSERT("XMC_DSD_SetAlarmEventFlag:Invalid module pointer", XMC_DSD_CHECK_MODULE_PTR(dsd));
1148 dsd->EVFLAG = (channel_id<< DSD_EVFLAGCLR_ALEC0_Pos);
1149 }
1150 /**
1151 * @param dsd Pointer to an instance of DSD module of type @ref XMC_DSD_t
1152 * @param channel_id Channel number register value of type @ref XMC_DSD_CH_ID_t
1153 * @return None
1154 *
1155 * \par<b>Description</b><br>
1156 * Clear the result event flag.\n
1157 * Set bit fields \a ALECx of register \a EVFLAGCLR.Clearing these bits has no effect.
1158 *
1159 * \par<b>Note</b><br>
1160 * API call for channel-0 : XMC_DSD_ClearResultEventFlag(DSD,(uint32_t)XMC_DSD_CH_ID_0);
1161 * API call for channel-0 and 1: XMC_DSD_ClearResultEventFlag(DSD,(uint32_t)(XMC_DSD_CH_ID_0|XMC_DSD_CH_ID_1));
1162 *
1163 * \par<b>Related APIs:</b><BR>
1164 * XMC_DSD_SetAlarmEventFlag()\n\n\n
1165 */
XMC_DSD_ClearAlarmEventFlag(XMC_DSD_t * const dsd,const uint32_t channel_id)1166 __STATIC_INLINE void XMC_DSD_ClearAlarmEventFlag(XMC_DSD_t *const dsd, const uint32_t channel_id)
1167 {
1168 XMC_ASSERT("XMC_DSD_ClearAlarmEventFlag:Invalid module pointer", XMC_DSD_CHECK_MODULE_PTR(dsd));
1169 dsd->EVFLAGCLR = (channel_id<<DSD_EVFLAGCLR_ALEC0_Pos);
1170 }
1171 #ifdef __cplusplus
1172 }
1173 #endif
1174
1175 /**
1176 * @}
1177 */
1178
1179 /**
1180 * @}
1181 */
1182
1183
1184 #endif /* DSD_PRESENT */
1185 #endif /*XMC_DSD_H */
1186
