1 /***************************************************************************//**
2 * \file cy_tcpwm_shiftreg.c
3 * \version 1.30
4 *
5 * \brief
6 * The source file of the tcpwm driver.
7 *
8 ********************************************************************************
9 * \copyright
10 * Copyright 2016-2020 Cypress Semiconductor Corporation
11 * SPDX-License-Identifier: Apache-2.0
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License");
14 * you may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 * http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *******************************************************************************/
25
26 #include "cy_tcpwm_shiftreg.h"
27
28 #ifdef CY_IP_MXTCPWM
29
30 #if defined(__cplusplus)
31 extern "C" {
32 #endif
33
34 /*******************************************************************************
35 * Function Name: Cy_TCPWM_ShiftReg_Init
36 ****************************************************************************//**
37 *
38 * Initializes the counter in the TCPWM block for the Shift Register operation.
39 *
40 * \param base
41 * The pointer to a TCPWM instance.
42 *
43 * \param cntNum
44 * The Counter instance number in the selected TCPWM.
45 *
46 * \param config
47 * The pointer to a configuration structure. See \ref cy_stc_tcpwm_shiftreg_config_t.
48 *
49 * \return error / status code. See \ref cy_en_tcpwm_status_t.
50 *
51 * \snippet tcpwm/shiftreg/snippet/main.c snippet_Cy_TCPWM_ShiftReg_Init
52 *
53 *******************************************************************************/
Cy_TCPWM_ShiftReg_Init(TCPWM_Type const * base,uint32_t cntNum,cy_stc_tcpwm_shiftreg_config_t const * config)54 cy_en_tcpwm_status_t Cy_TCPWM_ShiftReg_Init(TCPWM_Type const *base, uint32_t cntNum, cy_stc_tcpwm_shiftreg_config_t const *config)
55 {
56 cy_en_tcpwm_status_t status = CY_TCPWM_SUCCESS;
57
58 #if (CY_IP_MXTCPWM_VERSION >= 2U)
59 if ((NULL != base) && (NULL != config))
60 {
61 uint32_t grp = TCPWM_GRP_CNT_GET_GRP(cntNum);
62 bool enabled_bit = _FLD2BOOL(TCPWM_GRP_CNT_V2_CTRL_ENABLED, TCPWM_GRP_CNT_CTRL(base, grp, cntNum));
63
64 TCPWM_GRP_CNT_CTRL(base, grp, cntNum) =
65 (_VAL2FLD(TCPWM_GRP_CNT_V2_CTRL_MODE, CY_TCPWM_MODE_SHIFTREG) |
66 (config->enableCompare0Swap ? TCPWM_GRP_CNT_V2_CTRL_AUTO_RELOAD_CC0_Msk : 0UL) |
67 _VAL2FLD(TCPWM_GRP_CNT_V2_CTRL_QUAD_ENCODING_MODE,
68 (config->invertShiftRegOut | (config->invertShiftRegOutN << 1U))) |
69 _VAL2FLD(TCPWM_GRP_CNT_V2_CTRL_PWM_DISABLE_MODE, config->shiftRegOnDisable) |
70 (enabled_bit ? TCPWM_GRP_CNT_V2_CTRL_ENABLED_Msk : 0UL));
71
72 TCPWM_GRP_CNT_DT(base, grp, cntNum) = _VAL2FLD(TCPWM_GRP_CNT_V2_DT_DT_LINE_OUT_L, (uint8_t)config->clockPrescaler);
73
74 TCPWM_GRP_CNT_CC0(base, grp, cntNum) = config->compare0;
75 TCPWM_GRP_CNT_CC0_BUFF(base, grp, cntNum) = config->compareBuf0;
76
77 TCPWM_GRP_CNT_PERIOD_BUFF(base, grp, cntNum) = config->tapsEnabled;
78
79 TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) =
80 (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL0_CAPTURE0_SEL, config->serialInput) |
81 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL0_RELOAD_SEL, config->reloadInput) |
82 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL0_STOP_SEL, config->killInput) |
83 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL0_COUNT_SEL, config->shiftInput));
84
85 TCPWM_GRP_CNT_TR_IN_SEL1(base, grp, cntNum) = _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL1_START_SEL, config->startInput);
86
87 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) =
88 (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_CAPTURE0_EDGE, config->serialInputMode) |
89 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_RELOAD_EDGE, config->reloadInputMode) |
90 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_START_EDGE, config->startInputMode) |
91 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_STOP_EDGE, config->killInputMode) |
92 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_EDGE_SEL_COUNT_EDGE, config->shiftInputMode));
93
94 TCPWM_GRP_CNT_TR_OUT_SEL(base, grp, cntNum) =
95 (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_OUT_SEL_OUT0, config->trigger0Event) |
96 _VAL2FLD(TCPWM_GRP_CNT_V2_TR_OUT_SEL_OUT1, config->trigger1Event));
97
98 TCPWM_GRP_CNT_INTR_MASK(base, grp, cntNum) = config->interruptSources;
99
100 if(TCPWM_GRP_CC1(grp))
101 {
102 TCPWM_GRP_CNT_CC1(base, grp, cntNum) = config->compare1;
103 TCPWM_GRP_CNT_CC1_BUFF(base, grp, cntNum) = config->compareBuf1;
104
105 TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |=
106 (config->enableCompare1Swap ? TCPWM_GRP_CNT_V2_CTRL_AUTO_RELOAD_CC1_Msk : 0UL);
107 }
108 }
109 else
110 {
111 status = CY_TCPWM_BAD_PARAM;
112 }
113 #else
114 /* Suppress a compiler warning about unused variables */
115 (void) base;
116 (void) cntNum;
117 (void) config;
118
119 status = CY_TCPWM_UNSUPPORTED_FEATURE;
120 #endif
121 return(status);
122 }
123
124 /*******************************************************************************
125 * Function Name: Cy_TCPWM_ShiftReg_DeInit
126 ****************************************************************************//**
127 *
128 * De-initializes the counter in the TCPWM block, returns register values to
129 * default.
130 *
131 * \param base
132 * The pointer to a TCPWM instance.
133 *
134 * \param cntNum
135 * The Counter instance number in the selected TCPWM.
136 *
137 * \param config
138 * The pointer to a configuration structure. See \ref cy_stc_tcpwm_shiftreg_config_t.
139 *
140 * \snippet tcpwm/shiftreg/snippet/main.c snippet_Cy_TCPWM_ShiftReg_DeInit
141 *
142 *******************************************************************************/
Cy_TCPWM_ShiftReg_DeInit(TCPWM_Type const * base,uint32_t cntNum,cy_stc_tcpwm_shiftreg_config_t const * config)143 void Cy_TCPWM_ShiftReg_DeInit(TCPWM_Type const *base, uint32_t cntNum, cy_stc_tcpwm_shiftreg_config_t const *config)
144 {
145
146 (void) config;
147
148 #if (CY_IP_MXTCPWM_VERSION >= 2U)
149
150 uint32_t grp = TCPWM_GRP_CNT_GET_GRP(cntNum);
151
152 TCPWM_GRP_CNT_CTRL(base, grp, cntNum) = CY_TCPWM_GRP_CNT_CTRL_DEFAULT;
153 TCPWM_GRP_CNT_DT(base, grp, cntNum) = CY_TCPWM_GRP_CNT_DT_DEFAULT;
154 TCPWM_GRP_CNT_COUNTER(base, grp, cntNum) = CY_TCPWM_GRP_CNT_COUNTER_DEFAULT;
155 TCPWM_GRP_CNT_TR_PWM_CTRL(base, grp, cntNum) = CY_TCPWM_GRP_CNT_TR_PWM_CTRL_DEFAULT;
156 TCPWM_GRP_CNT_CC0(base, grp, cntNum) = CY_TCPWM_GRP_CNT_CC0_DEFAULT;
157 TCPWM_GRP_CNT_CC0_BUFF(base, grp, cntNum) = CY_TCPWM_GRP_CNT_CC0_BUFF_DEFAULT;
158 TCPWM_GRP_CNT_CC1(base, grp, cntNum) = CY_TCPWM_GRP_CNT_CC0_DEFAULT;
159 TCPWM_GRP_CNT_CC1_BUFF(base, grp, cntNum) = CY_TCPWM_GRP_CNT_CC0_BUFF_DEFAULT;
160 TCPWM_GRP_CNT_PERIOD(base, grp, cntNum) = CY_TCPWM_GRP_CNT_PERIOD_DEFAULT;
161 TCPWM_GRP_CNT_PERIOD_BUFF(base, grp, cntNum) = CY_TCPWM_GRP_CNT_PERIOD_BUFF_DEFAULT;
162 TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) = CY_TCPWM_GRP_CNT_TR_IN_SEL0_DEFAULT;
163 TCPWM_GRP_CNT_TR_IN_SEL1(base, grp, cntNum) = CY_TCPWM_GRP_CNT_TR_IN_SEL1_DEFAULT;
164 TCPWM_GRP_CNT_TR_IN_EDGE_SEL(base, grp, cntNum) = CY_TCPWM_GRP_CNT_TR_IN_EDGE_SEL_DEFAULT;
165 TCPWM_GRP_CNT_INTR_MASK(base, grp, cntNum) = CY_TCPWM_GRP_CNT_INTR_MASK_DEFAULT;
166
167 #else
168
169 /* Suppress a compiler warning about unused variables */
170 (void) base;
171 (void) cntNum;
172
173 #endif /* CY_IP_MXTCPWM_VERSION >= 2U */
174 }
175
176 #if defined(__cplusplus)
177 }
178 #endif
179
180 #endif /* CY_IP_MXTCPWM */
181
182 /* [] END OF FILE */
183
