1 /**
2 * @file xmc4_gpio.h
3 * @date 2015-10-09
4 *
5 * @cond
6 *********************************************************************************************************************
7 * XMClib v2.1.24 - XMC Peripheral Driver Library
8 *
9 * Copyright (c) 2015-2019, Infineon Technologies AG
10 * All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
13 * following conditions are met:
14 *
15 * Redistributions of source code must retain the above copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
19 * disclaimer in the documentation and/or other materials provided with the distribution.
20 *
21 * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
22 * products derived from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
25 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with
33 * Infineon Technologies AG dave@infineon.com).
34 *********************************************************************************************************************
35 *
36 * Change History
37 * --------------
38 *
39 * 2015-02-20:
40 * - Initial draft<br>
41 *
42 * 2015-06-20:
43 * - Removed version macros and declaration of GetDriverVersion API
44 *
45 * 2015-10-09:
46 * - Added PORT MACRO checks and definitions for XMC4800/4700 devices
47 * @endcond
48 *
49 */
50
51 #ifndef XMC4_GPIO_H
52 #define XMC4_GPIO_H
53
54 /**********************************************************************************************************************
55 * HEADER FILES
56 *********************************************************************************************************************/
57
58 #include "xmc_common.h"
59
60 #if UC_FAMILY == XMC4
61
62 #include "xmc4_gpio_map.h"
63
64 /**
65 * @addtogroup XMClib XMC Peripheral Library
66 * @{
67 */
68
69 /**
70 * @addtogroup GPIO
71 * @{
72 */
73
74 /**********************************************************************************************************************
75 * MACROS
76 *********************************************************************************************************************/
77
78 #if defined(PORT0)
79 #define XMC_GPIO_PORT0 ((XMC_GPIO_PORT_t *) PORT0_BASE)
80 #define XMC_GPIO_CHECK_PORT0(port) (port == XMC_GPIO_PORT0)
81 #else
82 #define XMC_GPIO_CHECK_PORT0(port) 0
83 #endif
84
85 #if defined(PORT1)
86 #define XMC_GPIO_PORT1 ((XMC_GPIO_PORT_t *) PORT1_BASE)
87 #define XMC_GPIO_CHECK_PORT1(port) (port == XMC_GPIO_PORT1)
88 #else
89 #define XMC_GPIO_CHECK_PORT1(port) 0
90 #endif
91
92 #if defined(PORT2)
93 #define XMC_GPIO_PORT2 ((XMC_GPIO_PORT_t *) PORT2_BASE)
94 #define XMC_GPIO_CHECK_PORT2(port) (port == XMC_GPIO_PORT2)
95 #else
96 #define XMC_GPIO_CHECK_PORT2(port) 0
97 #endif
98
99 #if defined(PORT3)
100 #define XMC_GPIO_PORT3 ((XMC_GPIO_PORT_t *) PORT3_BASE)
101 #define XMC_GPIO_CHECK_PORT3(port) (port == XMC_GPIO_PORT3)
102 #else
103 #define XMC_GPIO_CHECK_PORT3(port) 0
104 #endif
105
106 #if defined(PORT4)
107 #define XMC_GPIO_PORT4 ((XMC_GPIO_PORT_t *) PORT4_BASE)
108 #define XMC_GPIO_CHECK_PORT4(port) (port == XMC_GPIO_PORT4)
109 #else
110 #define XMC_GPIO_CHECK_PORT4(port) 0
111 #endif
112
113 #if defined(PORT5)
114 #define XMC_GPIO_PORT5 ((XMC_GPIO_PORT_t *) PORT5_BASE)
115 #define XMC_GPIO_CHECK_PORT5(port) (port == XMC_GPIO_PORT5)
116 #else
117 #define XMC_GPIO_CHECK_PORT5(port) 0
118 #endif
119
120 #if defined(PORT6)
121 #define XMC_GPIO_PORT6 ((XMC_GPIO_PORT_t *) PORT6_BASE)
122 #define XMC_GPIO_CHECK_PORT6(port) (port == XMC_GPIO_PORT6)
123 #else
124 #define XMC_GPIO_CHECK_PORT6(port) 0
125 #endif
126
127 #if defined(PORT7)
128 #define XMC_GPIO_PORT7 ((XMC_GPIO_PORT_t *) PORT7_BASE)
129 #define XMC_GPIO_CHECK_PORT7(port) (port == XMC_GPIO_PORT7)
130 #else
131 #define XMC_GPIO_CHECK_PORT7(port) 0
132 #endif
133
134 #if defined(PORT8)
135 #define XMC_GPIO_PORT8 ((XMC_GPIO_PORT_t *) PORT8_BASE)
136 #define XMC_GPIO_CHECK_PORT8(port) (port == XMC_GPIO_PORT8)
137 #else
138 #define XMC_GPIO_CHECK_PORT8(port) 0
139 #endif
140
141 #if defined(PORT9)
142 #define XMC_GPIO_PORT9 ((XMC_GPIO_PORT_t *) PORT9_BASE)
143 #define XMC_GPIO_CHECK_PORT9(port) (port == XMC_GPIO_PORT9)
144 #else
145 #define XMC_GPIO_CHECK_PORT9(port) 0
146 #endif
147
148 #if defined(PORT14)
149 #define XMC_GPIO_PORT14 ((XMC_GPIO_PORT_t *) PORT14_BASE)
150 #define XMC_GPIO_CHECK_PORT14(port) (port == XMC_GPIO_PORT14)
151 #else
152 #define XMC_GPIO_CHECK_PORT14(port) 0
153 #endif
154
155 #if defined(PORT15)
156 #define XMC_GPIO_PORT15 ((XMC_GPIO_PORT_t *) PORT15_BASE)
157 #define XMC_GPIO_CHECK_PORT15(port) (port == XMC_GPIO_PORT15)
158 #else
159 #define XMC_GPIO_CHECK_PORT15(port) 0
160 #endif
161
162 #define XMC_GPIO_CHECK_PORT(port) (XMC_GPIO_CHECK_PORT0(port) || \
163 XMC_GPIO_CHECK_PORT1(port) || \
164 XMC_GPIO_CHECK_PORT2(port) || \
165 XMC_GPIO_CHECK_PORT3(port) || \
166 XMC_GPIO_CHECK_PORT4(port) || \
167 XMC_GPIO_CHECK_PORT5(port) || \
168 XMC_GPIO_CHECK_PORT6(port) || \
169 XMC_GPIO_CHECK_PORT7(port) || \
170 XMC_GPIO_CHECK_PORT8(port) || \
171 XMC_GPIO_CHECK_PORT9(port) || \
172 XMC_GPIO_CHECK_PORT14(port) || \
173 XMC_GPIO_CHECK_PORT15(port))
174
175 #define XMC_GPIO_CHECK_OUTPUT_PORT(port) (XMC_GPIO_CHECK_PORT0(port) || \
176 XMC_GPIO_CHECK_PORT1(port) || \
177 XMC_GPIO_CHECK_PORT2(port) || \
178 XMC_GPIO_CHECK_PORT3(port) || \
179 XMC_GPIO_CHECK_PORT4(port) || \
180 XMC_GPIO_CHECK_PORT5(port) || \
181 XMC_GPIO_CHECK_PORT6(port) || \
182 XMC_GPIO_CHECK_PORT7(port) || \
183 XMC_GPIO_CHECK_PORT8(port) || \
184 XMC_GPIO_CHECK_PORT9(port))
185
186 #define XMC_GPIO_CHECK_ANALOG_PORT(port) (XMC_GPIO_CHECK_PORT14(port) || \
187 XMC_GPIO_CHECK_PORT15(port))
188
189 #define XMC_GPIO_CHECK_OUTPUT_STRENGTH(strength) ((strength == XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE) ||\
190 (strength == XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE) ||\
191 (strength == XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE) ||\
192 (strength == XMC_GPIO_OUTPUT_STRENGTH_STRONG_SLOW_EDGE) ||\
193 (strength == XMC_GPIO_OUTPUT_STRENGTH_MEDIUM) ||\
194 (strength == XMC_GPIO_OUTPUT_STRENGTH_WEAK))
195
196 /**********************************************************************************************************************
197 * ENUMS
198 *********************************************************************************************************************/
199
200 /**
201 * Defines the direction and characteristics of a pin. Use type \a XMC_GPIO_MODE_t for this enum. For the operation
202 * with alternate functions, the port pins are directly connected to input or output functions of the on-chip periphery.
203 */
204
205 typedef enum XMC_GPIO_MODE
206 {
207 XMC_GPIO_MODE_INPUT_TRISTATE = 0x0UL << PORT0_IOCR0_PC0_Pos, /**< No internal pull device active */
208 XMC_GPIO_MODE_INPUT_PULL_DOWN = 0x1UL << PORT0_IOCR0_PC0_Pos, /**< Internal pull-down device active */
209 XMC_GPIO_MODE_INPUT_PULL_UP = 0x2UL << PORT0_IOCR0_PC0_Pos, /**< Internal pull-up device active */
210 XMC_GPIO_MODE_INPUT_SAMPLING = 0x3UL << PORT0_IOCR0_PC0_Pos, /**< No internal pull device active;Pn_OUTx continuously samples the input value */
211 XMC_GPIO_MODE_INPUT_INVERTED_TRISTATE = 0x4UL << PORT0_IOCR0_PC0_Pos, /**< Inverted no internal pull device active */
212 XMC_GPIO_MODE_INPUT_INVERTED_PULL_DOWN = 0x5UL << PORT0_IOCR0_PC0_Pos, /**< Inverted internal pull-down device active */
213 XMC_GPIO_MODE_INPUT_INVERTED_PULL_UP = 0x6UL << PORT0_IOCR0_PC0_Pos, /**< Inverted internal pull-up device active */
214 XMC_GPIO_MODE_INPUT_INVERTED_SAMPLING = 0x7UL << PORT0_IOCR0_PC0_Pos, /**< Inverted no internal pull device active; Pn_OUTx continuously samples the input value */
215 XMC_GPIO_MODE_OUTPUT_PUSH_PULL = 0x80UL, /**< Push-pull general-purpose output */
216 XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN = 0xc0UL, /**< Open-drain general-purpose output */
217 XMC_GPIO_MODE_OUTPUT_ALT1 = 0x1UL << PORT0_IOCR0_PC0_Pos,
218 XMC_GPIO_MODE_OUTPUT_ALT2 = 0x2UL << PORT0_IOCR0_PC0_Pos,
219 XMC_GPIO_MODE_OUTPUT_ALT3 = 0x3UL << PORT0_IOCR0_PC0_Pos,
220 XMC_GPIO_MODE_OUTPUT_ALT4 = 0x4UL << PORT0_IOCR0_PC0_Pos,
221 XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1 = XMC_GPIO_MODE_OUTPUT_PUSH_PULL | XMC_GPIO_MODE_OUTPUT_ALT1, /**< Push-pull alternate output function 1 */
222 XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2 = XMC_GPIO_MODE_OUTPUT_PUSH_PULL | XMC_GPIO_MODE_OUTPUT_ALT2, /**< Push-pull alternate output function 2 */
223 XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT3 = XMC_GPIO_MODE_OUTPUT_PUSH_PULL | XMC_GPIO_MODE_OUTPUT_ALT3, /**< Push-pull alternate output function 3 */
224 XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4 = XMC_GPIO_MODE_OUTPUT_PUSH_PULL | XMC_GPIO_MODE_OUTPUT_ALT4, /**< Push-pull alternate output function 4 */
225 XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT1 = XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN | XMC_GPIO_MODE_OUTPUT_ALT1, /**< Open drain alternate output function 1 */
226 XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT2 = XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN | XMC_GPIO_MODE_OUTPUT_ALT2, /**< Open drain alternate output function 2 */
227 XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT3 = XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN | XMC_GPIO_MODE_OUTPUT_ALT3, /**< Open drain alternate output function 3 */
228 XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT4 = XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN | XMC_GPIO_MODE_OUTPUT_ALT4, /**< Open drain alternate output function 4 */
229 } XMC_GPIO_MODE_t;
230
231 /**
232 * Defines output strength and slew rate of a pin. Use type \a XMC_GPIO_OUTPUT_STRENGTH_t for this enum.
233 *
234 */
235 typedef enum XMC_GPIO_OUTPUT_STRENGTH
236 {
237 XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE = 0x0U, /**< Defines pad driver mode, for high speed 3.3V LVTTL outputs */
238 XMC_GPIO_OUTPUT_STRENGTH_STRONG_MEDIUM_EDGE = 0x1U, /**< Defines pad driver mode, for high speed 3.3V LVTTL outputs */
239 XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE = 0x2U, /**< Defines pad driver mode, medium speed 3.3V LVTTL outputs */
240 XMC_GPIO_OUTPUT_STRENGTH_STRONG_SLOW_EDGE = 0x3U, /**< Defines pad driver mode, medium speed 3.3V LVTTL outputs */
241 XMC_GPIO_OUTPUT_STRENGTH_MEDIUM = 0x4U, /**< Defines pad driver mode, for low speed 3.3V LVTTL outputs */
242 XMC_GPIO_OUTPUT_STRENGTH_WEAK = 0x7U /**< Defines pad driver mode, low speed 3.3V LVTTL outputs */
243 } XMC_GPIO_OUTPUT_STRENGTH_t;
244
245
246 /**********************************************************************************************************************
247 * DATA STRUCTURES
248 *********************************************************************************************************************/
249 /**
250 * Structure points port hardware registers. Use type XMC_GPIO_PORT_t for this structure.
251 */
252
253 typedef struct XMC_GPIO_PORT {
254 __IO uint32_t OUT; /**< The port output register determines the value of a GPIO pin when it is selected by
255 Pn_IOCRx as output */
256 __O uint32_t OMR; /**< The port output modification register contains control bits that make it possible
257 to individually set, reset, or toggle the logic state of a single port line*/
258 __I uint32_t RESERVED0[2];
259 __IO uint32_t IOCR[4]; /**< The port input/output control registers select the digital output and input driver
260 functionality and characteristics of a GPIO port pin */
261 __I uint32_t RESERVED1;
262 __I uint32_t IN; /**< The logic level of a GPIO pin can be read via the read-only port input register
263 Pn_IN */
264 __I uint32_t RESERVED2[6];
265 __IO uint32_t PDR[2]; /**< Pad Driver Mode Registers */
266
267 __I uint32_t RESERVED3[6];
268 __IO uint32_t PDISC; /**< Pin Function Decision Control Register is to disable/enable the digital pad
269 structure in shared analog and digital ports*/
270 __I uint32_t RESERVED4[3];
271 __IO uint32_t PPS; /**< Pin Power Save Register */
272 __IO uint32_t HWSEL; /**< Pin Hardware Select Register */
273 } XMC_GPIO_PORT_t;
274
275 /**
276 * Structure initializes port pin. Use type XMC_GPIO_CONFIG_t for this structure.
277 */
278 typedef struct XMC_GPIO_CONFIG
279 {
280 XMC_GPIO_MODE_t mode; /**< Defines the direction and characteristics of a pin */
281 XMC_GPIO_OUTPUT_LEVEL_t output_level; /**< Defines output level of a pin */
282 XMC_GPIO_OUTPUT_STRENGTH_t output_strength; /**< Defines pad driver mode of a pin */
283 } XMC_GPIO_CONFIG_t;
284
285 /**********************************************************************************************************************
286 * API PROTOTYPES
287 *********************************************************************************************************************/
288
XMC_GPIO_IsModeValid(XMC_GPIO_MODE_t mode)289 __STATIC_INLINE bool XMC_GPIO_IsModeValid(XMC_GPIO_MODE_t mode)
290 {
291 return ((mode == XMC_GPIO_MODE_INPUT_TRISTATE) ||
292 (mode == XMC_GPIO_MODE_INPUT_PULL_DOWN) ||
293 (mode == XMC_GPIO_MODE_INPUT_PULL_UP) ||
294 (mode == XMC_GPIO_MODE_INPUT_SAMPLING) ||
295 (mode == XMC_GPIO_MODE_INPUT_INVERTED_TRISTATE) ||
296 (mode == XMC_GPIO_MODE_INPUT_INVERTED_PULL_DOWN) ||
297 (mode == XMC_GPIO_MODE_INPUT_INVERTED_PULL_UP) ||
298 (mode == XMC_GPIO_MODE_INPUT_INVERTED_SAMPLING) ||
299 (mode == XMC_GPIO_MODE_OUTPUT_PUSH_PULL) ||
300 (mode == XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1) ||
301 (mode == XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2) ||
302 (mode == XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT3) ||
303 (mode == XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4) ||
304 (mode == XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN) ||
305 (mode == XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT1) ||
306 (mode == XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT2) ||
307 (mode == XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT3) ||
308 (mode == XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT4));
309 }
310
311 /**
312 *
313 * @param port constant pointer pointing to GPIO port, to access hardware register Pn_PDR.
314 * @param pin Port pin number.
315 * @param strength Output driver mode selection. Refer data structure @ref XMC_GPIO_OUTPUT_STRENGTH_t for details.
316 *
317 * @return None
318 *
319 * \par<b>Description:</b><br>
320 * Sets port pin output strength and slew rate. It configures hardware registers Pn_PDR. \a strength is initially
321 * configured during initialization in XMC_GPIO_Init(). Call this API to alter output driver mode as needed later in
322 * the program.
323 *
324 * \par<b>Related APIs:</b><BR>
325 * None
326 *
327 * \par<b>Note:</b><br>
328 * Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode().
329 *
330 */
331
332 void XMC_GPIO_SetOutputStrength(XMC_GPIO_PORT_t *const port, const uint8_t pin, XMC_GPIO_OUTPUT_STRENGTH_t strength);
333
334 /**
335 * @} (end addtogroup GPIO)
336 */
337
338 /**
339 * @} (end addtogroup XMClib)
340 */
341
342 #endif /* UC_FAMILY == XMC4 */
343
344 #endif /* XMC4_GPIO_H */
345
346
